1; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1 \
2; RUN:   -relocation-model=pic < %s 2>&1 | FileCheck --check-prefix=PIC %s
3; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1  \
4; RUN:   -relocation-model=static < %s 2>&1 | FileCheck --check-prefix=STATIC %s
5; RUN: llc -march=mips64 -debug-only=isel -mips-tail-calls=1 \
6; RUN:   -relocation-model=pic < %s 2>&1 | FileCheck --check-prefix=PIC64 %s
7; RUN: llc -march=mips64 -debug-only=isel -mips-tail-calls=1  \
8; RUN:   -relocation-model=static < %s 2>&1 | FileCheck --check-prefix=STATIC64 %s
9; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1 \
10; RUN:   -relocation-model=pic -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=PIC %s
11; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1  \
12; RUN:   -relocation-model=static -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=STATIC-MM %s
13; RUN: llc -march=mips -mcpu=mips32r6 -debug-only=isel -mips-tail-calls=1 \
14; RUN:   -relocation-model=pic -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=PIC %s
15; RUN: llc -march=mips -mcpu=mips32r6 -debug-only=isel -mips-tail-calls=1  \
16; RUN:   -relocation-model=static -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=STATIC-MM %s
17; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1  \
18; RUN:   -relocation-model=pic    -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
19; RUN: llc -march=mips -debug-only=isel -mips-tail-calls=1  \
20; RUN:   -relocation-model=static -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
21
22; REQUIRES: asserts
23
24; Test that the correct pseudo instructions are generated for indirect
25; branches and tail calls. Previously, the order of the DAG matcher table
26; determined if the correct instruction was selected for mips16.
27
28declare protected void @a()
29
30define void @test1(i32 %a) {
31entry:
32  %0 = trunc i32 %a to i1
33  %1 = select i1 %0,
34              i8* blockaddress(@test1, %bb),
35              i8* blockaddress(@test1, %bb6)
36  indirectbr i8* %1, [label %bb, label %bb6]
37
38; STATIC:     PseudoIndirectBranch
39; STATIC-MM:  PseudoIndirectBranch
40; STATIC-NOT: PseudoIndirectBranch64
41; STATIC64:   PseudoIndirectBranch64
42; PIC:        PseudoIndirectBranch
43; PIC-NOT:    PseudoIndirectBranch64
44; PIC64:      PseudoIndirectBranch64
45; MIPS16:     JrcRx16
46bb:
47  ret void
48
49bb6:
50  tail call void @a()
51
52; STATIC:     TAILCALL
53; STATIC-NOT: TAILCALL_MM
54; STATIC-MM:  TAILCALL_MM
55; PIC:        TAILCALLREG
56; PIC-NOT:    TAILCALLREG64
57; PIC64:      TAILCALLREG64
58; MIPS16:     RetRA16
59  ret void
60}
61