1; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefixes=ALL,GP32
2; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefixes=ALL,GP32
3; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
4; RUN:    -check-prefixes=ALL,GP32
5; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
6; RUN:    -check-prefixes=ALL,GP32
7; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
8; RUN:    -check-prefixes=ALL,GP32
9; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
10; RUN:    -check-prefixes=ALL,GP32
11; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
12; RUN:    -check-prefixes=ALL,GP64
13; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
14; RUN:    -check-prefixes=ALL,GP64
15; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
16; RUN:    -check-prefixes=ALL,GP64
17; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
18; RUN:    -check-prefixes=ALL,GP64
19; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
20; RUN:    -check-prefixes=ALL,GP64
21; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
22; RUN:    -check-prefixes=ALL,GP64
23; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
24; RUN:    -check-prefixes=ALL,GP64
25; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
26; RUN:    -check-prefixes=ALL,MM,MM32
27; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
28; RUN:    -check-prefixes=ALL,MM,MM32
29
30define signext i1 @not_i1(i1 signext %a) {
31entry:
32; ALL-LABEL: not_i1:
33
34  ; GP32:         not     $2, $4
35
36  ; GP64:         not     $2, $4
37
38  ; MM:           not16   $2, $4
39
40  %r = xor i1 %a, -1
41  ret i1 %r
42}
43
44define signext i8 @not_i8(i8 signext %a) {
45entry:
46; ALL-LABEL: not_i8:
47
48  ; GP32:         not     $2, $4
49
50  ; GP64:         not     $2, $4
51
52  ; MM:           not16   $2, $4
53
54  %r = xor i8 %a, -1
55  ret i8 %r
56}
57
58define signext i16 @not_i16(i16 signext %a) {
59entry:
60; ALL-LABEL: not_i16:
61
62  ; GP32:         not     $2, $4
63
64  ; GP64:         not     $2, $4
65
66  ; MM:           not16   $2, $4
67
68  %r = xor i16 %a, -1
69  ret i16 %r
70}
71
72define signext i32 @not_i32(i32 signext %a) {
73entry:
74; ALL-LABEL: not_i32:
75
76  ; GP32:         not     $2, $4
77
78  ; GP64:         not     $1, $4
79  ; GP64:         sll     $2, $1, 0
80
81  ; MM:           not16   $2, $4
82
83  %r = xor i32 %a, -1
84  ret i32 %r
85}
86
87define signext i64 @not_i64(i64 signext %a) {
88entry:
89; ALL-LABEL: not_i64:
90
91  ; GP32:         not     $2, $4
92  ; GP32:         not     $3, $5
93
94  ; GP64:         daddiu  $[[T0:[0-9]+]], $zero, -1
95  ; GP64:         xor     $2, $4, $[[T0]]
96
97  ; MM32:         not16   $2, $4
98  ; MM32:         not16   $3, $5
99
100  %r = xor i64 %a, -1
101  ret i64 %r
102}
103
104define signext i128 @not_i128(i128 signext %a) {
105entry:
106; ALL-LABEL: not_i128:
107
108  ; GP32:         not     $2, $4
109  ; GP32:         not     $3, $5
110  ; GP32:         not     $4, $6
111  ; GP32:         not     $5, $7
112
113  ; GP64:         daddiu  $[[T0:[0-9]+]], $zero, -1
114  ; GP64:         xor     $2, $4, $[[T0]]
115  ; GP64:         xor     $3, $5, $[[T0]]
116
117  ; MM32:         not16   $2, $4
118  ; MM32:         not16   $3, $5
119  ; MM32:         not16   $4, $6
120  ; MM32:         not16   $5, $7
121
122  %r = xor i128 %a, -1
123  ret i128 %r
124}
125
126define signext i1 @nor_i1(i1 signext %a, i1 signext %b) {
127entry:
128; ALL-LABEL: nor_i1:
129
130  ; GP32:         nor     $2, $5, $4
131  ; GP64:         or      $1, $5, $4
132  ; MM32:         nor     $2, $5, $4
133
134  %or = or i1 %b, %a
135  %r = xor i1 %or, -1
136  ret i1 %r
137}
138
139define signext i8 @nor_i8(i8 signext %a, i8 signext %b) {
140entry:
141; ALL-LABEL: nor_i8:
142
143  ; GP32:         nor     $2, $5, $4
144  ; GP64:         or      $1, $5, $4
145  ; MM32:         nor     $2, $5, $4
146
147  %or = or i8 %b, %a
148  %r = xor i8 %or, -1
149  ret i8 %r
150}
151
152define signext i16 @nor_i16(i16 signext %a, i16 signext %b) {
153entry:
154; ALL-LABEL: nor_i16:
155
156  ; GP32:         nor     $2, $5, $4
157  ; GP64:         or      $1, $5, $4
158  ; MM32:         nor     $2, $5, $4
159
160  %or = or i16 %b, %a
161  %r = xor i16 %or, -1
162  ret i16 %r
163}
164
165define signext i32 @nor_i32(i32 signext %a, i32 signext %b) {
166entry:
167; ALL-LABEL: nor_i32:
168
169  ; GP32:         nor     $2, $5, $4
170
171  ; GP64:         or      $[[T0:[0-9]+]], $5, $4
172  ; GP64:         sll     $[[T1:[0-9]+]], $[[T0]], 0
173  ; GP64:         not     $[[T2:[0-9]+]], $[[T1]]
174  ; GP64:         sll     $2, $[[T2]], 0
175
176  ; MM32:         nor     $2, $5, $4
177
178  %or = or i32 %b, %a
179  %r = xor i32 %or, -1
180  ret i32 %r
181}
182
183
184define signext i64 @nor_i64(i64 signext %a, i64 signext %b) {
185entry:
186; ALL-LABEL: nor_i64:
187
188  ; GP32:         nor     $2, $6, $4
189  ; GP32:         nor     $3, $7, $5
190
191  ; GP64:         nor     $2, $5, $4
192
193  ; MM32:         nor     $2, $6, $4
194  ; MM32:         nor     $3, $7, $5
195
196  %or = or i64 %b, %a
197  %r = xor i64 %or, -1
198  ret i64 %r
199}
200
201define signext i128 @nor_i128(i128 signext %a, i128 signext %b) {
202entry:
203; ALL-LABEL: nor_i128:
204
205  ; GP32:         lw      $[[T1:[0-9]+]], 20($sp)
206  ; GP32:         lw      $[[T2:[0-9]+]], 16($sp)
207  ; GP32:         nor     $2, $[[T2]], $4
208  ; GP32:         nor     $3, $[[T1]], $5
209  ; GP32:         lw      $[[T0:[0-9]+]], 24($sp)
210  ; GP32:         nor     $4, $[[T0]], $6
211  ; GP32:         lw      $[[T3:[0-9]+]], 28($sp)
212  ; GP32:         nor     $5, $[[T3]], $7
213
214  ; GP64:         nor     $2, $6, $4
215  ; GP64:         nor     $3, $7, $5
216
217  ; MM32:         lw      $[[T1:[0-9]+]], 20($sp)
218  ; MM32:         lw      $[[T2:[0-9]+]], 16($sp)
219  ; MM32:         nor     $2, $[[T2]], $4
220  ; MM32:         nor     $3, $[[T1]], $5
221  ; MM32:         lw      $[[T0:[0-9]+]], 24($sp)
222  ; MM32:         nor     $4, $[[T0]], $6
223  ; MM32:         lw      $[[T3:[0-9]+]], 28($sp)
224  ; MM32:         nor     $5, $[[T3]], $7
225
226  %or = or i128 %b, %a
227  %r = xor i128 %or, -1
228  ret i128 %r
229}
230