1; RUN: llc < %s -march=mips -mcpu=mips32r6 -force-mips-long-branch | FileCheck %s
2
3; Check that when MIPS32R6 with the static relocation model with the usage of
4; long branches, that there is a nop between any compact branch and the static
5; relocation method of expanding branches. Previously, it could result in 'j'
6; following a b(ne|eq)zc, which would raise a reserved instruction exception.
7
8declare i32 @f(i32)
9
10declare i32 @g()
11
12; CHECK-LABEL: test1:
13; CHECK:       bnezc
14; CHECK-NEXT:  nop
15
16define i32 @test1(i32 %a) {
17entry:
18  %0 = icmp eq i32 %a, 0
19  br i1 %0, label %cond.true, label %cond.false
20cond.true:
21  %1 = call i32 @f(i32 %a)
22  ret i32 %1
23cond.false:
24  %2 = call i32 @g()
25  ret i32 %2
26}
27
28; CHECK-LABEL: test2:
29; CHECK:       bgezc
30; CHECK-NEXT:  nop
31
32define i32 @test2(i32 %a) {
33entry:
34  %0 = icmp sge i32 %a, 0
35  br i1 %0, label %cond.true, label %cond.false
36cond.true:
37  %1 = call i32 @f(i32 %a)
38  ret i32 %1
39cond.false:
40  %2 = call i32 @g()
41  ret i32 %2
42}
43
44; CHECK-LABEL: test3:
45; CHECK:       blezc
46; CHECK-NEXT:  nop
47
48define i32 @test3(i32 %a) {
49entry:
50  %0 = icmp sle i32 %a, 0
51  br i1 %0, label %cond.true, label %cond.false
52cond.true:
53  %1 = call i32 @f(i32 %a)
54  ret i32 %1
55cond.false:
56  %2 = call i32 @g()
57  ret i32 %2
58}
59
60; CHECK-LABEL: test4:
61; CHECK:       bgtzc
62; CHECK-NEXT:  nop
63
64define i32 @test4(i32 %a) {
65entry:
66  %0 = icmp sgt i32 %a, 0
67  br i1 %0, label %cond.true, label %cond.false
68cond.true:
69  %1 = call i32 @f(i32 %a)
70  ret i32 %1
71cond.false:
72  %2 = call i32 @g()
73  ret i32 %2
74}
75
76; CHECK-LABEL: test5:
77; CHECK:       bgezc
78; CHECK-NEXT:  nop
79
80define i32 @test5(i32 %a) {
81entry:
82  %0 = icmp slt i32 %a, 0
83  br i1 %0, label %cond.true, label %cond.false
84cond.true:
85  %1 = call i32 @f(i32 %a)
86  ret i32 %1
87cond.false:
88  %2 = call i32 @g()
89  ret i32 %2
90}
91
92; CHECK-LABEL: test6:
93; CHECK:       bnezc
94; CHECK-NEXT:  nop
95
96define i32 @test6(i32 %a, i32 %b) {
97entry:
98  %0 = icmp ugt i32 %a, %b
99  br i1 %0, label %cond.true, label %cond.false
100cond.true:
101  %1 = call i32 @f(i32 %a)
102  ret i32 %1
103cond.false:
104  %2 = call i32 @g()
105  ret i32 %2
106}
107
108; CHECK-LABEL: test7:
109; CHECK:       beqzc
110; CHECK-NEXT:  nop
111
112define i32 @test7(i32 %a, i32 %b) {
113entry:
114  %0 = icmp uge i32 %a, %b
115  br i1 %0, label %cond.true, label %cond.false
116cond.true:
117  %1 = call i32 @f(i32 %a)
118  ret i32 %1
119cond.false:
120  %2 = call i32 @g()
121  ret i32 %2
122}
123
124; CHECK-LABEL: test8:
125; CHECK:       bnezc
126; CHECK-NEXT:  nop
127
128define i32 @test8(i32 %a, i32 %b) {
129entry:
130  %0 = icmp ult i32 %a, %b
131  br i1 %0, label %cond.true, label %cond.false
132cond.true:
133  %1 = call i32 @f(i32 %a)
134  ret i32 %1
135cond.false:
136  %2 = call i32 @g()
137  ret i32 %2
138}
139
140; CHECK-LABEL: test9:
141; CHECK:       beqzc
142; CHECK-NEXT:  nop
143
144define i32 @test9(i32 %a, i32 %b) {
145entry:
146  %0 = icmp ule i32 %a, %b
147  br i1 %0, label %cond.true, label %cond.false
148cond.true:
149  %1 = call i32 @f(i32 %a)
150  ret i32 %1
151cond.false:
152  %2 = call i32 @g()
153  ret i32 %2
154}
155