1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32IFD %s
4
5define double @test(double %a) nounwind {
6; RV32IFD-LABEL: test:
7; RV32IFD:       # %bb.0:
8; RV32IFD-NEXT:    ret
9  ret double %a
10}
11
12; This previously failed complaining of multiple vreg defs due to an ABI
13; lowering issue.
14
15define i32 @main() nounwind {
16; RV32IFD-LABEL: main:
17; RV32IFD:       # %bb.0: # %entry
18; RV32IFD-NEXT:    addi sp, sp, -16
19; RV32IFD-NEXT:    sw ra, 12(sp)
20; RV32IFD-NEXT:    lui a0, %hi(.LCPI1_0)
21; RV32IFD-NEXT:    addi a0, a0, %lo(.LCPI1_0)
22; RV32IFD-NEXT:    fld ft0, 0(a0)
23; RV32IFD-NEXT:    fsd ft0, 0(sp)
24; RV32IFD-NEXT:    lw a0, 0(sp)
25; RV32IFD-NEXT:    lw a1, 4(sp)
26; RV32IFD-NEXT:    call test
27; RV32IFD-NEXT:    lui a2, %hi(.LCPI1_1)
28; RV32IFD-NEXT:    addi a2, a2, %lo(.LCPI1_1)
29; RV32IFD-NEXT:    fld ft1, 0(a2)
30; RV32IFD-NEXT:    sw a0, 0(sp)
31; RV32IFD-NEXT:    sw a1, 4(sp)
32; RV32IFD-NEXT:    fld ft0, 0(sp)
33; RV32IFD-NEXT:    flt.d a0, ft0, ft1
34; RV32IFD-NEXT:    bnez a0, .LBB1_3
35; RV32IFD-NEXT:  # %bb.1: # %entry
36; RV32IFD-NEXT:    lui a0, %hi(.LCPI1_2)
37; RV32IFD-NEXT:    addi a0, a0, %lo(.LCPI1_2)
38; RV32IFD-NEXT:    fld ft1, 0(a0)
39; RV32IFD-NEXT:    flt.d a0, ft1, ft0
40; RV32IFD-NEXT:    xori a0, a0, 1
41; RV32IFD-NEXT:    beqz a0, .LBB1_3
42; RV32IFD-NEXT:  # %bb.2: # %if.end
43; RV32IFD-NEXT:    mv a0, zero
44; RV32IFD-NEXT:    call exit
45; RV32IFD-NEXT:  .LBB1_3: # %if.then
46; RV32IFD-NEXT:    call abort
47entry:
48  %call = call double @test(double 2.000000e+00)
49  %cmp = fcmp olt double %call, 2.400000e-01
50  %cmp2 = fcmp ogt double %call, 2.600000e-01
51  %or.cond = or i1 %cmp, %cmp2
52  br i1 %or.cond, label %if.then, label %if.end
53
54if.then:
55  call void @abort()
56  unreachable
57
58if.end:
59  call void @exit(i32 0)
60  unreachable
61}
62
63declare void @abort()
64
65declare void @exit(i32)
66