1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
3--- |
4
5  define double @test(float %a) {
6  entry:
7    %conv = fpext float %a to double
8    ret double %conv
9  }
10
11...
12---
13name:            test
14alignment:       4
15legalized:       true
16regBankSelected: true
17registers:
18  - { id: 0, class: vecr, preferred-register: '' }
19  - { id: 1, class: vecr, preferred-register: '' }
20  - { id: 2, class: vecr, preferred-register: '' }
21  - { id: 3, class: vecr, preferred-register: '' }
22liveins:
23fixedStack:
24stack:
25constants:
26body:             |
27  bb.1.entry:
28    liveins: $xmm0
29
30    ; ALL-LABEL: name: test
31    ; ALL: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
32    ; ALL: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]]
33    ; ALL: [[CVTSS2SDrr:%[0-9]+]]:fr64 = CVTSS2SDrr [[COPY1]]
34    ; ALL: [[COPY2:%[0-9]+]]:vr128 = COPY [[CVTSS2SDrr]]
35    ; ALL: $xmm0 = COPY [[COPY2]]
36    ; ALL: RET 0, implicit $xmm0
37    %1:vecr(s128) = COPY $xmm0
38    %0:vecr(s32) = G_TRUNC %1(s128)
39    %2:vecr(s64) = G_FPEXT %0(s32)
40    %3:vecr(s128) = G_ANYEXT %2(s64)
41    $xmm0 = COPY %3(s128)
42    RET 0, implicit $xmm0
43
44...
45