1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4target triple = "x86_64-unknown-linux-gnu"
5
6declare void @llvm.assume(i1) #1
7
8define i32 @test1(i32 %a) #0 {
9; CHECK-LABEL: @test1(
10; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 15
11; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], 5
12; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
13; CHECK-NEXT:    ret i32 5
14;
15  %and = and i32 %a, 15
16  %cmp = icmp eq i32 %and, 5
17  tail call void @llvm.assume(i1 %cmp)
18  %and1 = and i32 %a, 7
19  ret i32 %and1
20}
21
22define i32 @test2(i32 %a) #0 {
23; CHECK-LABEL: @test2(
24; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 15
25; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], 10
26; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
27; CHECK-NEXT:    ret i32 2
28;
29  %and = and i32 %a, 15
30  %nand = xor i32 %and, -1
31  %cmp = icmp eq i32 %nand, 4294967285
32  tail call void @llvm.assume(i1 %cmp)
33  %and1 = and i32 %a, 7
34  ret i32 %and1
35}
36
37define i32 @test3(i32 %a) #0 {
38; CHECK-LABEL: @test3(
39; CHECK-NEXT:    [[V:%.*]] = or i32 [[A:%.*]], -16
40; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V]], -11
41; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
42; CHECK-NEXT:    ret i32 5
43;
44  %v = or i32 %a, 4294967280
45  %cmp = icmp eq i32 %v, 4294967285
46  tail call void @llvm.assume(i1 %cmp)
47  %and1 = and i32 %a, 7
48  ret i32 %and1
49}
50
51define i32 @test4(i32 %a) #0 {
52; CHECK-LABEL: @test4(
53; CHECK-NEXT:    [[V:%.*]] = or i32 [[A:%.*]], -16
54; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V]], -6
55; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
56; CHECK-NEXT:    ret i32 2
57;
58  %v = or i32 %a, 4294967280
59  %nv = xor i32 %v, -1
60  %cmp = icmp eq i32 %nv, 5
61  tail call void @llvm.assume(i1 %cmp)
62  %and1 = and i32 %a, 7
63  ret i32 %and1
64}
65
66define i32 @test5(i32 %a) #0 {
67; CHECK-LABEL: @test5(
68; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 4
69; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
70; CHECK-NEXT:    ret i32 4
71;
72  %v = xor i32 %a, 1
73  %cmp = icmp eq i32 %v, 5
74  tail call void @llvm.assume(i1 %cmp)
75  %and1 = and i32 %a, 7
76  ret i32 %and1
77}
78
79define i32 @test6(i32 %a) #0 {
80; CHECK-LABEL: @test6(
81; CHECK-NEXT:    [[V_MASK:%.*]] = and i32 [[A:%.*]], 1073741823
82; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 5
83; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
84; CHECK-NEXT:    ret i32 5
85;
86  %v = shl i32 %a, 2
87  %cmp = icmp eq i32 %v, 20
88  tail call void @llvm.assume(i1 %cmp)
89  %and1 = and i32 %a, 63
90  ret i32 %and1
91}
92
93define i32 @test7(i32 %a) #0 {
94; CHECK-LABEL: @test7(
95; CHECK-NEXT:    [[V_MASK:%.*]] = and i32 [[A:%.*]], -4
96; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 20
97; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
98; CHECK-NEXT:    ret i32 20
99;
100  %v = lshr i32 %a, 2
101  %cmp = icmp eq i32 %v, 5
102  tail call void @llvm.assume(i1 %cmp)
103  %and1 = and i32 %a, 252
104  ret i32 %and1
105}
106
107define i32 @test8(i32 %a) #0 {
108; CHECK-LABEL: @test8(
109; CHECK-NEXT:    [[V_MASK:%.*]] = and i32 [[A:%.*]], -4
110; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 20
111; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
112; CHECK-NEXT:    ret i32 20
113;
114  %v = lshr i32 %a, 2
115  %cmp = icmp eq i32 %v, 5
116  tail call void @llvm.assume(i1 %cmp)
117  %and1 = and i32 %a, 252
118  ret i32 %and1
119}
120
121define i32 @test9(i32 %a) #0 {
122; CHECK-LABEL: @test9(
123; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
124; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
125; CHECK-NEXT:    ret i32 0
126;
127  %cmp = icmp sgt i32 %a, 5
128  tail call void @llvm.assume(i1 %cmp)
129  %and1 = and i32 %a, 2147483648
130  ret i32 %and1
131}
132
133define i32 @test10(i32 %a) #0 {
134; CHECK-LABEL: @test10(
135; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A:%.*]], -1
136; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
137; CHECK-NEXT:    ret i32 -2147483648
138;
139  %cmp = icmp sle i32 %a, -2
140  tail call void @llvm.assume(i1 %cmp)
141  %and1 = and i32 %a, 2147483648
142  ret i32 %and1
143}
144
145define i32 @test11(i32 %a) #0 {
146; CHECK-LABEL: @test11(
147; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 257
148; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
149; CHECK-NEXT:    ret i32 0
150;
151  %cmp = icmp ule i32 %a, 256
152  tail call void @llvm.assume(i1 %cmp)
153  %and1 = and i32 %a, 3072
154  ret i32 %and1
155}
156
157attributes #0 = { nounwind uwtable }
158attributes #1 = { nounwind }
159
160