1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4; PR1822
5
6target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64"
7
8define i32 @test1(i32 %A, i32 %B) {
9; CHECK-LABEL: @test1(
10; CHECK-NEXT:    ret i32 [[B:%.*]]
11;
12  %C = select i1 false, i32 %A, i32 %B
13  ret i32 %C
14}
15
16define i32 @test2(i32 %A, i32 %B) {
17; CHECK-LABEL: @test2(
18; CHECK-NEXT:    ret i32 [[A:%.*]]
19;
20  %C = select i1 true, i32 %A, i32 %B
21  ret i32 %C
22}
23
24
25define i32 @test3(i1 %C, i32 %I) {
26; CHECK-LABEL: @test3(
27; CHECK-NEXT:    ret i32 [[I:%.*]]
28;
29  %V = select i1 %C, i32 %I, i32 %I
30  ret i32 %V
31}
32
33define i1 @test4(i1 %C) {
34; CHECK-LABEL: @test4(
35; CHECK-NEXT:    ret i1 [[C:%.*]]
36;
37  %V = select i1 %C, i1 true, i1 false
38  ret i1 %V
39}
40
41define i1 @test5(i1 %C) {
42; CHECK-LABEL: @test5(
43; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
44; CHECK-NEXT:    ret i1 [[NOT_C]]
45;
46  %V = select i1 %C, i1 false, i1 true
47  ret i1 %V
48}
49
50define i32 @test6(i1 %C) {
51; CHECK-LABEL: @test6(
52; CHECK-NEXT:    [[V:%.*]] = zext i1 [[C:%.*]] to i32
53; CHECK-NEXT:    ret i32 [[V]]
54;
55  %V = select i1 %C, i32 1, i32 0
56  ret i32 %V
57}
58
59define i1 @trueval_is_true(i1 %C, i1 %X) {
60; CHECK-LABEL: @trueval_is_true(
61; CHECK-NEXT:    [[R:%.*]] = or i1 [[C:%.*]], [[X:%.*]]
62; CHECK-NEXT:    ret i1 [[R]]
63;
64  %R = select i1 %C, i1 true, i1 %X
65  ret i1 %R
66}
67
68define <2 x i1> @trueval_is_true_vec(<2 x i1> %C, <2 x i1> %X) {
69; CHECK-LABEL: @trueval_is_true_vec(
70; CHECK-NEXT:    [[R:%.*]] = or <2 x i1> [[C:%.*]], [[X:%.*]]
71; CHECK-NEXT:    ret <2 x i1> [[R]]
72;
73  %R = select <2 x i1> %C, <2 x i1> <i1 true, i1 true>, <2 x i1> %X
74  ret <2 x i1> %R
75}
76
77define <2 x i1> @trueval_is_true_vec_undef_elt(<2 x i1> %C, <2 x i1> %X) {
78; CHECK-LABEL: @trueval_is_true_vec_undef_elt(
79; CHECK-NEXT:    [[R:%.*]] = or <2 x i1> [[C:%.*]], [[X:%.*]]
80; CHECK-NEXT:    ret <2 x i1> [[R]]
81;
82  %R = select <2 x i1> %C, <2 x i1> <i1 undef, i1 true>, <2 x i1> %X
83  ret <2 x i1> %R
84}
85
86define i1 @test8(i1 %C, i1 %X) {
87; CHECK-LABEL: @test8(
88; CHECK-NEXT:    [[R:%.*]] = and i1 [[C:%.*]], [[X:%.*]]
89; CHECK-NEXT:    ret i1 [[R]]
90;
91  %R = select i1 %C, i1 %X, i1 false
92  ret i1 %R
93}
94
95define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) {
96; CHECK-LABEL: @test8vec(
97; CHECK-NEXT:    [[R:%.*]] = and <2 x i1> [[C:%.*]], [[X:%.*]]
98; CHECK-NEXT:    ret <2 x i1> [[R]]
99;
100  %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false>
101  ret <2 x i1> %R
102}
103
104define i1 @test9(i1 %C, i1 %X) {
105; CHECK-LABEL: @test9(
106; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
107; CHECK-NEXT:    [[R:%.*]] = and i1 [[NOT_C]], [[X:%.*]]
108; CHECK-NEXT:    ret i1 [[R]]
109;
110  %R = select i1 %C, i1 false, i1 %X
111  ret i1 %R
112}
113
114define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) {
115; CHECK-LABEL: @test9vec(
116; CHECK-NEXT:    [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
117; CHECK-NEXT:    [[R:%.*]] = and <2 x i1> [[NOT_C]], [[X:%.*]]
118; CHECK-NEXT:    ret <2 x i1> [[R]]
119;
120  %R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X
121  ret <2 x i1> %R
122}
123
124define i1 @test10(i1 %C, i1 %X) {
125; CHECK-LABEL: @test10(
126; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
127; CHECK-NEXT:    [[R:%.*]] = or i1 [[NOT_C]], [[X:%.*]]
128; CHECK-NEXT:    ret i1 [[R]]
129;
130  %R = select i1 %C, i1 %X, i1 true
131  ret i1 %R
132}
133
134define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) {
135; CHECK-LABEL: @test10vec(
136; CHECK-NEXT:    [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
137; CHECK-NEXT:    [[R:%.*]] = or <2 x i1> [[NOT_C]], [[X:%.*]]
138; CHECK-NEXT:    ret <2 x i1> [[R]]
139;
140  %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true>
141  ret <2 x i1> %R
142}
143
144define i1 @test23(i1 %a, i1 %b) {
145; CHECK-LABEL: @test23(
146; CHECK-NEXT:    [[C:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
147; CHECK-NEXT:    ret i1 [[C]]
148;
149  %c = select i1 %a, i1 %b, i1 %a
150  ret i1 %c
151}
152
153define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) {
154; CHECK-LABEL: @test23vec(
155; CHECK-NEXT:    [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]
156; CHECK-NEXT:    ret <2 x i1> [[C]]
157;
158  %c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a
159  ret <2 x i1> %c
160}
161
162define i1 @test24(i1 %a, i1 %b) {
163; CHECK-LABEL: @test24(
164; CHECK-NEXT:    [[C:%.*]] = or i1 [[A:%.*]], [[B:%.*]]
165; CHECK-NEXT:    ret i1 [[C]]
166;
167  %c = select i1 %a, i1 %a, i1 %b
168  ret i1 %c
169}
170
171define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) {
172; CHECK-LABEL: @test24vec(
173; CHECK-NEXT:    [[C:%.*]] = or <2 x i1> [[A:%.*]], [[B:%.*]]
174; CHECK-NEXT:    ret <2 x i1> [[C]]
175;
176  %c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b
177  ret <2 x i1> %c
178}
179
180define i1 @test62(i1 %A, i1 %B) {
181; CHECK-LABEL: @test62(
182; CHECK-NEXT:    [[NOT:%.*]] = xor i1 [[A:%.*]], true
183; CHECK-NEXT:    [[C:%.*]] = and i1 [[NOT]], [[B:%.*]]
184; CHECK-NEXT:    ret i1 [[C]]
185;
186  %not = xor i1 %A, true
187  %C = select i1 %A, i1 %not, i1 %B
188  ret i1 %C
189}
190
191define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) {
192; CHECK-LABEL: @test62vec(
193; CHECK-NEXT:    [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
194; CHECK-NEXT:    [[C:%.*]] = and <2 x i1> [[NOT]], [[B:%.*]]
195; CHECK-NEXT:    ret <2 x i1> [[C]]
196;
197  %not = xor <2 x i1> %A, <i1 true, i1 true>
198  %C = select <2 x i1> %A, <2 x i1> %not, <2 x i1> %B
199  ret <2 x i1> %C
200}
201
202define i1 @test63(i1 %A, i1 %B) {
203; CHECK-LABEL: @test63(
204; CHECK-NEXT:    [[NOT:%.*]] = xor i1 [[A:%.*]], true
205; CHECK-NEXT:    [[C:%.*]] = or i1 [[NOT]], [[B:%.*]]
206; CHECK-NEXT:    ret i1 [[C]]
207;
208  %not = xor i1 %A, true
209  %C = select i1 %A, i1 %B, i1 %not
210  ret i1 %C
211}
212
213define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) {
214; CHECK-LABEL: @test63vec(
215; CHECK-NEXT:    [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
216; CHECK-NEXT:    [[C:%.*]] = or <2 x i1> [[NOT]], [[B:%.*]]
217; CHECK-NEXT:    ret <2 x i1> [[C]]
218;
219  %not = xor <2 x i1> %A, <i1 true, i1 true>
220  %C = select <2 x i1> %A, <2 x i1> %B, <2 x i1> %not
221  ret <2 x i1> %C
222}
223
224define i32 @test11(i32 %a) {
225; CHECK-LABEL: @test11(
226; CHECK-NEXT:    [[C:%.*]] = icmp ne i32 [[A:%.*]], 0
227; CHECK-NEXT:    [[R:%.*]] = zext i1 [[C]] to i32
228; CHECK-NEXT:    ret i32 [[R]]
229;
230  %C = icmp eq i32 %a, 0
231  %R = select i1 %C, i32 0, i32 1
232  ret i32 %R
233}
234
235define i32 @test12(i1 %cond, i32 %a) {
236; CHECK-LABEL: @test12(
237; CHECK-NEXT:    [[B:%.*]] = zext i1 [[COND:%.*]] to i32
238; CHECK-NEXT:    [[C:%.*]] = or i32 [[B]], [[A:%.*]]
239; CHECK-NEXT:    ret i32 [[C]]
240;
241  %b = or i32 %a, 1
242  %c = select i1 %cond, i32 %b, i32 %a
243  ret i32 %c
244}
245
246define <2 x i32> @test12vec(<2 x i1> %cond, <2 x i32> %a) {
247; CHECK-LABEL: @test12vec(
248; CHECK-NEXT:    [[B:%.*]] = zext <2 x i1> [[COND:%.*]] to <2 x i32>
249; CHECK-NEXT:    [[C:%.*]] = or <2 x i32> [[B]], [[A:%.*]]
250; CHECK-NEXT:    ret <2 x i32> [[C]]
251;
252  %b = or <2 x i32> %a, <i32 1, i32 1>
253  %c = select <2 x i1> %cond, <2 x i32> %b, <2 x i32> %a
254  ret <2 x i32> %c
255}
256
257define i32 @test12a(i1 %cond, i32 %a) {
258; CHECK-LABEL: @test12a(
259; CHECK-NEXT:    [[B:%.*]] = zext i1 [[COND:%.*]] to i32
260; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[A:%.*]], [[B]]
261; CHECK-NEXT:    ret i32 [[C]]
262;
263  %b = ashr i32 %a, 1
264  %c = select i1 %cond, i32 %b, i32 %a
265  ret i32 %c
266}
267
268define <2 x i32> @test12avec(<2 x i1> %cond, <2 x i32> %a) {
269; CHECK-LABEL: @test12avec(
270; CHECK-NEXT:    [[B:%.*]] = zext <2 x i1> [[COND:%.*]] to <2 x i32>
271; CHECK-NEXT:    [[C:%.*]] = ashr <2 x i32> [[A:%.*]], [[B]]
272; CHECK-NEXT:    ret <2 x i32> [[C]]
273;
274  %b = ashr <2 x i32> %a, <i32 1, i32 1>
275  %c = select <2 x i1> %cond, <2 x i32> %b, <2 x i32> %a
276  ret <2 x i32> %c
277}
278
279define i32 @test12b(i1 %cond, i32 %a) {
280; CHECK-LABEL: @test12b(
281; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
282; CHECK-NEXT:    [[B:%.*]] = zext i1 [[NOT_COND]] to i32
283; CHECK-NEXT:    [[D:%.*]] = ashr i32 [[A:%.*]], [[B]]
284; CHECK-NEXT:    ret i32 [[D]]
285;
286  %b = ashr i32 %a, 1
287  %d = select i1 %cond, i32 %a, i32 %b
288  ret i32 %d
289}
290
291define <2 x i32> @test12bvec(<2 x i1> %cond, <2 x i32> %a) {
292; CHECK-LABEL: @test12bvec(
293; CHECK-NEXT:    [[NOT_COND:%.*]] = xor <2 x i1> [[COND:%.*]], <i1 true, i1 true>
294; CHECK-NEXT:    [[B:%.*]] = zext <2 x i1> [[NOT_COND]] to <2 x i32>
295; CHECK-NEXT:    [[D:%.*]] = ashr <2 x i32> [[A:%.*]], [[B]]
296; CHECK-NEXT:    ret <2 x i32> [[D]]
297;
298  %b = ashr <2 x i32> %a, <i32 1, i32 1>
299  %d = select <2 x i1> %cond, <2 x i32> %a, <2 x i32> %b
300  ret <2 x i32> %d
301}
302
303define i32 @test13(i32 %a, i32 %b) {
304; CHECK-LABEL: @test13(
305; CHECK-NEXT:    ret i32 [[B:%.*]]
306;
307  %C = icmp eq i32 %a, %b
308  %V = select i1 %C, i32 %a, i32 %b
309  ret i32 %V
310}
311
312define i32 @test13a(i32 %a, i32 %b) {
313; CHECK-LABEL: @test13a(
314; CHECK-NEXT:    ret i32 [[A:%.*]]
315;
316  %C = icmp ne i32 %a, %b
317  %V = select i1 %C, i32 %a, i32 %b
318  ret i32 %V
319}
320
321define i32 @test13b(i32 %a, i32 %b) {
322; CHECK-LABEL: @test13b(
323; CHECK-NEXT:    ret i32 [[A:%.*]]
324;
325  %C = icmp eq i32 %a, %b
326  %V = select i1 %C, i32 %b, i32 %a
327  ret i32 %V
328}
329
330define i1 @test14a(i1 %C, i32 %X) {
331; CHECK-LABEL: @test14a(
332; CHECK-NEXT:    [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
333; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
334; CHECK-NEXT:    [[R:%.*]] = or i1 [[R1]], [[NOT_C]]
335; CHECK-NEXT:    ret i1 [[R]]
336;
337  %V = select i1 %C, i32 %X, i32 0
338  ; (X < 1) | !C
339  %R = icmp slt i32 %V, 1
340  ret i1 %R
341}
342
343define i1 @test14b(i1 %C, i32 %X) {
344; CHECK-LABEL: @test14b(
345; CHECK-NEXT:    [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
346; CHECK-NEXT:    [[R:%.*]] = or i1 [[R1]], [[C:%.*]]
347; CHECK-NEXT:    ret i1 [[R]]
348;
349  %V = select i1 %C, i32 0, i32 %X
350  ; (X < 1) | C
351  %R = icmp slt i32 %V, 1
352  ret i1 %R
353}
354
355define i32 @test16(i1 %C, i32* %P) {
356; CHECK-LABEL: @test16(
357; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
358; CHECK-NEXT:    ret i32 [[V]]
359;
360  %P2 = select i1 %C, i32* %P, i32* null
361  %V = load i32, i32* %P2
362  ret i32 %V
363}
364
365;; It may be legal to load from a null address in a non-zero address space
366define i32 @test16_neg(i1 %C, i32 addrspace(1)* %P) {
367; CHECK-LABEL: @test16_neg(
368; CHECK-NEXT:    [[P2:%.*]] = select i1 [[C:%.*]], i32 addrspace(1)* [[P:%.*]], i32 addrspace(1)* null
369; CHECK-NEXT:    [[V:%.*]] = load i32, i32 addrspace(1)* [[P2]], align 4
370; CHECK-NEXT:    ret i32 [[V]]
371;
372  %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null
373  %V = load i32, i32 addrspace(1)* %P2
374  ret i32 %V
375}
376
377define i32 @test16_neg2(i1 %C, i32 addrspace(1)* %P) {
378; CHECK-LABEL: @test16_neg2(
379; CHECK-NEXT:    [[P2:%.*]] = select i1 [[C:%.*]], i32 addrspace(1)* null, i32 addrspace(1)* [[P:%.*]]
380; CHECK-NEXT:    [[V:%.*]] = load i32, i32 addrspace(1)* [[P2]], align 4
381; CHECK-NEXT:    ret i32 [[V]]
382;
383  %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P
384  %V = load i32, i32 addrspace(1)* %P2
385  ret i32 %V
386}
387
388;; It may be legal to load from a null address with null pointer valid attribute.
389define i32 @test16_no_null_opt(i1 %C, i32* %P) #0 {
390; CHECK-LABEL: @test16_no_null_opt(
391; CHECK-NEXT:    [[P2:%.*]] = select i1 [[C:%.*]], i32* [[P:%.*]], i32* null
392; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P2]], align 4
393; CHECK-NEXT:    ret i32 [[V]]
394;
395  %P2 = select i1 %C, i32* %P, i32* null
396  %V = load i32, i32* %P2
397  ret i32 %V
398}
399
400define i32 @test16_no_null_opt_2(i1 %C, i32* %P) #0 {
401; CHECK-LABEL: @test16_no_null_opt_2(
402; CHECK-NEXT:    [[P2:%.*]] = select i1 [[C:%.*]], i32* null, i32* [[P:%.*]]
403; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P2]], align 4
404; CHECK-NEXT:    ret i32 [[V]]
405;
406  %P2 = select i1 %C, i32* null, i32* %P
407  %V = load i32, i32* %P2
408  ret i32 %V
409}
410
411attributes #0 = { "null-pointer-is-valid"="true" }
412
413define i1 @test17(i32* %X, i1 %C) {
414; CHECK-LABEL: @test17(
415; CHECK-NEXT:    [[RV1:%.*]] = icmp eq i32* [[X:%.*]], null
416; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
417; CHECK-NEXT:    [[RV:%.*]] = or i1 [[RV1]], [[NOT_C]]
418; CHECK-NEXT:    ret i1 [[RV]]
419;
420  %R = select i1 %C, i32* %X, i32* null
421  %RV = icmp eq i32* %R, null
422  ret i1 %RV
423}
424
425define i32 @test18(i32 %X, i32 %Y, i1 %C) {
426; CHECK-LABEL: @test18(
427; CHECK-NEXT:    [[V:%.*]] = sdiv i32 [[Y:%.*]], [[X:%.*]]
428; CHECK-NEXT:    ret i32 [[V]]
429;
430  %R = select i1 %C, i32 %X, i32 0
431  %V = sdiv i32 %Y, %R
432  ret i32 %V
433}
434
435define i32 @test19(i32 %x) {
436; CHECK-LABEL: @test19(
437; CHECK-NEXT:    [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
438; CHECK-NEXT:    ret i32 [[X_LOBIT]]
439;
440  %tmp = icmp ugt i32 %x, 2147483647
441  %retval = select i1 %tmp, i32 -1, i32 0
442  ret i32 %retval
443}
444
445define i32 @test20(i32 %x) {
446; CHECK-LABEL: @test20(
447; CHECK-NEXT:    [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
448; CHECK-NEXT:    ret i32 [[X_LOBIT]]
449;
450  %tmp = icmp slt i32 %x, 0
451  %retval = select i1 %tmp, i32 -1, i32 0
452  ret i32 %retval
453}
454
455define i64 @test21(i32 %x) {
456; CHECK-LABEL: @test21(
457; CHECK-NEXT:    [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
458; CHECK-NEXT:    [[TMP1:%.*]] = sext i32 [[X_LOBIT]] to i64
459; CHECK-NEXT:    ret i64 [[TMP1]]
460;
461  %tmp = icmp slt i32 %x, 0
462  %retval = select i1 %tmp, i64 -1, i64 0
463  ret i64 %retval
464}
465
466define i16 @test22(i32 %x) {
467; CHECK-LABEL: @test22(
468; CHECK-NEXT:    [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
469; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[X_LOBIT]] to i16
470; CHECK-NEXT:    ret i16 [[TMP1]]
471;
472  %tmp = icmp slt i32 %x, 0
473  %retval = select i1 %tmp, i16 -1, i16 0
474  ret i16 %retval
475}
476
477define i32 @test25(i1 %c)  {
478; CHECK-LABEL: @test25(
479; CHECK-NEXT:  entry:
480; CHECK-NEXT:    br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
481; CHECK:       jump:
482; CHECK-NEXT:    br label [[RET]]
483; CHECK:       ret:
484; CHECK-NEXT:    [[A:%.*]] = phi i32 [ 10, [[JUMP]] ], [ 20, [[ENTRY:%.*]] ]
485; CHECK-NEXT:    ret i32 [[A]]
486;
487entry:
488  br i1 %c, label %jump, label %ret
489jump:
490  br label %ret
491ret:
492  %a = phi i1 [true, %jump], [false, %entry]
493  %b = select i1 %a, i32 10, i32 20
494  ret i32 %b
495}
496
497define i32 @test26(i1 %cond)  {
498; CHECK-LABEL: @test26(
499; CHECK-NEXT:  entry:
500; CHECK-NEXT:    br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
501; CHECK:       jump:
502; CHECK-NEXT:    br label [[RET]]
503; CHECK:       ret:
504; CHECK-NEXT:    [[A:%.*]] = phi i32 [ 20, [[ENTRY:%.*]] ], [ 10, [[JUMP]] ]
505; CHECK-NEXT:    ret i32 [[A]]
506;
507entry:
508  br i1 %cond, label %jump, label %ret
509jump:
510  %c = or i1 false, false
511  br label %ret
512ret:
513  %a = phi i1 [true, %entry], [%c, %jump]
514  %b = select i1 %a, i32 20, i32 10
515  ret i32 %b
516}
517
518define i32 @test27(i1 %c, i32 %A, i32 %B)  {
519; CHECK-LABEL: @test27(
520; CHECK-NEXT:  entry:
521; CHECK-NEXT:    br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
522; CHECK:       jump:
523; CHECK-NEXT:    br label [[RET]]
524; CHECK:       ret:
525; CHECK-NEXT:    [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
526; CHECK-NEXT:    ret i32 [[P]]
527;
528entry:
529  br i1 %c, label %jump, label %ret
530jump:
531  br label %ret
532ret:
533  %p = phi i1 [true, %jump], [false, %entry]
534  %s = select i1 %p, i32 %A, i32 %B
535  ret i32 %s
536}
537
538define i32 @test28(i1 %cond, i32 %A, i32 %B)  {
539; CHECK-LABEL: @test28(
540; CHECK-NEXT:  entry:
541; CHECK-NEXT:    br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
542; CHECK:       jump:
543; CHECK-NEXT:    br label [[RET]]
544; CHECK:       ret:
545; CHECK-NEXT:    [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
546; CHECK-NEXT:    ret i32 [[P]]
547;
548entry:
549  br i1 %cond, label %jump, label %ret
550jump:
551  br label %ret
552ret:
553  %c = phi i32 [%A, %jump], [%B, %entry]
554  %p = phi i1 [true, %jump], [false, %entry]
555  %s = select i1 %p, i32 %A, i32 %c
556  ret i32 %s
557}
558
559define i32 @test29(i1 %cond, i32 %A, i32 %B)  {
560; CHECK-LABEL: @test29(
561; CHECK-NEXT:  entry:
562; CHECK-NEXT:    br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
563; CHECK:       jump:
564; CHECK-NEXT:    br label [[RET]]
565; CHECK:       ret:
566; CHECK-NEXT:    [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
567; CHECK-NEXT:    br label [[NEXT:%.*]]
568; CHECK:       next:
569; CHECK-NEXT:    ret i32 [[P]]
570;
571entry:
572  br i1 %cond, label %jump, label %ret
573jump:
574  br label %ret
575ret:
576  %c = phi i32 [%A, %jump], [%B, %entry]
577  %p = phi i1 [true, %jump], [false, %entry]
578  br label %next
579
580next:
581  %s = select i1 %p, i32 %A, i32 %c
582  ret i32 %s
583}
584
585; SMAX(SMAX(x, y), x) -> SMAX(x, y)
586define i32 @test30(i32 %x, i32 %y) {
587; CHECK-LABEL: @test30(
588; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
589; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
590; CHECK-NEXT:    ret i32 [[COND]]
591;
592  %cmp = icmp sgt i32 %x, %y
593  %cond = select i1 %cmp, i32 %x, i32 %y
594  %cmp5 = icmp sgt i32 %cond, %x
595  %retval = select i1 %cmp5, i32 %cond, i32 %x
596  ret i32 %retval
597}
598
599; UMAX(UMAX(x, y), x) -> UMAX(x, y)
600define i32 @test31(i32 %x, i32 %y) {
601; CHECK-LABEL: @test31(
602; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
603; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
604; CHECK-NEXT:    ret i32 [[COND]]
605;
606  %cmp = icmp ugt i32 %x, %y
607  %cond = select i1 %cmp, i32 %x, i32 %y
608  %cmp5 = icmp ugt i32 %cond, %x
609  %retval = select i1 %cmp5, i32 %cond, i32 %x
610  ret i32 %retval
611}
612
613; SMIN(SMIN(x, y), x) -> SMIN(x, y)
614define i32 @test32(i32 %x, i32 %y) {
615; CHECK-LABEL: @test32(
616; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
617; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[X]]
618; CHECK-NEXT:    ret i32 [[COND]]
619;
620  %cmp = icmp sgt i32 %x, %y
621  %cond = select i1 %cmp, i32 %y, i32 %x
622  %cmp5 = icmp sgt i32 %cond, %x
623  %retval = select i1 %cmp5, i32 %x, i32 %cond
624  ret i32 %retval
625}
626
627; MAX(MIN(x, y), x) -> x
628define i32 @test33(i32 %x, i32 %y) {
629; CHECK-LABEL: @test33(
630; CHECK-NEXT:    ret i32 [[X:%.*]]
631;
632  %cmp = icmp sgt i32 %x, %y
633  %cond = select i1 %cmp, i32 %y, i32 %x
634  %cmp5 = icmp sgt i32 %cond, %x
635  %retval = select i1 %cmp5, i32 %cond, i32 %x
636  ret i32 %retval
637}
638
639; MIN(MAX(x, y), x) -> x
640define i32 @test34(i32 %x, i32 %y) {
641; CHECK-LABEL: @test34(
642; CHECK-NEXT:    ret i32 [[X:%.*]]
643;
644  %cmp = icmp sgt i32 %x, %y
645  %cond = select i1 %cmp, i32 %x, i32 %y
646  %cmp5 = icmp sgt i32 %cond, %x
647  %retval = select i1 %cmp5, i32 %x, i32 %cond
648  ret i32 %retval
649}
650
651define i1 @test38(i1 %cond) {
652; CHECK-LABEL: @test38(
653; CHECK-NEXT:    ret i1 false
654;
655  %zero = alloca i32
656  %one = alloca i32
657  %ptr = select i1 %cond, i32* %zero, i32* %one
658  %isnull = icmp eq i32* %ptr, null
659  ret i1 %isnull
660}
661
662define i1 @test39(i1 %cond, double %x) {
663; CHECK-LABEL: @test39(
664; CHECK-NEXT:    ret i1 true
665;
666  %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty
667  %cmp = fcmp ule double %x, %s
668  ret i1 %cmp
669}
670
671define i1 @test40(i1 %cond) {
672; CHECK-LABEL: @test40(
673; CHECK-NEXT:    ret i1 false
674;
675  %a = alloca i32
676  %b = alloca i32
677  %c = alloca i32
678  %s = select i1 %cond, i32* %a, i32* %b
679  %r = icmp eq i32* %s, %c
680  ret i1 %r
681}
682
683define i32 @test41(i1 %cond, i32 %x, i32 %y) {
684; CHECK-LABEL: @test41(
685; CHECK-NEXT:    [[R:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
686; CHECK-NEXT:    ret i32 [[R]]
687;
688  %z = and i32 %x, %y
689  %s = select i1 %cond, i32 %y, i32 %z
690  %r = and i32 %x, %s
691  ret i32 %r
692}
693
694define i32 @test42(i32 %x, i32 %y) {
695; CHECK-LABEL: @test42(
696; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[X:%.*]], 0
697; CHECK-NEXT:    [[B:%.*]] = sext i1 [[COND]] to i32
698; CHECK-NEXT:    [[C:%.*]] = add i32 [[B]], [[Y:%.*]]
699; CHECK-NEXT:    ret i32 [[C]]
700;
701  %b = add i32 %y, -1
702  %cond = icmp eq i32 %x, 0
703  %c = select i1 %cond, i32 %b, i32 %y
704  ret i32 %c
705}
706
707define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) {
708; CHECK-LABEL: @test42vec(
709; CHECK-NEXT:    [[COND:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer
710; CHECK-NEXT:    [[B:%.*]] = sext <2 x i1> [[COND]] to <2 x i32>
711; CHECK-NEXT:    [[C:%.*]] = add <2 x i32> [[B]], [[Y:%.*]]
712; CHECK-NEXT:    ret <2 x i32> [[C]]
713;
714  %b = add <2 x i32> %y, <i32 -1, i32 -1>
715  %cond = icmp eq <2 x i32> %x, zeroinitializer
716  %c = select <2 x i1> %cond, <2 x i32> %b, <2 x i32> %y
717  ret <2 x i32> %c
718}
719
720; PR8994
721
722; This select instruction can't be eliminated because trying to do so would
723; change the number of vector elements. This used to assert.
724define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
725; CHECK-LABEL: @test51(
726; CHECK-NEXT:    [[SELECT:%.*]] = select <3 x i1> [[ICMP:%.*]], <3 x i16> zeroinitializer, <3 x i16> [[TMP:%.*]]
727; CHECK-NEXT:    [[TMP2:%.*]] = bitcast <3 x i16> [[SELECT]] to i48
728; CHECK-NEXT:    ret i48 [[TMP2]]
729;
730  %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
731  %tmp2 = bitcast <3 x i16> %select to i48
732  ret i48 %tmp2
733}
734
735; Allow select promotion even if there are multiple uses of bitcasted ops.
736; Hoisting the selects allows later pattern matching to see that these are min/max ops.
737
738define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) {
739; CHECK-LABEL: @min_max_bitcast(
740; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
741; CHECK-NEXT:    [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]]
742; CHECK-NEXT:    [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]]
743; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32>* [[PTR1:%.*]] to <4 x float>*
744; CHECK-NEXT:    store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16
745; CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x i32>* [[PTR2:%.*]] to <4 x float>*
746; CHECK-NEXT:    store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16
747; CHECK-NEXT:    ret void
748;
749  %cmp = fcmp olt <4 x float> %a, %b
750  %bc1 = bitcast <4 x float> %a to <4 x i32>
751  %bc2 = bitcast <4 x float> %b to <4 x i32>
752  %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
753  %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
754  store <4 x i32> %sel1, <4 x i32>* %ptr1
755  store <4 x i32> %sel2, <4 x i32>* %ptr2
756  ret void
757}
758
759; To avoid potential backend problems, we don't do the same transform for other casts.
760
761define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> %a, <4 x i64> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) {
762; CHECK-LABEL: @truncs_before_selects(
763; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt <4 x float> [[F1:%.*]], [[F2:%.*]]
764; CHECK-NEXT:    [[BC1:%.*]] = trunc <4 x i64> [[A:%.*]] to <4 x i32>
765; CHECK-NEXT:    [[BC2:%.*]] = trunc <4 x i64> [[B:%.*]] to <4 x i32>
766; CHECK-NEXT:    [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]]
767; CHECK-NEXT:    [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]]
768; CHECK-NEXT:    store <4 x i32> [[SEL1]], <4 x i32>* [[PTR1:%.*]], align 16
769; CHECK-NEXT:    store <4 x i32> [[SEL2]], <4 x i32>* [[PTR2:%.*]], align 16
770; CHECK-NEXT:    ret void
771;
772  %cmp = fcmp olt <4 x float> %f1, %f2
773  %bc1 = trunc <4 x i64> %a to <4 x i32>
774  %bc2 = trunc <4 x i64> %b to <4 x i32>
775  %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
776  %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
777  store <4 x i32> %sel1, <4 x i32>* %ptr1, align 16
778  store <4 x i32> %sel2, <4 x i32>* %ptr2, align 16
779  ret void
780}
781
782; PR8575
783
784define i32 @test52(i32 %n, i32 %m) {
785; CHECK-LABEL: @test52(
786; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], [[M:%.*]]
787; CHECK-NEXT:    [[STOREMERGE:%.*]] = select i1 [[CMP]], i32 1, i32 6
788; CHECK-NEXT:    ret i32 [[STOREMERGE]]
789;
790  %cmp = icmp sgt i32 %n, %m
791  %. = select i1 %cmp, i32 1, i32 3
792  %add = add nsw i32 %., 3
793  %storemerge = select i1 %cmp, i32 %., i32 %add
794  ret i32 %storemerge
795}
796
797; PR9454
798
799define i32 @test53(i32 %x) {
800; CHECK-LABEL: @test53(
801; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], 2
802; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], [[X]]
803; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 2, i32 1
804; CHECK-NEXT:    ret i32 [[SEL]]
805;
806  %and = and i32 %x, 2
807  %cmp = icmp eq i32 %and, %x
808  %sel = select i1 %cmp, i32 2, i32 1
809  ret i32 %sel
810}
811
812define i32 @test54(i32 %X, i32 %Y) {
813; CHECK-LABEL: @test54(
814; CHECK-NEXT:    [[B:%.*]] = icmp ne i32 [[X:%.*]], 0
815; CHECK-NEXT:    [[C:%.*]] = zext i1 [[B]] to i32
816; CHECK-NEXT:    ret i32 [[C]]
817;
818  %A = ashr exact i32 %X, %Y
819  %B = icmp eq i32 %A, 0
820  %C = select i1 %B, i32 %A, i32 1
821  ret i32 %C
822}
823
824define i1 @test55(i1 %X, i32 %Y, i32 %Z) {
825; CHECK-LABEL: @test55(
826; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[Y:%.*]], 0
827; CHECK-NEXT:    ret i1 [[C]]
828;
829  %A = ashr exact i32 %Y, %Z
830  %B = select i1 %X, i32 %Y, i32 %A
831  %C = icmp eq i32 %B, 0
832  ret i1 %C
833}
834
835define i32 @test56(i16 %x) {
836; CHECK-LABEL: @test56(
837; CHECK-NEXT:    [[CONV:%.*]] = zext i16 [[X:%.*]] to i32
838; CHECK-NEXT:    ret i32 [[CONV]]
839;
840  %tobool = icmp eq i16 %x, 0
841  %conv = zext i16 %x to i32
842  %cond = select i1 %tobool, i32 0, i32 %conv
843  ret i32 %cond
844}
845
846define i32 @test57(i32 %x, i32 %y) {
847; CHECK-LABEL: @test57(
848; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
849; CHECK-NEXT:    ret i32 [[AND]]
850;
851  %and = and i32 %x, %y
852  %tobool = icmp eq i32 %x, 0
853  %.and = select i1 %tobool, i32 0, i32 %and
854  ret i32 %.and
855}
856
857define i32 @test58(i16 %x) {
858; CHECK-LABEL: @test58(
859; CHECK-NEXT:    [[CONV:%.*]] = zext i16 [[X:%.*]] to i32
860; CHECK-NEXT:    ret i32 [[CONV]]
861;
862  %tobool = icmp ne i16 %x, 1
863  %conv = zext i16 %x to i32
864  %cond = select i1 %tobool, i32 %conv, i32 1
865  ret i32 %cond
866}
867
868define i32 @test59(i32 %x, i32 %y) {
869; CHECK-LABEL: @test59(
870; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
871; CHECK-NEXT:    ret i32 [[AND]]
872;
873  %and = and i32 %x, %y
874  %tobool = icmp ne i32 %x, %y
875  %.and = select i1 %tobool, i32 %and, i32 %y
876  ret i32 %.and
877}
878
879define i1 @test60(i32 %x, i1* %y) {
880; CHECK-LABEL: @test60(
881; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
882; CHECK-NEXT:    [[LOAD:%.*]] = load i1, i1* [[Y:%.*]], align 1
883; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[X]], 1
884; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i1 [[LOAD]], i1 [[CMP1]]
885; CHECK-NEXT:    ret i1 [[SEL]]
886;
887  %cmp = icmp eq i32 %x, 0
888  %load = load i1, i1* %y, align 1
889  %cmp1 = icmp slt i32 %x, 1
890  %sel = select i1 %cmp, i1 %load, i1 %cmp1
891  ret i1 %sel
892}
893
894@glbl = constant i32 10
895define i32 @test61(i32* %ptr) {
896; CHECK-LABEL: @test61(
897; CHECK-NEXT:    ret i32 10
898;
899  %A = load i32, i32* %ptr
900  %B = icmp eq i32* %ptr, @glbl
901  %C = select i1 %B, i32 %A, i32 10
902  ret i32 %C
903}
904
905; PR14131
906define void @test64(i32 %p, i16 %b) noreturn {
907; CHECK-LABEL: @test64(
908; CHECK-NEXT:  entry:
909; CHECK-NEXT:    br i1 undef, label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
910; CHECK:       lor.rhs:
911; CHECK-NEXT:    br label [[LOR_END]]
912; CHECK:       lor.end:
913; CHECK-NEXT:    br i1 true, label [[COND_END17:%.*]], label [[COND_FALSE16:%.*]]
914; CHECK:       cond.false16:
915; CHECK-NEXT:    br label [[COND_END17]]
916; CHECK:       cond.end17:
917; CHECK-NEXT:    br label [[WHILE_BODY:%.*]]
918; CHECK:       while.body:
919; CHECK-NEXT:    br label [[WHILE_BODY]]
920;
921entry:
922  %p.addr.0.insert.mask = and i32 %p, -65536
923  %conv2 = and i32 %p, 65535
924  br i1 undef, label %lor.rhs, label %lor.end
925
926lor.rhs:
927  %p.addr.0.extract.trunc = trunc i32 %p.addr.0.insert.mask to i16
928  %phitmp = zext i16 %p.addr.0.extract.trunc to i32
929  br label %lor.end
930
931lor.end:
932  %t.1 = phi i32 [ 0, %entry ], [ %phitmp, %lor.rhs ]
933  %conv6 = zext i16 %b to i32
934  %div = udiv i32 %conv6, %t.1
935  %tobool8 = icmp eq i32 %div, 0
936  %cmp = icmp eq i32 %t.1, 0
937  %cmp12 = icmp ult i32 %conv2, 2
938  %cmp.sink = select i1 %tobool8, i1 %cmp12, i1 %cmp
939  br i1 %cmp.sink, label %cond.end17, label %cond.false16
940
941cond.false16:
942  br label %cond.end17
943
944cond.end17:
945  br label %while.body
946
947while.body:
948  br label %while.body
949}
950
951@under_aligned = external global i32, align 1
952
953; The load here must not be speculated around the select. One side of the
954; select is trivially dereferenceable but may have a lower alignment than the
955; load does.
956define i32 @test76(i1 %flag, i32* %x) {
957; CHECK-LABEL: @test76(
958; CHECK-NEXT:    store i32 0, i32* [[X:%.*]], align 4
959; CHECK-NEXT:    [[P:%.*]] = select i1 [[FLAG:%.*]], i32* @under_aligned, i32* [[X]]
960; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P]], align 4
961; CHECK-NEXT:    ret i32 [[V]]
962;
963  store i32 0, i32* %x
964  %p = select i1 %flag, i32* @under_aligned, i32* %x
965  %v = load i32, i32* %p
966  ret i32 %v
967}
968
969declare void @scribble_on_i32(i32*)
970
971; The load here must not be speculated around the select. One side of the
972; select is trivially dereferenceable but may have a lower alignment than the
973; load does.
974
975define i32 @test77(i1 %flag, i32* %x) {
976; CHECK-LABEL: @test77(
977; CHECK-NEXT:    [[UNDER_ALIGNED:%.*]] = alloca i32, align 1
978; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[UNDER_ALIGNED]])
979; CHECK-NEXT:    store i32 0, i32* [[X:%.*]], align 4
980; CHECK-NEXT:    [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[UNDER_ALIGNED]], i32* [[X]]
981; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P]], align 4
982; CHECK-NEXT:    ret i32 [[V]]
983;
984  %under_aligned = alloca i32, align 1
985  call void @scribble_on_i32(i32* %under_aligned)
986  store i32 0, i32* %x
987  %p = select i1 %flag, i32* %under_aligned, i32* %x
988  %v = load i32, i32* %p
989  ret i32 %v
990}
991
992define i32 @test78(i1 %flag, i32* %x, i32* %y, i32* %z) {
993; Test that we can speculate the loads around the select even when we can't
994; fold the load completely away.
995; CHECK-LABEL: @test78(
996; CHECK-NEXT:  entry:
997; CHECK-NEXT:    store i32 0, i32* [[X:%.*]], align 4
998; CHECK-NEXT:    store i32 0, i32* [[Y:%.*]], align 4
999; CHECK-NEXT:    store i32 42, i32* [[Z:%.*]], align 4
1000; CHECK-NEXT:    [[X_VAL:%.*]] = load i32, i32* [[X]], align 4
1001; CHECK-NEXT:    [[Y_VAL:%.*]] = load i32, i32* [[Y]], align 4
1002; CHECK-NEXT:    [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]]
1003; CHECK-NEXT:    ret i32 [[V]]
1004;
1005entry:
1006  store i32 0, i32* %x
1007  store i32 0, i32* %y
1008  ; Block forwarding by storing to %z which could alias either %x or %y.
1009  store i32 42, i32* %z
1010  %p = select i1 %flag, i32* %x, i32* %y
1011  %v = load i32, i32* %p
1012  ret i32 %v
1013}
1014
1015; Test that we can speculate the loads around the select even when we can't
1016; fold the load completely away.
1017define i32 @test78_deref(i1 %flag, i32* dereferenceable(4) %x, i32* dereferenceable(4) %y, i32* %z) {
1018; CHECK-LABEL: @test78_deref(
1019; CHECK-NEXT:    [[X_VAL:%.*]] = load i32, i32* [[X:%.*]], align 4
1020; CHECK-NEXT:    [[Y_VAL:%.*]] = load i32, i32* [[Y:%.*]], align 4
1021; CHECK-NEXT:    [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]]
1022; CHECK-NEXT:    ret i32 [[V]]
1023;
1024  %p = select i1 %flag, i32* %x, i32* %y
1025  %v = load i32, i32* %p
1026  ret i32 %v
1027}
1028
1029; The same as @test78 but we can't speculate the load because it can trap
1030; if under-aligned.
1031define i32 @test78_neg(i1 %flag, i32* %x, i32* %y, i32* %z) {
1032; CHECK-LABEL: @test78_neg(
1033; CHECK-NEXT:    store i32 0, i32* [[X:%.*]], align 4
1034; CHECK-NEXT:    store i32 0, i32* [[Y:%.*]], align 4
1035; CHECK-NEXT:    store i32 42, i32* [[Z:%.*]], align 4
1036; CHECK-NEXT:    [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[X]], i32* [[Y]]
1037; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P]], align 16
1038; CHECK-NEXT:    ret i32 [[V]]
1039;
1040  store i32 0, i32* %x
1041  store i32 0, i32* %y
1042  ; Block forwarding by storing to %z which could alias either %x or %y.
1043  store i32 42, i32* %z
1044  %p = select i1 %flag, i32* %x, i32* %y
1045  %v = load i32, i32* %p, align 16
1046  ret i32 %v
1047}
1048
1049; The same as @test78_deref but we can't speculate the load because
1050; one of the arguments is not sufficiently dereferenceable.
1051define i32 @test78_deref_neg(i1 %flag, i32* dereferenceable(2) %x, i32* dereferenceable(4) %y, i32* %z) {
1052; CHECK-LABEL: @test78_deref_neg(
1053; CHECK-NEXT:    [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[X:%.*]], i32* [[Y:%.*]]
1054; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P]], align 4
1055; CHECK-NEXT:    ret i32 [[V]]
1056;
1057  %p = select i1 %flag, i32* %x, i32* %y
1058  %v = load i32, i32* %p
1059  ret i32 %v
1060}
1061
1062; Test that we can speculate the loads around the select even when we can't
1063; fold the load completely away.
1064define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) {
1065; CHECK-LABEL: @test79(
1066; CHECK-NEXT:    [[X1:%.*]] = bitcast float* [[X:%.*]] to i32*
1067; CHECK-NEXT:    [[Y1:%.*]] = bitcast i32* [[Y:%.*]] to float*
1068; CHECK-NEXT:    store i32 0, i32* [[X1]], align 4
1069; CHECK-NEXT:    store i32 0, i32* [[Y]], align 4
1070; CHECK-NEXT:    store i32 42, i32* [[Z:%.*]], align 4
1071; CHECK-NEXT:    [[X_VAL:%.*]] = load float, float* [[X]], align 4
1072; CHECK-NEXT:    [[Y1_VAL:%.*]] = load float, float* [[Y1]], align 4
1073; CHECK-NEXT:    [[V:%.*]] = select i1 [[FLAG:%.*]], float [[X_VAL]], float [[Y1_VAL]]
1074; CHECK-NEXT:    ret float [[V]]
1075;
1076  %x1 = bitcast float* %x to i32*
1077  %y1 = bitcast i32* %y to float*
1078  store i32 0, i32* %x1
1079  store i32 0, i32* %y
1080  ; Block forwarding by storing to %z which could alias either %x or %y.
1081  store i32 42, i32* %z
1082  %p = select i1 %flag, float* %x, float* %y1
1083  %v = load float, float* %p
1084  ret float %v
1085}
1086
1087; Test that when we speculate the loads around the select they fold throug
1088; load->load folding and load->store folding.
1089define i32 @test80(i1 %flag) {
1090; CHECK-LABEL: @test80(
1091; CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4
1092; CHECK-NEXT:    [[Y:%.*]] = alloca i32, align 4
1093; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[X]])
1094; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[Y]])
1095; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* [[X]], align 4
1096; CHECK-NEXT:    store i32 [[TMP]], i32* [[Y]], align 4
1097; CHECK-NEXT:    ret i32 [[TMP]]
1098;
1099  %x = alloca i32
1100  %y = alloca i32
1101  call void @scribble_on_i32(i32* %x)
1102  call void @scribble_on_i32(i32* %y)
1103  %tmp = load i32, i32* %x
1104  store i32 %tmp, i32* %y
1105  %p = select i1 %flag, i32* %x, i32* %y
1106  %v = load i32, i32* %p
1107  ret i32 %v
1108}
1109
1110; Test that we can speculate the load around the select even though they use
1111; differently typed pointers.
1112define float @test81(i1 %flag) {
1113; CHECK-LABEL: @test81(
1114; CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4
1115; CHECK-NEXT:    [[Y:%.*]] = alloca i32, align 4
1116; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[X]])
1117; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[Y]])
1118; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* [[X]], align 4
1119; CHECK-NEXT:    store i32 [[TMP]], i32* [[Y]], align 4
1120; CHECK-NEXT:    [[V:%.*]] = bitcast i32 [[TMP]] to float
1121; CHECK-NEXT:    ret float [[V]]
1122;
1123  %x = alloca float
1124  %y = alloca i32
1125  %x1 = bitcast float* %x to i32*
1126  %y1 = bitcast i32* %y to float*
1127  call void @scribble_on_i32(i32* %x1)
1128  call void @scribble_on_i32(i32* %y)
1129  %tmp = load i32, i32* %x1
1130  store i32 %tmp, i32* %y
1131  %p = select i1 %flag, float* %x, float* %y1
1132  %v = load float, float* %p
1133  ret float %v
1134}
1135
1136; Test that we can speculate the load around the select even though they use
1137; differently typed pointers.
1138define i32 @test82(i1 %flag) {
1139; CHECK-LABEL: @test82(
1140; CHECK-NEXT:    [[X:%.*]] = alloca float, align 4
1141; CHECK-NEXT:    [[Y:%.*]] = alloca i32, align 4
1142; CHECK-NEXT:    [[X1:%.*]] = bitcast float* [[X]] to i32*
1143; CHECK-NEXT:    [[Y1:%.*]] = bitcast i32* [[Y]] to float*
1144; CHECK-NEXT:    call void @scribble_on_i32(i32* [[X1]])
1145; CHECK-NEXT:    call void @scribble_on_i32(i32* nonnull [[Y]])
1146; CHECK-NEXT:    [[TMP:%.*]] = load float, float* [[X]], align 4
1147; CHECK-NEXT:    store float [[TMP]], float* [[Y1]], align 4
1148; CHECK-NEXT:    [[V:%.*]] = bitcast float [[TMP]] to i32
1149; CHECK-NEXT:    ret i32 [[V]]
1150;
1151  %x = alloca float
1152  %y = alloca i32
1153  %x1 = bitcast float* %x to i32*
1154  %y1 = bitcast i32* %y to float*
1155  call void @scribble_on_i32(i32* %x1)
1156  call void @scribble_on_i32(i32* %y)
1157  %tmp = load float, float* %x
1158  store float %tmp, float* %y1
1159  %p = select i1 %flag, i32* %x1, i32* %y
1160  %v = load i32, i32* %p
1161  ret i32 %v
1162}
1163
1164declare void @scribble_on_i64(i64*)
1165declare void @scribble_on_i128(i128*)
1166
1167; Test that we can speculate the load around the select even though they use
1168; differently typed pointers and requires inttoptr casts.
1169define i8* @test83(i1 %flag) {
1170; CHECK-LABEL: @test83(
1171; CHECK-NEXT:    [[X:%.*]] = alloca i8*, align 8
1172; CHECK-NEXT:    [[Y:%.*]] = alloca i8*, align 8
1173; CHECK-NEXT:    [[TMPCAST:%.*]] = bitcast i8** [[Y]] to i64*
1174; CHECK-NEXT:    [[X1:%.*]] = bitcast i8** [[X]] to i64*
1175; CHECK-NEXT:    call void @scribble_on_i64(i64* [[X1]])
1176; CHECK-NEXT:    call void @scribble_on_i64(i64* [[TMPCAST]])
1177; CHECK-NEXT:    [[TMP:%.*]] = load i64, i64* [[X1]], align 8
1178; CHECK-NEXT:    store i64 [[TMP]], i64* [[TMPCAST]], align 8
1179; CHECK-NEXT:    [[V:%.*]] = inttoptr i64 [[TMP]] to i8*
1180; CHECK-NEXT:    ret i8* [[V]]
1181;
1182  %x = alloca i8*
1183  %y = alloca i64
1184  %x1 = bitcast i8** %x to i64*
1185  %y1 = bitcast i64* %y to i8**
1186  call void @scribble_on_i64(i64* %x1)
1187  call void @scribble_on_i64(i64* %y)
1188  %tmp = load i64, i64* %x1
1189  store i64 %tmp, i64* %y
1190  %p = select i1 %flag, i8** %x, i8** %y1
1191  %v = load i8*, i8** %p
1192  ret i8* %v
1193}
1194
1195; Test that we can speculate the load around the select even though they use
1196; differently typed pointers and requires a ptrtoint cast.
1197define i64 @test84(i1 %flag) {
1198; CHECK-LABEL: @test84(
1199; CHECK-NEXT:    [[X:%.*]] = alloca i8*, align 8
1200; CHECK-NEXT:    [[Y:%.*]] = alloca i8*, align 8
1201; CHECK-NEXT:    [[TMPCAST:%.*]] = bitcast i8** [[Y]] to i64*
1202; CHECK-NEXT:    [[X1:%.*]] = bitcast i8** [[X]] to i64*
1203; CHECK-NEXT:    call void @scribble_on_i64(i64* [[X1]])
1204; CHECK-NEXT:    call void @scribble_on_i64(i64* [[TMPCAST]])
1205; CHECK-NEXT:    [[TMP:%.*]] = load i8*, i8** [[X]], align 8
1206; CHECK-NEXT:    store i8* [[TMP]], i8** [[Y]], align 8
1207; CHECK-NEXT:    [[V:%.*]] = ptrtoint i8* [[TMP]] to i64
1208; CHECK-NEXT:    ret i64 [[V]]
1209;
1210  %x = alloca i8*
1211  %y = alloca i64
1212  %x1 = bitcast i8** %x to i64*
1213  %y1 = bitcast i64* %y to i8**
1214  call void @scribble_on_i64(i64* %x1)
1215  call void @scribble_on_i64(i64* %y)
1216  %tmp = load i8*, i8** %x
1217  store i8* %tmp, i8** %y1
1218  %p = select i1 %flag, i64* %x1, i64* %y
1219  %v = load i64, i64* %p
1220  ret i64 %v
1221}
1222
1223; Test that we can't speculate the load around the select. The load of the
1224; pointer doesn't load all of the stored integer bits. We could fix this, but it
1225; would require endianness checks and other nastiness.
1226define i8* @test85(i1 %flag) {
1227; CHECK-LABEL: @test85(
1228; CHECK-NEXT:    [[X1:%.*]] = alloca [2 x i8*], align 8
1229; CHECK-NEXT:    [[Y:%.*]] = alloca i128, align 8
1230; CHECK-NEXT:    [[X1_SUB:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[X1]], i64 0, i64 0
1231; CHECK-NEXT:    [[X2:%.*]] = bitcast [2 x i8*]* [[X1]] to i128*
1232; CHECK-NEXT:    [[Y1:%.*]] = bitcast i128* [[Y]] to i8**
1233; CHECK-NEXT:    call void @scribble_on_i128(i128* [[X2]])
1234; CHECK-NEXT:    call void @scribble_on_i128(i128* nonnull [[Y]])
1235; CHECK-NEXT:    [[TMP:%.*]] = load i128, i128* [[X2]], align 8
1236; CHECK-NEXT:    store i128 [[TMP]], i128* [[Y]], align 8
1237; CHECK-NEXT:    [[X1_SUB_VAL:%.*]] = load i8*, i8** [[X1_SUB]], align 8
1238; CHECK-NEXT:    [[Y1_VAL:%.*]] = load i8*, i8** [[Y1]], align 8
1239; CHECK-NEXT:    [[V:%.*]] = select i1 [[FLAG:%.*]], i8* [[X1_SUB_VAL]], i8* [[Y1_VAL]]
1240; CHECK-NEXT:    ret i8* [[V]]
1241;
1242  %x = alloca [2 x i8*]
1243  %y = alloca i128
1244  %x1 = bitcast [2 x i8*]* %x to i8**
1245  %x2 = bitcast i8** %x1 to i128*
1246  %y1 = bitcast i128* %y to i8**
1247  call void @scribble_on_i128(i128* %x2)
1248  call void @scribble_on_i128(i128* %y)
1249  %tmp = load i128, i128* %x2
1250  store i128 %tmp, i128* %y
1251  %p = select i1 %flag, i8** %x1, i8** %y1
1252  %v = load i8*, i8** %p
1253  ret i8* %v
1254}
1255
1256; Test that we can't speculate the load around the select when the integer size
1257; is larger than the pointer size. The store of the pointer doesn't store to all
1258; the bits of the integer.
1259define i128 @test86(i1 %flag) {
1260; CHECK-LABEL: @test86(
1261; CHECK-NEXT:    [[X1:%.*]] = alloca [2 x i8*], align 8
1262; CHECK-NEXT:    [[Y:%.*]] = alloca i128, align 8
1263; CHECK-NEXT:    [[X1_SUB:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[X1]], i64 0, i64 0
1264; CHECK-NEXT:    [[X2:%.*]] = bitcast [2 x i8*]* [[X1]] to i128*
1265; CHECK-NEXT:    [[Y1:%.*]] = bitcast i128* [[Y]] to i8**
1266; CHECK-NEXT:    call void @scribble_on_i128(i128* [[X2]])
1267; CHECK-NEXT:    call void @scribble_on_i128(i128* nonnull [[Y]])
1268; CHECK-NEXT:    [[TMP:%.*]] = load i8*, i8** [[X1_SUB]], align 8
1269; CHECK-NEXT:    store i8* [[TMP]], i8** [[Y1]], align 8
1270; CHECK-NEXT:    [[X2_VAL:%.*]] = load i128, i128* [[X2]], align 8
1271; CHECK-NEXT:    [[Y_VAL:%.*]] = load i128, i128* [[Y]], align 8
1272; CHECK-NEXT:    [[V:%.*]] = select i1 [[FLAG:%.*]], i128 [[X2_VAL]], i128 [[Y_VAL]]
1273; CHECK-NEXT:    ret i128 [[V]]
1274;
1275  %x = alloca [2 x i8*]
1276  %y = alloca i128
1277  %x1 = bitcast [2 x i8*]* %x to i8**
1278  %x2 = bitcast i8** %x1 to i128*
1279  %y1 = bitcast i128* %y to i8**
1280  call void @scribble_on_i128(i128* %x2)
1281  call void @scribble_on_i128(i128* %y)
1282  %tmp = load i8*, i8** %x1
1283  store i8* %tmp, i8** %y1
1284  %p = select i1 %flag, i128* %x2, i128* %y
1285  %v = load i128, i128* %p
1286  ret i128 %v
1287}
1288
1289define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) {
1290; CHECK-LABEL: @test_select_select0(
1291; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]]
1292; CHECK-NEXT:    [[S0:%.*]] = select i1 [[C0]], i32 [[R1:%.*]], i32 [[R0:%.*]]
1293; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]]
1294; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C1]], i32 [[S0]], i32 [[R1]]
1295; CHECK-NEXT:    ret i32 [[S1]]
1296;
1297  %c0 = icmp sge i32 %a, %v1
1298  %s0 = select i1 %c0, i32 %r0, i32 %r1
1299  %c1 = icmp slt i32 %a, %v2
1300  %s1 = select i1 %c1, i32 %s0, i32 %r1
1301  ret i32 %s1
1302}
1303
1304define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) {
1305; CHECK-LABEL: @test_select_select1(
1306; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]]
1307; CHECK-NEXT:    [[S0:%.*]] = select i1 [[C0]], i32 [[R1:%.*]], i32 [[R0:%.*]]
1308; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]]
1309; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C1]], i32 [[R0]], i32 [[S0]]
1310; CHECK-NEXT:    ret i32 [[S1]]
1311;
1312  %c0 = icmp sge i32 %a, %v1
1313  %s0 = select i1 %c0, i32 %r0, i32 %r1
1314  %c1 = icmp slt i32 %a, %v2
1315  %s1 = select i1 %c1, i32 %r0, i32 %s0
1316  ret i32 %s1
1317}
1318
1319define i32 @PR23757(i32 %x) {
1320; CHECK-LABEL: @PR23757(
1321; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647
1322; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[X]], 1
1323; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 -2147483648, i32 [[ADD]]
1324; CHECK-NEXT:    ret i32 [[SEL]]
1325;
1326  %cmp = icmp eq i32 %x, 2147483647
1327  %add = add nsw i32 %x, 1
1328  %sel = select i1 %cmp, i32 -2147483648, i32 %add
1329  ret i32 %sel
1330}
1331
1332; max(max(~a, -1), -1) --> max(~a, -1)
1333
1334define i32 @PR27137(i32 %a) {
1335; CHECK-LABEL: @PR27137(
1336; CHECK-NEXT:    [[NOT_A:%.*]] = xor i32 [[A:%.*]], -1
1337; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[NOT_A]], -1
1338; CHECK-NEXT:    [[S1:%.*]] = select i1 [[TMP1]], i32 [[NOT_A]], i32 -1
1339; CHECK-NEXT:    ret i32 [[S1]]
1340;
1341  %not_a = xor i32 %a, -1
1342  %c0 = icmp slt i32 %a, 0
1343  %s0 = select i1 %c0, i32 %not_a, i32 -1
1344  %c1 = icmp sgt i32 %s0, -1
1345  %s1 = select i1 %c1, i32 %s0, i32 -1
1346  ret i32 %s1
1347}
1348
1349define i32 @select_icmp_slt0_xor(i32 %x) {
1350; CHECK-LABEL: @select_icmp_slt0_xor(
1351; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[X:%.*]], -2147483648
1352; CHECK-NEXT:    ret i32 [[TMP1]]
1353;
1354  %cmp = icmp slt i32 %x, zeroinitializer
1355  %xor = xor i32 %x, 2147483648
1356  %x.xor = select i1 %cmp, i32 %x, i32 %xor
1357  ret i32 %x.xor
1358}
1359
1360define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) {
1361; CHECK-LABEL: @select_icmp_slt0_xor_vec(
1362; CHECK-NEXT:    [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 -2147483648, i32 -2147483648>
1363; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
1364;
1365  %cmp = icmp slt <2 x i32> %x, zeroinitializer
1366  %xor = xor <2 x i32> %x, <i32 2147483648, i32 2147483648>
1367  %x.xor = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %xor
1368  ret <2 x i32> %x.xor
1369}
1370
1371define <4 x i32> @canonicalize_to_shuffle(<4 x i32> %a, <4 x i32> %b) {
1372; CHECK-LABEL: @canonicalize_to_shuffle(
1373; CHECK-NEXT:    [[SEL:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
1374; CHECK-NEXT:    ret <4 x i32> [[SEL]]
1375;
1376  %sel = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> %a, <4 x i32> %b
1377  ret <4 x i32> %sel
1378}
1379
1380; Undef elements of the select condition may not be translated into undef elements of a shuffle mask
1381; because undef in a shuffle mask means we can return anything, not just one of the selected values.
1382; https://bugs.llvm.org/show_bug.cgi?id=32486
1383
1384define <4 x i32> @undef_elts_in_condition(<4 x i32> %a, <4 x i32> %b) {
1385; CHECK-LABEL: @undef_elts_in_condition(
1386; CHECK-NEXT:    [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
1387; CHECK-NEXT:    ret <4 x i32> [[SEL]]
1388;
1389  %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> %a, <4 x i32> %b
1390  ret <4 x i32> %sel
1391}
1392
1393; Don't die or try if the condition mask is a constant expression or contains a constant expression.
1394
1395@g = global i32 0
1396
1397define <4 x i32> @cannot_canonicalize_to_shuffle1(<4 x i32> %a, <4 x i32> %b) {
1398; CHECK-LABEL: @cannot_canonicalize_to_shuffle1(
1399; CHECK-NEXT:    [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
1400; CHECK-NEXT:    ret <4 x i32> [[SEL]]
1401;
1402  %sel = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b
1403  ret <4 x i32> %sel
1404}
1405
1406define <4 x i32> @cannot_canonicalize_to_shuffle2(<4 x i32> %a, <4 x i32> %b) {
1407; CHECK-LABEL: @cannot_canonicalize_to_shuffle2(
1408; CHECK-NEXT:    [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
1409; CHECK-NEXT:    ret <4 x i32> [[SEL]]
1410;
1411  %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> %a, <4 x i32> %b
1412  ret <4 x i32> %sel
1413}
1414
1415declare void @llvm.assume(i1)
1416
1417define i8 @assume_cond_true(i1 %cond, i8 %x, i8 %y) {
1418; CHECK-LABEL: @assume_cond_true(
1419; CHECK-NEXT:    call void @llvm.assume(i1 [[COND:%.*]])
1420; CHECK-NEXT:    ret i8 [[X:%.*]]
1421;
1422  call void @llvm.assume(i1 %cond)
1423  %sel = select i1 %cond, i8 %x, i8 %y
1424  ret i8 %sel
1425}
1426
1427; computeKnownBitsFromAssume() understands the 'not' of an assumed condition.
1428
1429define i8 @assume_cond_false(i1 %cond, i8 %x, i8 %y) {
1430; CHECK-LABEL: @assume_cond_false(
1431; CHECK-NEXT:    [[NOTCOND:%.*]] = xor i1 [[COND:%.*]], true
1432; CHECK-NEXT:    call void @llvm.assume(i1 [[NOTCOND]])
1433; CHECK-NEXT:    ret i8 [[Y:%.*]]
1434;
1435  %notcond = xor i1 %cond, true
1436  call void @llvm.assume(i1 %notcond)
1437  %sel = select i1 %cond, i8 %x, i8 %y
1438  ret i8 %sel
1439}
1440
1441; Test case to make sure we don't consider an all ones float values for converting the select into a sext.
1442define <4 x float> @PR33721(<4 x float> %w) {
1443; CHECK-LABEL: @PR33721(
1444; CHECK-NEXT:  entry:
1445; CHECK-NEXT:    [[TMP0:%.*]] = fcmp ole <4 x float> [[W:%.*]], zeroinitializer
1446; CHECK-NEXT:    [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <4 x float> zeroinitializer
1447; CHECK-NEXT:    ret <4 x float> [[TMP1]]
1448;
1449entry:
1450  %0 = fcmp ole <4 x float> %w, zeroinitializer
1451  %1 = select <4 x i1> %0, <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <4 x float> zeroinitializer
1452  ret <4 x float> %1
1453}
1454
1455; select(C, binop(select(C, X, Y), W), Z) -> select(C, binop(X, W), Z)
1456define i8 @test87(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) {
1457; CHECK-LABEL: @test87(
1458; CHECK-NEXT:    [[B:%.*]] = add i8 [[X:%.*]], [[W:%.*]]
1459; CHECK-NEXT:    [[C:%.*]] = select i1 [[COND:%.*]], i8 [[B]], i8 [[Z:%.*]]
1460; CHECK-NEXT:    ret i8 [[C]]
1461;
1462  %a = select i1 %cond, i8 %x, i8 %y
1463  %b = add i8 %a, %w
1464  %c = select i1 %cond, i8 %b, i8 %z
1465  ret i8 %c
1466}
1467
1468; select(C, binop(select(C, X, Y), W), Z) -> select(C, Z, binop(Y, W))
1469define i8 @test88(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) {
1470; CHECK-LABEL: @test88(
1471; CHECK-NEXT:    [[B:%.*]] = sub i8 [[Y:%.*]], [[W:%.*]]
1472; CHECK-NEXT:    [[C:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[B]]
1473; CHECK-NEXT:    ret i8 [[C]]
1474;
1475  %a = select i1 %cond, i8 %x, i8 %y
1476  %b = sub i8 %a, %w
1477  %c = select i1 %cond, i8 %z, i8 %b
1478  ret i8 %c
1479}
1480
1481; select(C, Z, binop(W, select(C, X, Y))) -> select(C, binop(X, W), Z)
1482define i8 @test89(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) {
1483; CHECK-LABEL: @test89(
1484; CHECK-NEXT:    [[B:%.*]] = and i8 [[X:%.*]], [[W:%.*]]
1485; CHECK-NEXT:    [[C:%.*]] = select i1 [[COND:%.*]], i8 [[B]], i8 [[Z:%.*]]
1486; CHECK-NEXT:    ret i8 [[C]]
1487;
1488  %a = select i1 %cond, i8 %x, i8 %y
1489  %b = and i8 %w, %a
1490  %c = select i1 %cond, i8 %b, i8 %z
1491  ret i8 %c
1492}
1493
1494; select(C, Z, binop(W, select(C, X, Y))) -> select(C, Z, binop(W, Y))
1495define i8 @test90(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) {
1496; CHECK-LABEL: @test90(
1497; CHECK-NEXT:    [[B:%.*]] = or i8 [[Y:%.*]], [[W:%.*]]
1498; CHECK-NEXT:    [[C:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[B]]
1499; CHECK-NEXT:    ret i8 [[C]]
1500;
1501  %a = select i1 %cond, i8 %x, i8 %y
1502  %b = or i8 %w, %a
1503  %c = select i1 %cond, i8 %z, i8 %b
1504  ret i8 %c
1505}
1506
1507