1; Tests for conditional branch instructions
2
3; RUN: %if --need=allow_dump --need=target_MIPS32 --command %p2i \
4; RUN:   --filetype=asm --target mips32 -i %s --args -O2 \
5; RUN:   -allow-externally-defined-symbols \
6; RUN:   | %if --need=allow_dump --need=target_MIPS32 --command FileCheck %s \
7; RUN:   --check-prefix=COMMON --check-prefix=MIPS32
8
9; RUN: %if --need=allow_dump --need=target_MIPS32 --command %p2i \
10; RUN:   --filetype=asm --target mips32 -i %s --args -Om1 \
11; RUN:   -allow-externally-defined-symbols \
12; RUN:   | %if --need=allow_dump --need=target_MIPS32 --command FileCheck %s \
13; RUN:   --check-prefix=COMMON --check-prefix=MIPS32-OM1
14
15define internal i32 @cond_br_eq(i32 %arg1, i32 %arg2) {
16entry:
17  %cmp1 = icmp eq i32 %arg1, %arg2
18  br i1 %cmp1, label %branch1, label %branch2
19branch1:
20  ret i32 1
21branch2:
22  ret i32 2
23}
24; COMMON-LABEL: cond_br_eq
25; MIPS32: bne {{.*}} .Lcond_br_eq$branch2
26; MIPS32-NEXT: .Lcond_br_eq$branch1
27; MIPS32-OM1: xor
28; MIPS32-OM1: sltiu {{.*}}, {{.*}}, 1
29; MIPS32-OM1: beqz {{.*}} .Lcond_br_eq$branch2
30; MIPS32-OM1-NEXT: b .Lcond_br_eq$branch1
31
32define internal i32 @cond_br_ne(i32 %arg1, i32 %arg2) {
33entry:
34  %cmp1 = icmp ne i32 %arg1, %arg2
35  br i1 %cmp1, label %branch1, label %branch2
36branch1:
37  ret i32 1
38branch2:
39  ret i32 2
40}
41; COMMON-LABEL: cond_br_ne
42; MIPS32: beq {{.*}} .Lcond_br_ne$branch2
43; MIPS32-NEXT: .Lcond_br_ne$branch1
44; MIPS32-OM1: xor
45; MIPS32-OM1: sltu {{.*}}, $zero, {{.*}}
46; MIPS32-OM1: beqz {{.*}} .Lcond_br_ne$branch2
47; MIPS32-OM1-NEXT: b .Lcond_br_ne$branch1
48
49define internal i32 @cond_br_slt(i32 %arg1, i32 %arg2) {
50entry:
51  %cmp1 = icmp slt i32 %arg1, %arg2
52  br i1 %cmp1, label %branch1, label %branch2
53branch1:
54  ret i32 1
55branch2:
56  ret i32 2
57}
58; COMMON-LABEL: cond_br_slt
59; MIPS32: slt
60; MIPS32: beqz {{.*}} .Lcond_br_slt$branch2
61; MIPS32-NEXT: .Lcond_br_slt$branch1
62; MIPS32-OM1: slt
63; MIPS32-OM1: beqz {{.*}} .Lcond_br_slt$branch2
64; MIPS32-OM1-NEXT: b .Lcond_br_slt$branch1
65
66define internal i32 @cond_br_sle(i32 %arg1, i32 %arg2) {
67entry:
68  %cmp1 = icmp sle i32 %arg1, %arg2
69  br i1 %cmp1, label %branch1, label %branch2
70branch1:
71  ret i32 1
72branch2:
73  ret i32 2
74}
75; COMMON-LABEL: cond_br_sle
76; MIPS32: slt
77; MIPS32: bnez {{.*}} .Lcond_br_sle$branch2
78; MIPS32-NEXT: .Lcond_br_sle$branch1
79; MIPS32-OM1: slt
80; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
81; MIPS32-OM1: beqz {{.*}} .Lcond_br_sle$branch2
82; MIPS32-OM1-NEXT: b .Lcond_br_sle$branch1
83
84define internal i32 @cond_br_sgt(i32 %arg1, i32 %arg2) {
85entry:
86  %cmp1 = icmp sgt i32 %arg1, %arg2
87  br i1 %cmp1, label %branch1, label %branch2
88branch1:
89  ret i32 1
90branch2:
91  ret i32 2
92}
93; COMMON-LABEL: cond_br_sgt
94; MIPS32: slt
95; MIPS32-NEXT: beqz {{.*}} .Lcond_br_sgt$branch2
96; MIPS32-NEXT: .Lcond_br_sgt$branch1
97; MIPS32-OM1: slt
98; MIPS32-OM1: beqz {{.*}} .Lcond_br_sgt$branch2
99; MIPS32-OM1-NEXT: b .Lcond_br_sgt$branch1
100
101define internal i32 @cond_br_sge(i32 %arg1, i32 %arg2) {
102entry:
103  %cmp1 = icmp sge i32 %arg1, %arg2
104  br i1 %cmp1, label %branch1, label %branch2
105branch1:
106  ret i32 1
107branch2:
108  ret i32 2
109}
110; COMMON-LABEL: cond_br_sge
111; MIPS32: slt
112; MIPS32: bnez {{.*}} .Lcond_br_sge$branch2
113; MIPS32-NEXT: .Lcond_br_sge$branch1
114; MIPS32-OM1: slt
115; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
116; MIPS32-OM1: beqz {{.*}} .Lcond_br_sge$branch2
117; MIPS32-OM1-NEXT: b .Lcond_br_sge$branch1
118
119define internal i32 @cond_br_ugt(i32 %arg1, i32 %arg2) {
120entry:
121  %cmp1 = icmp ugt i32 %arg1, %arg2
122  br i1 %cmp1, label %branch1, label %branch2
123branch1:
124  ret i32 1
125branch2:
126  ret i32 2
127}
128; COMMON-LABEL: cond_br_ugt
129; MIPS32: sltu
130; MIPS32: beqz {{.*}} .Lcond_br_ugt$branch2
131; MIPS32-NEXT: .Lcond_br_ugt$branch1
132; MIPS32-OM1: sltu
133; MIPS32-OM1: beqz {{.*}} .Lcond_br_ugt$branch2
134; MIPS32-OM1-NEXT: b .Lcond_br_ugt$branch1
135
136define internal i32 @cond_br_uge(i32 %arg1, i32 %arg2) {
137entry:
138  %cmp1 = icmp uge i32 %arg1, %arg2
139  br i1 %cmp1, label %branch1, label %branch2
140branch1:
141  ret i32 1
142branch2:
143  ret i32 2
144}
145; COMMON-LABEL: cond_br_uge
146; MIPS32: sltu
147; MIPS32: bnez {{.*}} .Lcond_br_uge$branch2
148; MIPS32-NEXT: .Lcond_br_uge$branch1
149; MIPS32-OM1: sltu
150; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
151; MIPS32-OM1: beqz {{.*}} .Lcond_br_uge$branch2
152; MIPS32-OM1-NEXT: b .Lcond_br_uge$branch1
153
154define internal i32 @cond_br_ult(i32 %arg1, i32 %arg2) {
155entry:
156  %cmp1 = icmp ult i32 %arg1, %arg2
157  br i1 %cmp1, label %branch1, label %branch2
158branch1:
159  ret i32 1
160branch2:
161  ret i32 2
162}
163; COMMON-LABEL: cond_br_ult
164; MIPS32: sltu
165; MIPS32: beqz {{.*}} .Lcond_br_ult$branch2
166; MIPS32-NEXT: .Lcond_br_ult$branch1
167; MIPS32-OM1: sltu
168; MIPS32-OM1: beqz {{.*}} .Lcond_br_ult$branch2
169; MIPS32-OM1-NEXT: b .Lcond_br_ult$branch1
170
171define internal i32 @cond_br_ule(i32 %arg1, i32 %arg2) {
172entry:
173  %cmp1 = icmp ule i32 %arg1, %arg2
174  br i1 %cmp1, label %branch1, label %branch2
175branch1:
176  ret i32 1
177branch2:
178  ret i32 2
179}
180; COMMON-LABEL: cond_br_ule
181; MIPS32: sltu
182; MIPS32: bnez {{.*}} .Lcond_br_ule$branch2
183; MIPS32-NEXT: .Lcond_br_ule$branch1
184; MIPS32-OM1: sltu
185; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
186; MIPS32-OM1: beqz {{.*}} .Lcond_br_ule$branch2
187; MIPS32-OM1-NEXT: b .Lcond_br_ule$branch1
188