1; This file checks support for legalization in MIPS.
2
3; REQUIRES: allow_dump
4
5; RUN: %if --need=target_MIPS32 \
6; RUN:   --command %p2i --filetype=asm --assemble --disassemble \
7; RUN:   --target mips32 -i %s --args -O2 \
8; RUN:   | %if --need=target_MIPS32 \
9; RUN:     --command FileCheck --check-prefix MIPS32 %s
10
11define internal i32 @legalization(i32 %a, i32 %b, i32 %c, i32 %d,
12                                  i32 %e, i32 %f) {
13entry:
14  %a.addr = alloca i8, i32 4, align 4
15  %b.addr = alloca i8, i32 4, align 4
16  %c.addr = alloca i8, i32 4, align 4
17  %d.addr = alloca i8, i32 4, align 4
18  %e.addr = alloca i8, i32 4, align 4
19  %f.addr = alloca i8, i32 4, align 4
20  %r1 = alloca i8, i32 4, align 4
21  %r2 = alloca i8, i32 4, align 4
22  %r3 = alloca i8, i32 4, align 4
23  %a.addr.bc = bitcast i8* %a.addr to i32*
24  store i32 %a, i32* %a.addr.bc, align 1
25  %b.addr.bc = bitcast i8* %b.addr to i32*
26  store i32 %b, i32* %b.addr.bc, align 1
27  %c.addr.bc = bitcast i8* %c.addr to i32*
28  store i32 %c, i32* %c.addr.bc, align 1
29  %d.addr.bc = bitcast i8* %d.addr to i32*
30  store i32 %d, i32* %d.addr.bc, align 1
31  %e.addr.bc = bitcast i8* %e.addr to i32*
32  store i32 %e, i32* %e.addr.bc, align 1
33  %f.addr.bc = bitcast i8* %f.addr to i32*
34  store i32 %f, i32* %f.addr.bc, align 1
35  %a.addr.bc1 = bitcast i8* %a.addr to i32*
36  %0 = load i32, i32* %a.addr.bc1, align 1
37  %f.addr.bc2 = bitcast i8* %f.addr to i32*
38  %1 = load i32, i32* %f.addr.bc2, align 1
39  %add = add i32 %0, %1
40  %r1.bc = bitcast i8* %r1 to i32*
41  store i32 %add, i32* %r1.bc, align 1
42  %b.addr.bc3 = bitcast i8* %b.addr to i32*
43  %2 = load i32, i32* %b.addr.bc3, align 1
44  %e.addr.bc4 = bitcast i8* %e.addr to i32*
45  %3 = load i32, i32* %e.addr.bc4, align 1
46  %add1 = add i32 %2, %3
47  %r2.bc = bitcast i8* %r2 to i32*
48  store i32 %add1, i32* %r2.bc, align 1
49  %r1.bc5 = bitcast i8* %r1 to i32*
50  %4 = load i32, i32* %r1.bc5, align 1
51  %r2.bc6 = bitcast i8* %r2 to i32*
52  %5 = load i32, i32* %r2.bc6, align 1
53  %add2 = add i32 %4, %5
54  %r3.bc = bitcast i8* %r3 to i32*
55  store i32 %add2, i32* %r3.bc, align 1
56  %r3.bc7 = bitcast i8* %r3 to i32*
57  %6 = load i32, i32* %r3.bc7, align 1
58  ret i32 %6
59}
60; MIPS32-LABEL: legalization
61; MIPS32: addiu sp,sp,-48
62; MIPS32: lw [[ARG_E:.*]],64(sp)
63; MIPS32: lw [[ARG_F:.*]],68(sp)
64; MIPS32: sw a0,0(sp)
65; MIPS32: sw a1,4(sp)
66; MIPS32: sw a2,8(sp)
67; MIPS32: sw a3,12(sp)
68; MIPS32: sw [[ARG_E]],16(sp)
69; MIPS32: sw [[ARG_F]],20(sp)
70; MIPS32: lw [[TMP_A:.*]],0(sp)
71; MIPS32: lw [[TMP_F:.*]],20(sp)
72; MIPS32: addu [[ADD1:.*]],[[TMP_A]],[[TMP_F]]
73; MIPS32: sw [[ADD1]],24(sp)
74; MIPS32: lw [[TMP_B:.*]],4(sp)
75; MIPS32: lw [[TMP_E:.*]],16(sp)
76; MIPS32: addu [[ADD2:.*]],[[TMP_B]],[[TMP_E]]
77; MIPS32: sw [[ADD2]],28(sp)
78; MIPS32: lw [[TMP_ADD1:.*]],24(sp)
79; MIPS32: lw [[TMP_ADD2:.*]],28(sp)
80; MIPS32: addu [[ADD3:.*]],[[TMP_ADD1]],[[TMP_ADD2]]
81; MIPS32: sw [[ADD3]],32(sp)
82; MIPS32: lw v0,32(sp)
83; MIPS32: addiu sp,sp,48
84; MIPS32: jr ra
85