1; This test checks support for vector arithmetic. 2 3; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 \ 4; RUN: | FileCheck %s 5; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 \ 6; RUN: | FileCheck %s 7; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 -mattr=sse4.1 \ 8; RUN: | FileCheck --check-prefix=SSE41 %s 9; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 -mattr=sse4.1 \ 10; RUN: | FileCheck --check-prefix=SSE41 %s 11 12; RUN: %if --need=target_MIPS32 --need=allow_dump \ 13; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \ 14; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \ 15; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 16; RUN: --command FileCheck --check-prefix MIPS32 %s 17 18define internal <4 x float> @test_fadd(<4 x float> %arg0, <4 x float> %arg1) { 19entry: 20 %res = fadd <4 x float> %arg0, %arg1 21 ret <4 x float> %res 22; CHECK-LABEL: test_fadd 23; CHECK: addps 24; MIPS32-LABEL: test_fadd 25; MIPS32: add.s 26; MIPS32: add.s 27; MIPS32: add.s 28; MIPS32: add.s 29} 30 31define internal <4 x float> @test_fsub(<4 x float> %arg0, <4 x float> %arg1) { 32entry: 33 %res = fsub <4 x float> %arg0, %arg1 34 ret <4 x float> %res 35; CHECK-LABEL: test_fsub 36; CHECK: subps 37; MIPS32-LABEL: test_fsub 38; MIPS32: sub.s 39; MIPS32: sub.s 40; MIPS32: sub.s 41; MIPS32: sub.s 42} 43 44define internal <4 x float> @test_fmul(<4 x float> %arg0, <4 x float> %arg1) { 45entry: 46 %res = fmul <4 x float> %arg0, %arg1 47 ret <4 x float> %res 48; CHECK-LABEL: test_fmul 49; CHECK: mulps 50; MIPS32-LABEL: test_fmul 51; MIPS32: mul.s 52; MIPS32: mul.s 53; MIPS32: mul.s 54; MIPS32: mul.s 55} 56 57define internal <4 x float> @test_fdiv(<4 x float> %arg0, <4 x float> %arg1) { 58entry: 59 %res = fdiv <4 x float> %arg0, %arg1 60 ret <4 x float> %res 61; CHECK-LABEL: test_fdiv 62; CHECK: divps 63; MIPS32-LABEL: test_fdiv 64; MIPS32: div.s 65; MIPS32: div.s 66; MIPS32: div.s 67; MIPS32: div.s 68} 69 70define internal <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) { 71entry: 72 %res = frem <4 x float> %arg0, %arg1 73 ret <4 x float> %res 74; CHECK-LABEL: test_frem 75; CHECK: fmodf 76; CHECK: fmodf 77; CHECK: fmodf 78; CHECK: fmodf 79} 80 81define internal <16 x i8> @test_add_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 82entry: 83 %res = add <16 x i8> %arg0, %arg1 84 ret <16 x i8> %res 85; CHECK-LABEL: test_add_v16i8 86; CHECK: paddb 87; MIPS32-LABEL: test_add_v16i8 88; MIPS32: addu 89; MIPS32: addu 90; MIPS32: addu 91; MIPS32: addu 92; MIPS32: addu 93; MIPS32: addu 94; MIPS32: addu 95; MIPS32: addu 96; MIPS32: addu 97; MIPS32: addu 98; MIPS32: addu 99; MIPS32: addu 100; MIPS32: addu 101; MIPS32: addu 102; MIPS32: addu 103; MIPS32: addu 104} 105 106define internal <16 x i8> @test_and_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 107entry: 108 %res = and <16 x i8> %arg0, %arg1 109 ret <16 x i8> %res 110; CHECK-LABEL: test_and_v16i8 111; CHECK: pand 112; MIPS32-LABEL: test_and_v16i8 113; MIPS32: and 114; MIPS32: and 115; MIPS32: and 116; MIPS32: and 117; MIPS32: and 118; MIPS32: and 119; MIPS32: and 120; MIPS32: and 121; MIPS32: and 122; MIPS32: and 123; MIPS32: and 124; MIPS32: and 125; MIPS32: and 126; MIPS32: and 127; MIPS32: and 128; MIPS32: and 129} 130 131define internal <16 x i8> @test_or_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 132entry: 133 %res = or <16 x i8> %arg0, %arg1 134 ret <16 x i8> %res 135; CHECK-LABEL: test_or_v16i8 136; CHECK: por 137; MIPS32-LABEL: test_or_v16i8 138; MIPS32: or 139; MIPS32: or 140; MIPS32: or 141; MIPS32: or 142; MIPS32: or 143; MIPS32: or 144; MIPS32: or 145; MIPS32: or 146; MIPS32: or 147; MIPS32: or 148; MIPS32: or 149; MIPS32: or 150; MIPS32: or 151; MIPS32: or 152; MIPS32: or 153; MIPS32: or 154} 155 156define internal <16 x i8> @test_xor_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 157entry: 158 %res = xor <16 x i8> %arg0, %arg1 159 ret <16 x i8> %res 160; CHECK-LABEL: test_xor_v16i8 161; CHECK: pxor 162; MIPS32-LABEL: test_xor_v16i8 163; MIPS32: xor 164; MIPS32: xor 165; MIPS32: xor 166; MIPS32: xor 167; MIPS32: xor 168; MIPS32: xor 169; MIPS32: xor 170; MIPS32: xor 171; MIPS32: xor 172; MIPS32: xor 173; MIPS32: xor 174; MIPS32: xor 175; MIPS32: xor 176; MIPS32: xor 177; MIPS32: xor 178; MIPS32: xor 179} 180 181define internal <16 x i8> @test_sub_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 182entry: 183 %res = sub <16 x i8> %arg0, %arg1 184 ret <16 x i8> %res 185; CHECK-LABEL: test_sub_v16i8 186; CHECK: psubb 187; MIPS32-LABEL: test_sub_v16i8 188; MIPS32: subu 189; MIPS32: subu 190; MIPS32: subu 191; MIPS32: subu 192; MIPS32: subu 193; MIPS32: subu 194; MIPS32: subu 195; MIPS32: subu 196; MIPS32: subu 197; MIPS32: subu 198; MIPS32: subu 199; MIPS32: subu 200; MIPS32: subu 201; MIPS32: subu 202; MIPS32: subu 203; MIPS32: subu 204} 205 206define internal <16 x i8> @test_mul_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 207entry: 208 %res = mul <16 x i8> %arg0, %arg1 209 ret <16 x i8> %res 210; CHECK-LABEL: test_mul_v16i8 211; CHECK: imul 212; CHECK: imul 213; CHECK: imul 214; CHECK: imul 215; CHECK: imul 216; CHECK: imul 217; CHECK: imul 218; CHECK: imul 219; CHECK: imul 220; CHECK: imul 221; CHECK: imul 222; CHECK: imul 223; CHECK: imul 224; CHECK: imul 225; CHECK: imul 226; CHECK: imul 227; MIPS32-LABEL: test_mul_v16i8 228; MIPS32: mul 229; MIPS32: mul 230; MIPS32: mul 231; MIPS32: mul 232; MIPS32: mul 233; MIPS32: mul 234; MIPS32: mul 235; MIPS32: mul 236; MIPS32: mul 237; MIPS32: mul 238; MIPS32: mul 239; MIPS32: mul 240; MIPS32: mul 241; MIPS32: mul 242; MIPS32: mul 243; MIPS32: mul 244} 245 246define internal <16 x i8> @test_shl_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 247entry: 248 %res = shl <16 x i8> %arg0, %arg1 249 ret <16 x i8> %res 250; CHECK-LABEL: test_shl_v16i8 251; CHECK: shl 252; CHECK: shl 253; CHECK: shl 254; CHECK: shl 255; CHECK: shl 256; CHECK: shl 257; CHECK: shl 258; CHECK: shl 259; CHECK: shl 260; CHECK: shl 261; CHECK: shl 262; CHECK: shl 263; CHECK: shl 264; CHECK: shl 265; CHECK: shl 266; CHECK: shl 267; MIPS32-LABEL: test_shl_v16i8 268; MIPS32: sllv 269; MIPS32: sllv 270; MIPS32: sllv 271; MIPS32: sllv 272; MIPS32: sllv 273; MIPS32: sllv 274; MIPS32: sllv 275; MIPS32: sllv 276; MIPS32: sllv 277; MIPS32: sllv 278; MIPS32: sllv 279; MIPS32: sllv 280; MIPS32: sllv 281; MIPS32: sllv 282; MIPS32: sllv 283; MIPS32: sllv 284} 285 286define internal <16 x i8> @test_lshr_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 287entry: 288 %res = lshr <16 x i8> %arg0, %arg1 289 ret <16 x i8> %res 290; CHECK-LABEL: test_lshr_v16i8 291; CHECK: shr 292; CHECK: shr 293; CHECK: shr 294; CHECK: shr 295; CHECK: shr 296; CHECK: shr 297; CHECK: shr 298; CHECK: shr 299; CHECK: shr 300; CHECK: shr 301; CHECK: shr 302; CHECK: shr 303; CHECK: shr 304; CHECK: shr 305; CHECK: shr 306; CHECK: shr 307; MIPS32-LABEL: test_lshr_v16i8 308; MIPS32: srlv 309; MIPS32: srlv 310; MIPS32: srlv 311; MIPS32: srlv 312; MIPS32: srlv 313; MIPS32: srlv 314; MIPS32: srlv 315; MIPS32: srlv 316; MIPS32: srlv 317; MIPS32: srlv 318; MIPS32: srlv 319; MIPS32: srlv 320; MIPS32: srlv 321; MIPS32: srlv 322; MIPS32: srlv 323; MIPS32: srlv 324} 325 326define internal <16 x i8> @test_ashr_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 327entry: 328 %res = ashr <16 x i8> %arg0, %arg1 329 ret <16 x i8> %res 330; CHECK-LABEL: test_ashr_v16i8 331; CHECK: sar 332; CHECK: sar 333; CHECK: sar 334; CHECK: sar 335; CHECK: sar 336; CHECK: sar 337; CHECK: sar 338; CHECK: sar 339; CHECK: sar 340; CHECK: sar 341; CHECK: sar 342; CHECK: sar 343; CHECK: sar 344; CHECK: sar 345; CHECK: sar 346; CHECK: sar 347; MIPS32-LABEL: test_ashr_v16i8 348; MIPS32: srav 349; MIPS32: srav 350; MIPS32: srav 351; MIPS32: srav 352; MIPS32: srav 353; MIPS32: srav 354; MIPS32: srav 355; MIPS32: srav 356; MIPS32: srav 357; MIPS32: srav 358; MIPS32: srav 359; MIPS32: srav 360; MIPS32: srav 361; MIPS32: srav 362; MIPS32: srav 363; MIPS32: srav 364} 365 366define internal <16 x i8> @test_udiv_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 367entry: 368 %res = udiv <16 x i8> %arg0, %arg1 369 ret <16 x i8> %res 370; CHECK-LABEL: test_udiv_v16i8 371; CHECK: div 372; CHECK: div 373; CHECK: div 374; CHECK: div 375; CHECK: div 376; CHECK: div 377; CHECK: div 378; CHECK: div 379; CHECK: div 380; CHECK: div 381; CHECK: div 382; CHECK: div 383; CHECK: div 384; CHECK: div 385; CHECK: div 386; CHECK: div 387; MIPS32-LABEL: test_udiv_v16i8 388; MIPS32: divu 389; MIPS32: divu 390; MIPS32: divu 391; MIPS32: divu 392; MIPS32: divu 393; MIPS32: divu 394; MIPS32: divu 395; MIPS32: divu 396; MIPS32: divu 397; MIPS32: divu 398; MIPS32: divu 399; MIPS32: divu 400; MIPS32: divu 401; MIPS32: divu 402; MIPS32: divu 403; MIPS32: divu 404} 405 406define internal <16 x i8> @test_sdiv_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 407entry: 408 %res = sdiv <16 x i8> %arg0, %arg1 409 ret <16 x i8> %res 410; CHECK-LABEL: test_sdiv_v16i8 411; CHECK: idiv 412; CHECK: idiv 413; CHECK: idiv 414; CHECK: idiv 415; CHECK: idiv 416; CHECK: idiv 417; CHECK: idiv 418; CHECK: idiv 419; CHECK: idiv 420; CHECK: idiv 421; CHECK: idiv 422; CHECK: idiv 423; CHECK: idiv 424; CHECK: idiv 425; CHECK: idiv 426; CHECK: idiv 427; MIPS32-LABEL: test_sdiv_v16i8 428; MIPS32: div 429; MIPS32: div 430; MIPS32: div 431; MIPS32: div 432; MIPS32: div 433; MIPS32: div 434; MIPS32: div 435; MIPS32: div 436; MIPS32: div 437; MIPS32: div 438; MIPS32: div 439; MIPS32: div 440; MIPS32: div 441; MIPS32: div 442; MIPS32: div 443; MIPS32: div 444} 445 446define internal <16 x i8> @test_urem_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 447entry: 448 %res = urem <16 x i8> %arg0, %arg1 449 ret <16 x i8> %res 450; CHECK-LABEL: test_urem_v16i8 451; CHECK: div 452; CHECK: div 453; CHECK: div 454; CHECK: div 455; CHECK: div 456; CHECK: div 457; CHECK: div 458; CHECK: div 459; CHECK: div 460; CHECK: div 461; CHECK: div 462; CHECK: div 463; CHECK: div 464; CHECK: div 465; CHECK: div 466; CHECK: div 467; MIPS32-LABEL: test_urem_v16i8 468; MIPS32: divu 469; MIPS32: divu 470; MIPS32: divu 471; MIPS32: divu 472; MIPS32: divu 473; MIPS32: divu 474; MIPS32: divu 475; MIPS32: divu 476; MIPS32: divu 477; MIPS32: divu 478; MIPS32: divu 479; MIPS32: divu 480; MIPS32: divu 481; MIPS32: divu 482; MIPS32: divu 483; MIPS32: divu 484} 485 486define internal <16 x i8> @test_srem_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { 487entry: 488 %res = srem <16 x i8> %arg0, %arg1 489 ret <16 x i8> %res 490; CHECK-LABEL: test_srem_v16i8 491; CHECK: idiv 492; CHECK: idiv 493; CHECK: idiv 494; CHECK: idiv 495; CHECK: idiv 496; CHECK: idiv 497; CHECK: idiv 498; CHECK: idiv 499; CHECK: idiv 500; CHECK: idiv 501; CHECK: idiv 502; CHECK: idiv 503; CHECK: idiv 504; CHECK: idiv 505; CHECK: idiv 506; CHECK: idiv 507; MIPS32-LABEL: test_srem_v16i8 508; MIPS32: div 509; MIPS32: div 510; MIPS32: div 511; MIPS32: div 512; MIPS32: div 513; MIPS32: div 514; MIPS32: div 515; MIPS32: div 516; MIPS32: div 517; MIPS32: div 518; MIPS32: div 519; MIPS32: div 520; MIPS32: div 521; MIPS32: div 522; MIPS32: div 523; MIPS32: div 524} 525 526define internal <8 x i16> @test_add_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 527entry: 528 %res = add <8 x i16> %arg0, %arg1 529 ret <8 x i16> %res 530; CHECK-LABEL: test_add_v8i16 531; CHECK: paddw 532; MIPS32-LABEL: test_add_v8i16 533; MIPS32: addu 534; MIPS32: addu 535; MIPS32: addu 536; MIPS32: addu 537; MIPS32: addu 538; MIPS32: addu 539; MIPS32: addu 540; MIPS32: addu 541} 542 543define internal <8 x i16> @test_and_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 544entry: 545 %res = and <8 x i16> %arg0, %arg1 546 ret <8 x i16> %res 547; CHECK-LABEL: test_and_v8i16 548; CHECK: pand 549; MIPS32-LABEL: test_and_v8i16 550; MIPS32: andi 551; MIPS32: andi 552; MIPS32: andi 553; MIPS32: andi 554; MIPS32: andi 555; MIPS32: andi 556; MIPS32: andi 557; MIPS32: andi 558} 559 560define internal <8 x i16> @test_or_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 561entry: 562 %res = or <8 x i16> %arg0, %arg1 563 ret <8 x i16> %res 564; CHECK-LABEL: test_or_v8i16 565; CHECK: por 566; MIPS32-LABEL: test_or_v8i16 567; MIPS32: or 568; MIPS32: or 569; MIPS32: or 570; MIPS32: or 571; MIPS32: or 572; MIPS32: or 573; MIPS32: or 574; MIPS32: or 575} 576 577define internal <8 x i16> @test_xor_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 578entry: 579 %res = xor <8 x i16> %arg0, %arg1 580 ret <8 x i16> %res 581; CHECK-LABEL: test_xor_v8i16 582; CHECK: pxor 583; MIPS32-LABEL: test_xor_v8i16 584; MIPS32: xor 585; MIPS32: xor 586; MIPS32: xor 587; MIPS32: xor 588; MIPS32: xor 589; MIPS32: xor 590; MIPS32: xor 591; MIPS32: xor 592} 593 594define internal <8 x i16> @test_sub_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 595entry: 596 %res = sub <8 x i16> %arg0, %arg1 597 ret <8 x i16> %res 598; CHECK-LABEL: test_sub_v8i16 599; CHECK: psubw 600; MIPS32-LABEL: test_sub_v8i16 601; MIPS32: subu 602; MIPS32: subu 603; MIPS32: subu 604; MIPS32: subu 605; MIPS32: subu 606; MIPS32: subu 607; MIPS32: subu 608; MIPS32: subu 609} 610 611define internal <8 x i16> @test_mul_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 612entry: 613 %res = mul <8 x i16> %arg0, %arg1 614 ret <8 x i16> %res 615; CHECK-LABEL: test_mul_v8i16 616; CHECK: pmullw 617; MIPS32-LABEL: test_mul_v8i16 618; MIPS32: mul 619; MIPS32: mul 620; MIPS32: mul 621; MIPS32: mul 622; MIPS32: mul 623; MIPS32: mul 624; MIPS32: mul 625; MIPS32: mul 626} 627 628define internal <8 x i16> @test_shl_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 629entry: 630 %res = shl <8 x i16> %arg0, %arg1 631 ret <8 x i16> %res 632; CHECK-LABEL: test_shl_v8i16 633; CHECK: shl 634; CHECK: shl 635; CHECK: shl 636; CHECK: shl 637; CHECK: shl 638; CHECK: shl 639; CHECK: shl 640; CHECK: shl 641; MIPS32-LABEL: test_shl_v8i16 642; MIPS32: sllv 643; MIPS32: sllv 644; MIPS32: sllv 645; MIPS32: sllv 646; MIPS32: sllv 647; MIPS32: sllv 648; MIPS32: sllv 649; MIPS32: sllv 650} 651 652define internal <8 x i16> @test_lshr_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 653entry: 654 %res = lshr <8 x i16> %arg0, %arg1 655 ret <8 x i16> %res 656; CHECK-LABEL: test_lshr_v8i16 657; CHECK: shr 658; CHECK: shr 659; CHECK: shr 660; CHECK: shr 661; CHECK: shr 662; CHECK: shr 663; CHECK: shr 664; CHECK: shr 665; MIPS32-LABEL: test_lshr_v8i16 666; MIPS32: srlv 667; MIPS32: srlv 668; MIPS32: srlv 669; MIPS32: srlv 670; MIPS32: srlv 671; MIPS32: srlv 672; MIPS32: srlv 673; MIPS32: srlv 674} 675 676define internal <8 x i16> @test_ashr_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 677entry: 678 %res = ashr <8 x i16> %arg0, %arg1 679 ret <8 x i16> %res 680; CHECK-LABEL: test_ashr_v8i16 681; CHECK: sar 682; CHECK: sar 683; CHECK: sar 684; CHECK: sar 685; CHECK: sar 686; CHECK: sar 687; CHECK: sar 688; CHECK: sar 689; MIPS32-LABEL: test_ashr_v8i16 690; MIPS32: srav 691; MIPS32: srav 692; MIPS32: srav 693; MIPS32: srav 694; MIPS32: srav 695; MIPS32: srav 696; MIPS32: srav 697; MIPS32: srav 698} 699 700define internal <8 x i16> @test_udiv_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 701entry: 702 %res = udiv <8 x i16> %arg0, %arg1 703 ret <8 x i16> %res 704; CHECK-LABEL: test_udiv_v8i16 705; CHECK: div 706; CHECK: div 707; CHECK: div 708; CHECK: div 709; CHECK: div 710; CHECK: div 711; CHECK: div 712; CHECK: div 713; MIPS32-LABEL: test_udiv_v8i16 714; MIPS32: divu 715; MIPS32: divu 716; MIPS32: divu 717; MIPS32: divu 718; MIPS32: divu 719; MIPS32: divu 720; MIPS32: divu 721; MIPS32: divu 722} 723 724define internal <8 x i16> @test_sdiv_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 725entry: 726 %res = sdiv <8 x i16> %arg0, %arg1 727 ret <8 x i16> %res 728; CHECK-LABEL: test_sdiv_v8i16 729; CHECK: idiv 730; CHECK: idiv 731; CHECK: idiv 732; CHECK: idiv 733; CHECK: idiv 734; CHECK: idiv 735; CHECK: idiv 736; CHECK: idiv 737; MIPS32-LABEL: test_sdiv_v8i16 738; MIPS32: div 739; MIPS32: div 740; MIPS32: div 741; MIPS32: div 742; MIPS32: div 743; MIPS32: div 744; MIPS32: div 745; MIPS32: div 746} 747 748define internal <8 x i16> @test_urem_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 749entry: 750 %res = urem <8 x i16> %arg0, %arg1 751 ret <8 x i16> %res 752; CHECK-LABEL: test_urem_v8i16 753; CHECK: div 754; CHECK: div 755; CHECK: div 756; CHECK: div 757; CHECK: div 758; CHECK: div 759; CHECK: div 760; CHECK: div 761; MIPS32-LABEL: test_urem_v8i16 762; MIPS32: divu 763; MIPS32: divu 764; MIPS32: divu 765; MIPS32: divu 766; MIPS32: divu 767; MIPS32: divu 768; MIPS32: divu 769; MIPS32: divu 770} 771 772define internal <8 x i16> @test_srem_v8i16(<8 x i16> %arg0, <8 x i16> %arg1) { 773entry: 774 %res = srem <8 x i16> %arg0, %arg1 775 ret <8 x i16> %res 776; CHECK-LABEL: test_srem_v8i16 777; CHECK: idiv 778; CHECK: idiv 779; CHECK: idiv 780; CHECK: idiv 781; CHECK: idiv 782; CHECK: idiv 783; CHECK: idiv 784; CHECK: idiv 785; MIPS32-LABEL: test_srem_v8i16 786; MIPS32: div 787; MIPS32: div 788; MIPS32: div 789; MIPS32: div 790; MIPS32: div 791; MIPS32: div 792; MIPS32: div 793; MIPS32: div 794} 795 796define internal <4 x i32> @test_add_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 797entry: 798 %res = add <4 x i32> %arg0, %arg1 799 ret <4 x i32> %res 800; CHECK-LABEL: test_add_v4i32 801; CHECK: paddd 802; MIPS32-LABEL: test_add_v4i32 803; MIPS32: addu 804; MIPS32: addu 805; MIPS32: addu 806; MIPS32: addu 807} 808 809define internal <4 x i32> @test_and_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 810entry: 811 %res = and <4 x i32> %arg0, %arg1 812 ret <4 x i32> %res 813; CHECK-LABEL: test_and_v4i32 814; CHECK: pand 815; MIPS32-LABEL: test_and_v4i32 816; MIPS32: and 817; MIPS32: and 818; MIPS32: and 819; MIPS32: and 820} 821 822define internal <4 x i32> @test_or_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 823entry: 824 %res = or <4 x i32> %arg0, %arg1 825 ret <4 x i32> %res 826; CHECK-LABEL: test_or_v4i32 827; CHECK: por 828; MIPS32-LABEL: test_or_v4i32 829; MIPS32: or 830; MIPS32: or 831; MIPS32: or 832; MIPS32: or 833} 834 835define internal <4 x i32> @test_xor_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 836entry: 837 %res = xor <4 x i32> %arg0, %arg1 838 ret <4 x i32> %res 839; CHECK-LABEL: test_xor_v4i32 840; CHECK: pxor 841; MIPS32-LABEL: test_xor_v4i32 842; MIPS32: xor 843; MIPS32: xor 844; MIPS32: xor 845; MIPS32: xor 846} 847 848define internal <4 x i32> @test_sub_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 849entry: 850 %res = sub <4 x i32> %arg0, %arg1 851 ret <4 x i32> %res 852; CHECK-LABEL: test_sub_v4i32 853; CHECK: psubd 854; MIPS32-LABEL: test_sub_v4i32 855; MIPS32: subu 856; MIPS32: subu 857; MIPS32: subu 858; MIPS32: subu 859} 860 861define internal <4 x i32> @test_mul_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 862entry: 863 %res = mul <4 x i32> %arg0, %arg1 864 ret <4 x i32> %res 865; CHECK-LABEL: test_mul_v4i32 866; CHECK: pmuludq 867; CHECK: pmuludq 868; 869; SSE41-LABEL: test_mul_v4i32 870; SSE41: pmulld 871; MIPS32-LABEL: test_mul_v4i32 872; MIPS32: mul 873; MIPS32: mul 874; MIPS32: mul 875; MIPS32: mul 876} 877 878define internal <4 x i32> @test_shl_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 879entry: 880 %res = shl <4 x i32> %arg0, %arg1 881 ret <4 x i32> %res 882; CHECK-LABEL: test_shl_v4i32 883; CHECK: shl 884; CHECK: shl 885; CHECK: shl 886; CHECK: shl 887 888; This line is to ensure that pmulld is generated in test_mul_v4i32 above. 889; SSE41-LABEL: test_shl_v4i32 890; MIPS32-LABEL: test_shl_v4i32 891; MIPS32: sllv 892; MIPS32: sllv 893; MIPS32: sllv 894; MIPS32: sllv 895} 896 897define internal <4 x i32> @test_lshr_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 898entry: 899 %res = lshr <4 x i32> %arg0, %arg1 900 ret <4 x i32> %res 901; CHECK-LABEL: test_lshr_v4i32 902; CHECK: shr 903; CHECK: shr 904; CHECK: shr 905; CHECK: shr 906; MIPS32-LABEL: test_lshr_v4i32 907; MIPS32: srlv 908; MIPS32: srlv 909; MIPS32: srlv 910; MIPS32: srlv 911} 912 913define internal <4 x i32> @test_ashr_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 914entry: 915 %res = ashr <4 x i32> %arg0, %arg1 916 ret <4 x i32> %res 917; CHECK-LABEL: test_ashr_v4i32 918; CHECK: sar 919; CHECK: sar 920; CHECK: sar 921; CHECK: sar 922; MIPS32-LABEL: test_ashr_v4i32 923; MIPS32: srav 924; MIPS32: srav 925; MIPS32: srav 926; MIPS32: srav 927} 928 929define internal <4 x i32> @test_udiv_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 930entry: 931 %res = udiv <4 x i32> %arg0, %arg1 932 ret <4 x i32> %res 933; CHECK-LABEL: test_udiv_v4i32 934; CHECK: div 935; CHECK: div 936; CHECK: div 937; CHECK: div 938; MIPS32-LABEL: test_udiv_v4i32 939; MIPS32: divu 940; MIPS32: divu 941; MIPS32: divu 942; MIPS32: divu 943} 944 945define internal <4 x i32> @test_sdiv_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 946entry: 947 %res = sdiv <4 x i32> %arg0, %arg1 948 ret <4 x i32> %res 949; CHECK-LABEL: test_sdiv_v4i32 950; CHECK: idiv 951; CHECK: idiv 952; CHECK: idiv 953; CHECK: idiv 954; MIPS32-LABEL: test_sdiv_v4i32 955; MIPS32: div 956; MIPS32: div 957; MIPS32: div 958; MIPS32: div 959} 960 961define internal <4 x i32> @test_urem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 962entry: 963 %res = urem <4 x i32> %arg0, %arg1 964 ret <4 x i32> %res 965; CHECK-LABEL: test_urem_v4i32 966; CHECK: div 967; CHECK: div 968; CHECK: div 969; CHECK: div 970; MIPS32-LABEL: test_urem_v4i32 971; MIPS32: divu 972; MIPS32: divu 973; MIPS32: divu 974; MIPS32: divu 975} 976 977define internal <4 x i32> @test_srem_v4i32(<4 x i32> %arg0, <4 x i32> %arg1) { 978entry: 979 %res = srem <4 x i32> %arg0, %arg1 980 ret <4 x i32> %res 981; CHECK-LABEL: test_srem_v4i32 982; CHECK: idiv 983; CHECK: idiv 984; CHECK: idiv 985; CHECK: idiv 986; MIPS32-LABEL: test_srem_v4i32 987; MIPS32: div 988; MIPS32: div 989; MIPS32: div 990; MIPS32: div 991} 992