1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Google, Inc
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <fdtdec.h>
10 #include <i2c.h>
11 #include <led.h>
12 #include <malloc.h>
13 #include <ram.h>
14 #include <spl.h>
15 #include <asm/gpio.h>
16 #include <asm/io.h>
17 #include <asm/arch/bootrom.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/arch/periph.h>
21 #include <asm/arch/pmu_rk3288.h>
22 #include <asm/arch/sdram.h>
23 #include <asm/arch/sdram_common.h>
24 #include <asm/arch/sys_proto.h>
25 #include <asm/arch/timer.h>
26 #include <dm/pinctrl.h>
27 #include <dm/root.h>
28 #include <dm/test.h>
29 #include <dm/util.h>
30 #include <power/regulator.h>
31 #include <power/rk8xx_pmic.h>
32
33 DECLARE_GLOBAL_DATA_PTR;
34
spl_boot_device(void)35 u32 spl_boot_device(void)
36 {
37 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
38 const void *blob = gd->fdt_blob;
39 struct udevice *dev;
40 const char *bootdev;
41 int node;
42 int ret;
43
44 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
45 debug("Boot device %s\n", bootdev);
46 if (!bootdev)
47 goto fallback;
48
49 node = fdt_path_offset(blob, bootdev);
50 if (node < 0) {
51 debug("node=%d\n", node);
52 goto fallback;
53 }
54 ret = device_get_global_by_of_offset(node, &dev);
55 if (ret) {
56 debug("device at node %s/%d not found: %d\n", bootdev, node,
57 ret);
58 goto fallback;
59 }
60 debug("Found device %s\n", dev->name);
61 switch (device_get_uclass_id(dev)) {
62 case UCLASS_SPI_FLASH:
63 return BOOT_DEVICE_SPI;
64 case UCLASS_MMC:
65 return BOOT_DEVICE_MMC1;
66 default:
67 debug("Booting from device uclass '%s' not supported\n",
68 dev_get_uclass_name(dev));
69 }
70
71 fallback:
72 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
73 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
74 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
75 return BOOT_DEVICE_SPI;
76 #endif
77 return BOOT_DEVICE_MMC1;
78 }
79
80 #ifdef CONFIG_SPL_MMC_SUPPORT
configure_emmc(struct udevice * pinctrl)81 static int configure_emmc(struct udevice *pinctrl)
82 {
83 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
84
85 struct gpio_desc desc;
86 int ret;
87
88 pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
89
90 /*
91 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
92 * use the EMMC_PWREN setting.
93 */
94 ret = dm_gpio_lookup_name("D9", &desc);
95 if (ret) {
96 debug("gpio ret=%d\n", ret);
97 return ret;
98 }
99 ret = dm_gpio_request(&desc, "emmc_pwren");
100 if (ret) {
101 debug("gpio_request ret=%d\n", ret);
102 return ret;
103 }
104 ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
105 if (ret) {
106 debug("gpio dir ret=%d\n", ret);
107 return ret;
108 }
109 ret = dm_gpio_set_value(&desc, 1);
110 if (ret) {
111 debug("gpio value ret=%d\n", ret);
112 return ret;
113 }
114 #endif
115 return 0;
116 }
117 #endif
118
119 #if !defined(CONFIG_SPL_OF_PLATDATA)
phycore_init(void)120 static int phycore_init(void)
121 {
122 struct udevice *pmic;
123 int ret;
124
125 ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
126 if (ret)
127 return ret;
128
129 #if defined(CONFIG_SPL_POWER_SUPPORT)
130 /* Increase USB input current to 2A */
131 ret = rk818_spl_configure_usb_input_current(pmic, 2000);
132 if (ret)
133 return ret;
134
135 /* Close charger when USB lower then 3.26V */
136 ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
137 if (ret)
138 return ret;
139 #endif
140
141 return 0;
142 }
143 #endif
144
board_init_f(ulong dummy)145 void board_init_f(ulong dummy)
146 {
147 struct udevice *pinctrl;
148 struct udevice *dev;
149 int ret;
150
151 /* Example code showing how to enable the debug UART on RK3288 */
152 #include <asm/arch/grf_rk3288.h>
153 /* Enable early UART on the RK3288 */
154 #define GRF_BASE 0xff770000
155 struct rk3288_grf * const grf = (void *)GRF_BASE;
156
157 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
158 GPIO7C6_MASK << GPIO7C6_SHIFT,
159 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
160 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
161 /*
162 * Debug UART can be used from here if required:
163 *
164 * debug_uart_init();
165 * printch('a');
166 * printhex8(0x1234);
167 * printascii("string");
168 */
169 debug_uart_init();
170 debug("\nspl:debug uart enabled in %s\n", __func__);
171 ret = spl_early_init();
172 if (ret) {
173 debug("spl_early_init() failed: %d\n", ret);
174 hang();
175 }
176
177 rockchip_timer_init();
178 configure_l2ctlr();
179
180 ret = rockchip_get_clk(&dev);
181 if (ret) {
182 debug("CLK init failed: %d\n", ret);
183 return;
184 }
185
186 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
187 if (ret) {
188 debug("Pinctrl init failed: %d\n", ret);
189 return;
190 }
191
192 #if !defined(CONFIG_SPL_OF_PLATDATA)
193 if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
194 ret = phycore_init();
195 if (ret) {
196 debug("Failed to set up phycore power settings: %d\n",
197 ret);
198 return;
199 }
200 }
201 #endif
202
203 #if !defined(CONFIG_SUPPORT_TPL)
204 debug("\nspl:init dram\n");
205 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
206 if (ret) {
207 debug("DRAM init failed: %d\n", ret);
208 return;
209 }
210 #endif
211
212 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
213 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
214 #endif
215 }
216
setup_led(void)217 static int setup_led(void)
218 {
219 #ifdef CONFIG_SPL_LED
220 struct udevice *dev;
221 char *led_name;
222 int ret;
223
224 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
225 if (!led_name)
226 return 0;
227 ret = led_get_by_label(led_name, &dev);
228 if (ret) {
229 debug("%s: get=%d\n", __func__, ret);
230 return ret;
231 }
232 ret = led_set_on(dev, 1);
233 if (ret)
234 return ret;
235 #endif
236
237 return 0;
238 }
239
spl_board_init(void)240 void spl_board_init(void)
241 {
242 struct udevice *pinctrl;
243 int ret;
244
245 ret = setup_led();
246
247 if (ret) {
248 debug("LED ret=%d\n", ret);
249 hang();
250 }
251
252 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
253 if (ret) {
254 debug("%s: Cannot find pinctrl device\n", __func__);
255 goto err;
256 }
257
258 #ifdef CONFIG_SPL_MMC_SUPPORT
259 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
260 if (ret) {
261 debug("%s: Failed to set up SD card\n", __func__);
262 goto err;
263 }
264 ret = configure_emmc(pinctrl);
265 if (ret) {
266 debug("%s: Failed to set up eMMC\n", __func__);
267 goto err;
268 }
269 #endif
270
271 /* Enable debug UART */
272 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
273 if (ret) {
274 debug("%s: Failed to set up console UART\n", __func__);
275 goto err;
276 }
277
278 preloader_console_init();
279 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
280 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
281 #endif
282 return;
283 err:
284 printf("spl_board_init: Error %d\n", ret);
285
286 /* No way to report error here */
287 hang();
288 }
289
290 #ifdef CONFIG_SPL_OS_BOOT
291
292 #define PMU_BASE 0xff730000
dram_init_banksize(void)293 int dram_init_banksize(void)
294 {
295 struct rk3288_pmu *const pmu = (void *)PMU_BASE;
296 size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
297
298 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
299 gd->bd->bi_dram[0].size = size;
300
301 return 0;
302 }
303 #endif
304