1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2003
4  * Thomas.Lange@corelatus.se
5  */
6 
7 #include <common.h>
8 #include <command.h>
9 #include <mach/au1x00.h>
10 #include <asm/mipsregs.h>
11 #include <asm/io.h>
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
dram_init(void)15 int dram_init(void)
16 {
17 	/* Sdram is setup by assembler code */
18 	/* If memory could be changed, we should return the true value here */
19 	gd->ram_size = 64 * 1024 * 1024;
20 
21 	return 0;
22 }
23 
24 #define BCSR_PCMCIA_PC0DRVEN		0x0010
25 #define BCSR_PCMCIA_PC0RST		0x0080
26 
27 /* In arch/mips/cpu/cpu.c */
28 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
29 
checkboard(void)30 int checkboard (void)
31 {
32 #if defined(CONFIG_IDE_PCMCIA) && 0
33 	u16 status;
34 #endif
35 	/* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
36 	volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
37 	u32 proc_id;
38 
39 	*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
40 
41 	proc_id = read_c0_prid();
42 
43 	switch (proc_id >> 24) {
44 	case 0:
45 		puts ("Board: Pb1000\n");
46 		printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
47 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
48 		break;
49 	case 1:
50 		puts ("Board: Pb1500\n");
51 		printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
52 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
53 		break;
54 	case 2:
55 		puts ("Board: Pb1100\n");
56 		printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
57 			(proc_id >> 8) & 0xFF, proc_id & 0xFF);
58 		break;
59 	default:
60 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
61 	}
62 
63 	set_io_port_base(0);
64 
65 #if defined(CONFIG_IDE_PCMCIA) && 0
66 	/* Enable 3.3 V on slot 0 ( VCC )
67 	   No 5V */
68 	status = 4;
69 	*pcmcia_bcsr = status;
70 
71 	status |= BCSR_PCMCIA_PC0DRVEN;
72 	*pcmcia_bcsr = status;
73 	au_sync();
74 
75 	udelay(300*1000);
76 
77 	status |= BCSR_PCMCIA_PC0RST;
78 	*pcmcia_bcsr = status;
79 	au_sync();
80 
81 	udelay(100*1000);
82 
83 	/* PCMCIA is on a 36 bit physical address.
84 	   We need to map it into a 32 bit addresses */
85 
86 #if 0
87 	/* We dont need theese unless we run whole pcmcia package */
88 	write_one_tlb(20,                 /* index */
89 		      0x01ffe000,         /* Pagemask, 16 MB pages */
90 		      CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
91 		      0x3C000017,         /* Lo0 */
92 		      0x3C200017);        /* Lo1 */
93 
94 	write_one_tlb(21,                   /* index */
95 		      0x01ffe000,           /* Pagemask, 16 MB pages */
96 		      CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
97 		      0x3D000017,           /* Lo0 */
98 		      0x3D200017);          /* Lo1 */
99 #endif	/* 0 */
100 	write_one_tlb(22,                   /* index */
101 		      0x01ffe000,           /* Pagemask, 16 MB pages */
102 		      CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
103 		      0x3E000017,           /* Lo0 */
104 		      0x3E200017);          /* Lo1 */
105 #endif	/* CONFIG_IDE_PCMCIA */
106 
107 	return 0;
108 }
109