1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Google, Inc
4 *
5 * (C) Copyright 2008-2014 Rockchip Electronics
6 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
7 */
8
9 #include <common.h>
10 #include <clk.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <i2c.h>
14 #include <asm/io.h>
15 #include <asm/arch/clock.h>
16 #include <asm/arch/i2c.h>
17 #include <asm/arch/periph.h>
18 #include <dm/pinctrl.h>
19 #include <linux/sizes.h>
20
21 /* i2c timerout */
22 #define I2C_TIMEOUT_MS 100
23 #define I2C_RETRY_COUNT 3
24
25 /* rk i2c fifo max transfer bytes */
26 #define RK_I2C_FIFO_SIZE 32
27
28 struct rk_i2c {
29 struct clk clk;
30 struct i2c_regs *regs;
31 unsigned int speed;
32 };
33
rk_i2c_get_div(int div,int * divh,int * divl)34 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
35 {
36 *divl = div / 2;
37 if (div % 2 == 0)
38 *divh = div / 2;
39 else
40 *divh = DIV_ROUND_UP(div, 2);
41 }
42
43 /*
44 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
45 * SCL = PCLK / SCLK Divisor
46 * i2c_rate = PCLK
47 */
rk_i2c_set_clk(struct rk_i2c * i2c,uint32_t scl_rate)48 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
49 {
50 uint32_t i2c_rate;
51 int div, divl, divh;
52
53 /* First get i2c rate from pclk */
54 i2c_rate = clk_get_rate(&i2c->clk);
55
56 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
57 divh = 0;
58 divl = 0;
59 if (div >= 0)
60 rk_i2c_get_div(div, &divh, &divl);
61 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
62
63 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
64 scl_rate);
65 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
66 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
67 }
68
rk_i2c_show_regs(struct i2c_regs * regs)69 static void rk_i2c_show_regs(struct i2c_regs *regs)
70 {
71 #ifdef DEBUG
72 uint i;
73
74 debug("i2c_con: 0x%08x\n", readl(®s->con));
75 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv));
76 debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr));
77 debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr));
78 debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt));
79 debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt));
80 debug("i2c_ien: 0x%08x\n", readl(®s->ien));
81 debug("i2c_ipd: 0x%08x\n", readl(®s->ipd));
82 debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt));
83 for (i = 0; i < 8; i++)
84 debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i]));
85 for (i = 0; i < 8; i++)
86 debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i]));
87 #endif
88 }
89
rk_i2c_send_start_bit(struct rk_i2c * i2c)90 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
91 {
92 struct i2c_regs *regs = i2c->regs;
93 ulong start;
94
95 debug("I2c Send Start bit.\n");
96 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
97
98 writel(I2C_CON_EN | I2C_CON_START, ®s->con);
99 writel(I2C_STARTIEN, ®s->ien);
100
101 start = get_timer(0);
102 while (1) {
103 if (readl(®s->ipd) & I2C_STARTIPD) {
104 writel(I2C_STARTIPD, ®s->ipd);
105 break;
106 }
107 if (get_timer(start) > I2C_TIMEOUT_MS) {
108 debug("I2C Send Start Bit Timeout\n");
109 rk_i2c_show_regs(regs);
110 return -ETIMEDOUT;
111 }
112 udelay(1);
113 }
114
115 return 0;
116 }
117
rk_i2c_send_stop_bit(struct rk_i2c * i2c)118 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
119 {
120 struct i2c_regs *regs = i2c->regs;
121 ulong start;
122
123 debug("I2c Send Stop bit.\n");
124 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
125
126 writel(I2C_CON_EN | I2C_CON_STOP, ®s->con);
127 writel(I2C_CON_STOP, ®s->ien);
128
129 start = get_timer(0);
130 while (1) {
131 if (readl(®s->ipd) & I2C_STOPIPD) {
132 writel(I2C_STOPIPD, ®s->ipd);
133 break;
134 }
135 if (get_timer(start) > I2C_TIMEOUT_MS) {
136 debug("I2C Send Start Bit Timeout\n");
137 rk_i2c_show_regs(regs);
138 return -ETIMEDOUT;
139 }
140 udelay(1);
141 }
142
143 return 0;
144 }
145
rk_i2c_disable(struct rk_i2c * i2c)146 static inline void rk_i2c_disable(struct rk_i2c *i2c)
147 {
148 writel(0, &i2c->regs->con);
149 }
150
rk_i2c_read(struct rk_i2c * i2c,uchar chip,uint reg,uint r_len,uchar * buf,uint b_len)151 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
152 uchar *buf, uint b_len)
153 {
154 struct i2c_regs *regs = i2c->regs;
155 uchar *pbuf = buf;
156 uint bytes_remain_len = b_len;
157 uint bytes_xferred = 0;
158 uint words_xferred = 0;
159 ulong start;
160 uint con = 0;
161 uint rxdata;
162 uint i, j;
163 int err;
164 bool snd_chunk = false;
165
166 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
167 chip, reg, r_len, b_len);
168
169 err = rk_i2c_send_start_bit(i2c);
170 if (err)
171 return err;
172
173 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr);
174 if (r_len == 0) {
175 writel(0, ®s->mrxraddr);
176 } else if (r_len < 4) {
177 writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr);
178 } else {
179 debug("I2C Read: addr len %d not supported\n", r_len);
180 return -EIO;
181 }
182
183 while (bytes_remain_len) {
184 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
185 con = I2C_CON_EN;
186 bytes_xferred = 32;
187 } else {
188 /*
189 * The hw can read up to 32 bytes at a time. If we need
190 * more than one chunk, send an ACK after the last byte.
191 */
192 con = I2C_CON_EN | I2C_CON_LASTACK;
193 bytes_xferred = bytes_remain_len;
194 }
195 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
196
197 /*
198 * make sure we are in plain RX mode if we read a second chunk
199 */
200 if (snd_chunk)
201 con |= I2C_CON_MOD(I2C_MODE_RX);
202 else
203 con |= I2C_CON_MOD(I2C_MODE_TRX);
204
205 writel(con, ®s->con);
206 writel(bytes_xferred, ®s->mrxcnt);
207 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien);
208
209 start = get_timer(0);
210 while (1) {
211 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
212 writel(I2C_NAKRCVIPD, ®s->ipd);
213 err = -EREMOTEIO;
214 }
215 if (readl(®s->ipd) & I2C_MBRFIPD) {
216 writel(I2C_MBRFIPD, ®s->ipd);
217 break;
218 }
219 if (get_timer(start) > I2C_TIMEOUT_MS) {
220 debug("I2C Read Data Timeout\n");
221 err = -ETIMEDOUT;
222 rk_i2c_show_regs(regs);
223 goto i2c_exit;
224 }
225 udelay(1);
226 }
227
228 for (i = 0; i < words_xferred; i++) {
229 rxdata = readl(®s->rxdata[i]);
230 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
231 for (j = 0; j < 4; j++) {
232 if ((i * 4 + j) == bytes_xferred)
233 break;
234 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
235 }
236 }
237
238 bytes_remain_len -= bytes_xferred;
239 snd_chunk = true;
240 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
241 }
242
243 i2c_exit:
244 rk_i2c_send_stop_bit(i2c);
245 rk_i2c_disable(i2c);
246
247 return err;
248 }
249
rk_i2c_write(struct rk_i2c * i2c,uchar chip,uint reg,uint r_len,uchar * buf,uint b_len)250 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
251 uchar *buf, uint b_len)
252 {
253 struct i2c_regs *regs = i2c->regs;
254 int err;
255 uchar *pbuf = buf;
256 uint bytes_remain_len = b_len + r_len + 1;
257 uint bytes_xferred = 0;
258 uint words_xferred = 0;
259 ulong start;
260 uint txdata;
261 uint i, j;
262
263 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
264 chip, reg, r_len, b_len);
265 err = rk_i2c_send_start_bit(i2c);
266 if (err)
267 return err;
268
269 while (bytes_remain_len) {
270 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
271 bytes_xferred = RK_I2C_FIFO_SIZE;
272 else
273 bytes_xferred = bytes_remain_len;
274 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
275
276 for (i = 0; i < words_xferred; i++) {
277 txdata = 0;
278 for (j = 0; j < 4; j++) {
279 if ((i * 4 + j) == bytes_xferred)
280 break;
281
282 if (i == 0 && j == 0 && pbuf == buf) {
283 txdata |= (chip << 1);
284 } else if (i == 0 && j <= r_len && pbuf == buf) {
285 txdata |= (reg &
286 (0xff << ((j - 1) * 8))) << 8;
287 } else {
288 txdata |= (*pbuf++)<<(j * 8);
289 }
290 }
291 writel(txdata, ®s->txdata[i]);
292 debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
293 }
294
295 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con);
296 writel(bytes_xferred, ®s->mtxcnt);
297 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien);
298
299 start = get_timer(0);
300 while (1) {
301 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
302 writel(I2C_NAKRCVIPD, ®s->ipd);
303 err = -EREMOTEIO;
304 }
305 if (readl(®s->ipd) & I2C_MBTFIPD) {
306 writel(I2C_MBTFIPD, ®s->ipd);
307 break;
308 }
309 if (get_timer(start) > I2C_TIMEOUT_MS) {
310 debug("I2C Write Data Timeout\n");
311 err = -ETIMEDOUT;
312 rk_i2c_show_regs(regs);
313 goto i2c_exit;
314 }
315 udelay(1);
316 }
317
318 bytes_remain_len -= bytes_xferred;
319 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
320 }
321
322 i2c_exit:
323 rk_i2c_send_stop_bit(i2c);
324 rk_i2c_disable(i2c);
325
326 return err;
327 }
328
rockchip_i2c_xfer(struct udevice * bus,struct i2c_msg * msg,int nmsgs)329 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
330 int nmsgs)
331 {
332 struct rk_i2c *i2c = dev_get_priv(bus);
333 int ret;
334
335 debug("i2c_xfer: %d messages\n", nmsgs);
336 for (; nmsgs > 0; nmsgs--, msg++) {
337 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
338 if (msg->flags & I2C_M_RD) {
339 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
340 msg->len);
341 } else {
342 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
343 msg->len);
344 }
345 if (ret) {
346 debug("i2c_write: error sending\n");
347 return -EREMOTEIO;
348 }
349 }
350
351 return 0;
352 }
353
rockchip_i2c_set_bus_speed(struct udevice * bus,unsigned int speed)354 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
355 {
356 struct rk_i2c *i2c = dev_get_priv(bus);
357
358 rk_i2c_set_clk(i2c, speed);
359
360 return 0;
361 }
362
rockchip_i2c_ofdata_to_platdata(struct udevice * bus)363 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
364 {
365 struct rk_i2c *priv = dev_get_priv(bus);
366 int ret;
367
368 ret = clk_get_by_index(bus, 0, &priv->clk);
369 if (ret < 0) {
370 debug("%s: Could not get clock for %s: %d\n", __func__,
371 bus->name, ret);
372 return ret;
373 }
374
375 return 0;
376 }
377
rockchip_i2c_probe(struct udevice * bus)378 static int rockchip_i2c_probe(struct udevice *bus)
379 {
380 struct rk_i2c *priv = dev_get_priv(bus);
381
382 priv->regs = dev_read_addr_ptr(bus);
383
384 return 0;
385 }
386
387 static const struct dm_i2c_ops rockchip_i2c_ops = {
388 .xfer = rockchip_i2c_xfer,
389 .set_bus_speed = rockchip_i2c_set_bus_speed,
390 };
391
392 static const struct udevice_id rockchip_i2c_ids[] = {
393 { .compatible = "rockchip,rk3066-i2c" },
394 { .compatible = "rockchip,rk3188-i2c" },
395 { .compatible = "rockchip,rk3288-i2c" },
396 { .compatible = "rockchip,rk3328-i2c" },
397 { .compatible = "rockchip,rk3399-i2c" },
398 { }
399 };
400
401 U_BOOT_DRIVER(i2c_rockchip) = {
402 .name = "i2c_rockchip",
403 .id = UCLASS_I2C,
404 .of_match = rockchip_i2c_ids,
405 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
406 .probe = rockchip_i2c_probe,
407 .priv_auto_alloc_size = sizeof(struct rk_i2c),
408 .ops = &rockchip_i2c_ops,
409 };
410