1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2001
4 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
5 */
6
7 /*
8 * Date & Time support for ST Electronics M48T35Ax RTC
9 */
10
11 /*#define DEBUG */
12
13
14 #include <common.h>
15 #include <command.h>
16 #include <rtc.h>
17 #include <config.h>
18
19 #if defined(CONFIG_CMD_DATE)
20
21 static uchar rtc_read (uchar reg);
22 static void rtc_write (uchar reg, uchar val);
23
24 /* ------------------------------------------------------------------------- */
25
rtc_get(struct rtc_time * tmp)26 int rtc_get (struct rtc_time *tmp)
27 {
28 uchar sec, min, hour, cent_day, date, month, year;
29 uchar ccr; /* Clock control register */
30
31 /* Lock RTC for read using clock control register */
32 ccr = rtc_read(0);
33 ccr = ccr | 0x40;
34 rtc_write(0, ccr);
35
36 sec = rtc_read (0x1);
37 min = rtc_read (0x2);
38 hour = rtc_read (0x3);
39 cent_day= rtc_read (0x4);
40 date = rtc_read (0x5);
41 month = rtc_read (0x6);
42 year = rtc_read (0x7);
43
44 /* UNLock RTC */
45 ccr = rtc_read(0);
46 ccr = ccr & 0xBF;
47 rtc_write(0, ccr);
48
49 debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
50 "hr: %02x min: %02x sec: %02x\n",
51 year, month, date, cent_day,
52 hour, min, sec );
53
54 tmp->tm_sec = bcd2bin (sec & 0x7F);
55 tmp->tm_min = bcd2bin (min & 0x7F);
56 tmp->tm_hour = bcd2bin (hour & 0x3F);
57 tmp->tm_mday = bcd2bin (date & 0x3F);
58 tmp->tm_mon = bcd2bin (month & 0x1F);
59 tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
60 tmp->tm_wday = bcd2bin (cent_day & 0x07);
61 tmp->tm_yday = 0;
62 tmp->tm_isdst= 0;
63
64 debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
65 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
66 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
67
68 return 0;
69 }
70
rtc_set(struct rtc_time * tmp)71 int rtc_set (struct rtc_time *tmp)
72 {
73 uchar ccr; /* Clock control register */
74 uchar century;
75
76 debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
77 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
78 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
79
80 /* Lock RTC for write using clock control register */
81 ccr = rtc_read(0);
82 ccr = ccr | 0x80;
83 rtc_write(0, ccr);
84
85 rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
86 rtc_write (0x06, bin2bcd(tmp->tm_mon));
87 rtc_write (0x05, bin2bcd(tmp->tm_mday));
88
89 century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
90 rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);
91
92 rtc_write (0x03, bin2bcd(tmp->tm_hour));
93 rtc_write (0x02, bin2bcd(tmp->tm_min ));
94 rtc_write (0x01, bin2bcd(tmp->tm_sec ));
95
96 /* UNLock RTC */
97 ccr = rtc_read(0);
98 ccr = ccr & 0x7F;
99 rtc_write(0, ccr);
100
101 return 0;
102 }
103
rtc_reset(void)104 void rtc_reset (void)
105 {
106 uchar val;
107
108 /* Clear all clock control registers */
109 rtc_write (0x0, 0x80); /* No Read Lock or calibration */
110
111 /* Clear stop bit */
112 val = rtc_read (0x1);
113 val &= 0x7f;
114 rtc_write(0x1, val);
115
116 /* Enable century / disable frequency test */
117 val = rtc_read (0x4);
118 val = (val & 0xBF) | 0x20;
119 rtc_write(0x4, val);
120
121 /* Clear write lock */
122 rtc_write(0x0, 0);
123 }
124
125 /* ------------------------------------------------------------------------- */
126
rtc_read(uchar reg)127 static uchar rtc_read (uchar reg)
128 {
129 return *(unsigned char *)
130 ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
131 }
132
rtc_write(uchar reg,uchar val)133 static void rtc_write (uchar reg, uchar val)
134 {
135 *(unsigned char *)
136 ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
137 }
138
139 #endif
140