1 /*
2  * Copyright (C) 2011 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "calling_convention_x86.h"
18 
19 #include <android-base/logging.h>
20 
21 #include "arch/instruction_set.h"
22 #include "arch/x86/jni_frame_x86.h"
23 #include "handle_scope-inl.h"
24 #include "utils/x86/managed_register_x86.h"
25 
26 namespace art {
27 namespace x86 {
28 
29 static_assert(kX86PointerSize == PointerSize::k32, "Unexpected x86 pointer size");
30 
31 static constexpr ManagedRegister kCalleeSaveRegisters[] = {
32     // Core registers.
33     X86ManagedRegister::FromCpuRegister(EBP),
34     X86ManagedRegister::FromCpuRegister(ESI),
35     X86ManagedRegister::FromCpuRegister(EDI),
36     // No hard float callee saves.
37 };
38 
39 template <size_t size>
CalculateCoreCalleeSpillMask(const ManagedRegister (& callee_saves)[size])40 static constexpr uint32_t CalculateCoreCalleeSpillMask(
41     const ManagedRegister (&callee_saves)[size]) {
42   // The spilled PC gets a special marker.
43   uint32_t result = 1 << kNumberOfCpuRegisters;
44   for (auto&& r : callee_saves) {
45     if (r.AsX86().IsCpuRegister()) {
46       result |= (1 << r.AsX86().AsCpuRegister());
47     }
48   }
49   return result;
50 }
51 
52 static constexpr uint32_t kCoreCalleeSpillMask = CalculateCoreCalleeSpillMask(kCalleeSaveRegisters);
53 static constexpr uint32_t kFpCalleeSpillMask = 0u;
54 
55 static constexpr ManagedRegister kNativeCalleeSaveRegisters[] = {
56     // Core registers.
57     X86ManagedRegister::FromCpuRegister(EBX),
58     X86ManagedRegister::FromCpuRegister(EBP),
59     X86ManagedRegister::FromCpuRegister(ESI),
60     X86ManagedRegister::FromCpuRegister(EDI),
61     // No hard float callee saves.
62 };
63 
64 static constexpr uint32_t kNativeCoreCalleeSpillMask =
65     CalculateCoreCalleeSpillMask(kNativeCalleeSaveRegisters);
66 static constexpr uint32_t kNativeFpCalleeSpillMask = 0u;
67 
68 // Calling convention
69 
InterproceduralScratchRegister() const70 ManagedRegister X86ManagedRuntimeCallingConvention::InterproceduralScratchRegister() const {
71   return X86ManagedRegister::FromCpuRegister(ECX);
72 }
73 
InterproceduralScratchRegister() const74 ManagedRegister X86JniCallingConvention::InterproceduralScratchRegister() const {
75   return X86ManagedRegister::FromCpuRegister(ECX);
76 }
77 
ReturnScratchRegister() const78 ManagedRegister X86JniCallingConvention::ReturnScratchRegister() const {
79   return ManagedRegister::NoRegister();  // No free regs, so assembler uses push/pop
80 }
81 
ReturnRegisterForShorty(const char * shorty,bool jni)82 static ManagedRegister ReturnRegisterForShorty(const char* shorty, bool jni) {
83   if (shorty[0] == 'F' || shorty[0] == 'D') {
84     if (jni) {
85       return X86ManagedRegister::FromX87Register(ST0);
86     } else {
87       return X86ManagedRegister::FromXmmRegister(XMM0);
88     }
89   } else if (shorty[0] == 'J') {
90     return X86ManagedRegister::FromRegisterPair(EAX_EDX);
91   } else if (shorty[0] == 'V') {
92     return ManagedRegister::NoRegister();
93   } else {
94     return X86ManagedRegister::FromCpuRegister(EAX);
95   }
96 }
97 
ReturnRegister()98 ManagedRegister X86ManagedRuntimeCallingConvention::ReturnRegister() {
99   return ReturnRegisterForShorty(GetShorty(), false);
100 }
101 
ReturnRegister()102 ManagedRegister X86JniCallingConvention::ReturnRegister() {
103   return ReturnRegisterForShorty(GetShorty(), true);
104 }
105 
IntReturnRegister()106 ManagedRegister X86JniCallingConvention::IntReturnRegister() {
107   return X86ManagedRegister::FromCpuRegister(EAX);
108 }
109 
110 // Managed runtime calling convention
111 
MethodRegister()112 ManagedRegister X86ManagedRuntimeCallingConvention::MethodRegister() {
113   return X86ManagedRegister::FromCpuRegister(EAX);
114 }
115 
IsCurrentParamInRegister()116 bool X86ManagedRuntimeCallingConvention::IsCurrentParamInRegister() {
117   return false;  // Everything is passed by stack
118 }
119 
IsCurrentParamOnStack()120 bool X86ManagedRuntimeCallingConvention::IsCurrentParamOnStack() {
121   // We assume all parameters are on stack, args coming via registers are spilled as entry_spills.
122   return true;
123 }
124 
CurrentParamRegister()125 ManagedRegister X86ManagedRuntimeCallingConvention::CurrentParamRegister() {
126   ManagedRegister res = ManagedRegister::NoRegister();
127   if (!IsCurrentParamAFloatOrDouble()) {
128     switch (gpr_arg_count_) {
129       case 0:
130         res = X86ManagedRegister::FromCpuRegister(ECX);
131         break;
132       case 1:
133         res = X86ManagedRegister::FromCpuRegister(EDX);
134         break;
135       case 2:
136         // Don't split a long between the last register and the stack.
137         if (IsCurrentParamALong()) {
138           return ManagedRegister::NoRegister();
139         }
140         res = X86ManagedRegister::FromCpuRegister(EBX);
141         break;
142     }
143   } else if (itr_float_and_doubles_ < 4) {
144     // First four float parameters are passed via XMM0..XMM3
145     res = X86ManagedRegister::FromXmmRegister(
146                                  static_cast<XmmRegister>(XMM0 + itr_float_and_doubles_));
147   }
148   return res;
149 }
150 
CurrentParamHighLongRegister()151 ManagedRegister X86ManagedRuntimeCallingConvention::CurrentParamHighLongRegister() {
152   ManagedRegister res = ManagedRegister::NoRegister();
153   DCHECK(IsCurrentParamALong());
154   switch (gpr_arg_count_) {
155     case 0: res = X86ManagedRegister::FromCpuRegister(EDX); break;
156     case 1: res = X86ManagedRegister::FromCpuRegister(EBX); break;
157   }
158   return res;
159 }
160 
CurrentParamStackOffset()161 FrameOffset X86ManagedRuntimeCallingConvention::CurrentParamStackOffset() {
162   return FrameOffset(displacement_.Int32Value() +   // displacement
163                      kFramePointerSize +                 // Method*
164                      (itr_slots_ * kFramePointerSize));  // offset into in args
165 }
166 
EntrySpills()167 const ManagedRegisterEntrySpills& X86ManagedRuntimeCallingConvention::EntrySpills() {
168   // We spill the argument registers on X86 to free them up for scratch use, we then assume
169   // all arguments are on the stack.
170   if (entry_spills_.size() == 0) {
171     ResetIterator(FrameOffset(0));
172     while (HasNext()) {
173       ManagedRegister in_reg = CurrentParamRegister();
174       bool is_long = IsCurrentParamALong();
175       if (!in_reg.IsNoRegister()) {
176         int32_t size = IsParamADouble(itr_args_) ? 8 : 4;
177         int32_t spill_offset = CurrentParamStackOffset().Uint32Value();
178         ManagedRegisterSpill spill(in_reg, size, spill_offset);
179         entry_spills_.push_back(spill);
180         if (is_long) {
181           // special case, as we need a second register here.
182           in_reg = CurrentParamHighLongRegister();
183           DCHECK(!in_reg.IsNoRegister());
184           // We have to spill the second half of the long.
185           ManagedRegisterSpill spill2(in_reg, size, spill_offset + 4);
186           entry_spills_.push_back(spill2);
187         }
188 
189         // Keep track of the number of GPRs allocated.
190         if (!IsCurrentParamAFloatOrDouble()) {
191           if (is_long) {
192             // Long was allocated in 2 registers.
193             gpr_arg_count_ += 2;
194           } else {
195             gpr_arg_count_++;
196           }
197         }
198       } else if (is_long) {
199         // We need to skip the unused last register, which is empty.
200         // If we are already out of registers, this is harmless.
201         gpr_arg_count_ += 2;
202       }
203       Next();
204     }
205   }
206   return entry_spills_;
207 }
208 
209 // JNI calling convention
210 
X86JniCallingConvention(bool is_static,bool is_synchronized,bool is_critical_native,const char * shorty)211 X86JniCallingConvention::X86JniCallingConvention(bool is_static,
212                                                  bool is_synchronized,
213                                                  bool is_critical_native,
214                                                  const char* shorty)
215     : JniCallingConvention(is_static,
216                            is_synchronized,
217                            is_critical_native,
218                            shorty,
219                            kX86PointerSize) {
220 }
221 
CoreSpillMask() const222 uint32_t X86JniCallingConvention::CoreSpillMask() const {
223   return is_critical_native_ ? 0u : kCoreCalleeSpillMask;
224 }
225 
FpSpillMask() const226 uint32_t X86JniCallingConvention::FpSpillMask() const {
227   return is_critical_native_ ? 0u : kFpCalleeSpillMask;
228 }
229 
FrameSize() const230 size_t X86JniCallingConvention::FrameSize() const {
231   if (is_critical_native_) {
232     CHECK(!SpillsMethod());
233     CHECK(!HasLocalReferenceSegmentState());
234     CHECK(!HasHandleScope());
235     CHECK(!SpillsReturnValue());
236     return 0u;  // There is no managed frame for @CriticalNative.
237   }
238 
239   // Method*, PC return address and callee save area size, local reference segment state
240   CHECK(SpillsMethod());
241   const size_t method_ptr_size = static_cast<size_t>(kX86PointerSize);
242   const size_t pc_return_addr_size = kFramePointerSize;
243   const size_t callee_save_area_size = CalleeSaveRegisters().size() * kFramePointerSize;
244   size_t total_size = method_ptr_size + pc_return_addr_size + callee_save_area_size;
245 
246   CHECK(HasLocalReferenceSegmentState());
247   total_size += kFramePointerSize;
248 
249   CHECK(HasHandleScope());
250   total_size += HandleScope::SizeOf(kX86_64PointerSize, ReferenceCount());
251 
252   // Plus return value spill area size
253   CHECK(SpillsReturnValue());
254   total_size += SizeOfReturnValue();
255 
256   return RoundUp(total_size, kStackAlignment);
257 }
258 
OutArgSize() const259 size_t X86JniCallingConvention::OutArgSize() const {
260   // Count param args, including JNIEnv* and jclass*; count 8-byte args twice.
261   size_t all_args = NumberOfExtraArgumentsForJni() + NumArgs() + NumLongOrDoubleArgs();
262   // The size of outgoiong arguments.
263   size_t size = all_args * kFramePointerSize;
264 
265   // @CriticalNative can use tail call as all managed callee saves are preserved by AAPCS.
266   static_assert((kCoreCalleeSpillMask & ~kNativeCoreCalleeSpillMask) == 0u);
267   static_assert((kFpCalleeSpillMask & ~kNativeFpCalleeSpillMask) == 0u);
268 
269   if (UNLIKELY(IsCriticalNative())) {
270     // Add return address size for @CriticalNative.
271     // For normal native the return PC is part of the managed stack frame instead of out args.
272     size += kFramePointerSize;
273     // For @CriticalNative, we can make a tail call if there are no stack args
274     // and the return type is not FP type (needs moving from ST0 to MMX0) and
275     // we do not need to extend the result.
276     bool return_type_ok = GetShorty()[0] == 'I' || GetShorty()[0] == 'J' || GetShorty()[0] == 'V';
277     DCHECK_EQ(
278         return_type_ok,
279         GetShorty()[0] != 'F' && GetShorty()[0] != 'D' && !RequiresSmallResultTypeExtension());
280     if (return_type_ok && size == kFramePointerSize) {
281       // Note: This is not aligned to kNativeStackAlignment but that's OK for tail call.
282       static_assert(kFramePointerSize < kNativeStackAlignment);
283       DCHECK_EQ(kFramePointerSize, GetCriticalNativeOutArgsSize(GetShorty(), NumArgs() + 1u));
284       return kFramePointerSize;
285     }
286   }
287 
288   size_t out_args_size = RoundUp(size, kNativeStackAlignment);
289   if (UNLIKELY(IsCriticalNative())) {
290     DCHECK_EQ(out_args_size, GetCriticalNativeOutArgsSize(GetShorty(), NumArgs() + 1u));
291   }
292   return out_args_size;
293 }
294 
CalleeSaveRegisters() const295 ArrayRef<const ManagedRegister> X86JniCallingConvention::CalleeSaveRegisters() const {
296   if (UNLIKELY(IsCriticalNative())) {
297     // Do not spill anything, whether tail call or not (return PC is already on the stack).
298     return ArrayRef<const ManagedRegister>();
299   } else {
300     return ArrayRef<const ManagedRegister>(kCalleeSaveRegisters);
301   }
302 }
303 
IsCurrentParamInRegister()304 bool X86JniCallingConvention::IsCurrentParamInRegister() {
305   return false;  // Everything is passed by stack.
306 }
307 
IsCurrentParamOnStack()308 bool X86JniCallingConvention::IsCurrentParamOnStack() {
309   return true;  // Everything is passed by stack.
310 }
311 
CurrentParamRegister()312 ManagedRegister X86JniCallingConvention::CurrentParamRegister() {
313   LOG(FATAL) << "Should not reach here";
314   UNREACHABLE();
315 }
316 
CurrentParamStackOffset()317 FrameOffset X86JniCallingConvention::CurrentParamStackOffset() {
318   return FrameOffset(displacement_.Int32Value() - OutArgSize() + (itr_slots_ * kFramePointerSize));
319 }
320 
HiddenArgumentRegister() const321 ManagedRegister X86JniCallingConvention::HiddenArgumentRegister() const {
322   CHECK(IsCriticalNative());
323   // EAX is neither managed callee-save, nor argument register, nor scratch register.
324   DCHECK(std::none_of(kCalleeSaveRegisters,
325                       kCalleeSaveRegisters + std::size(kCalleeSaveRegisters),
326                       [](ManagedRegister callee_save) constexpr {
327                         return callee_save.Equals(X86ManagedRegister::FromCpuRegister(EAX));
328                       }));
329   DCHECK(!InterproceduralScratchRegister().Equals(X86ManagedRegister::FromCpuRegister(EAX)));
330   return X86ManagedRegister::FromCpuRegister(EAX);
331 }
332 
UseTailCall() const333 bool X86JniCallingConvention::UseTailCall() const {
334   CHECK(IsCriticalNative());
335   return OutArgSize() == kFramePointerSize;
336 }
337 
338 }  // namespace x86
339 }  // namespace art
340