1 /*
2  * Copyright (C) 2011 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "context_x86_64.h"
18 
19 #include "base/bit_utils.h"
20 #include "base/bit_utils_iterator.h"
21 #include "quick/quick_method_frame_info.h"
22 
23 namespace art {
24 namespace x86_64 {
25 
26 static constexpr uintptr_t gZero = 0;
27 
Reset()28 void X86_64Context::Reset() {
29   std::fill_n(gprs_, arraysize(gprs_), nullptr);
30   std::fill_n(fprs_, arraysize(fprs_), nullptr);
31   gprs_[RSP] = &rsp_;
32   gprs_[RDI] = &arg0_;
33   // Initialize registers with easy to spot debug values.
34   rsp_ = X86_64Context::kBadGprBase + RSP;
35   rip_ = X86_64Context::kBadGprBase + kNumberOfCpuRegisters;
36   arg0_ = 0;
37 }
38 
FillCalleeSaves(uint8_t * frame,const QuickMethodFrameInfo & frame_info)39 void X86_64Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
40   int spill_pos = 0;
41 
42   // Core registers come first, from the highest down to the lowest.
43   uint32_t core_regs =
44       frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters);
45   DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs));  // Return address spill.
46   for (uint32_t core_reg : HighToLowBits(core_regs)) {
47     gprs_[core_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
48     ++spill_pos;
49   }
50   DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
51 
52   // FP registers come second, from the highest down to the lowest.
53   uint32_t fp_regs = frame_info.FpSpillMask();
54   DCHECK_EQ(0u, fp_regs & (static_cast<uint32_t>(-1) << kNumberOfFloatRegisters));
55   for (uint32_t fp_reg : HighToLowBits(fp_regs)) {
56     fprs_[fp_reg] = reinterpret_cast<uint64_t*>(
57         CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes()));
58     ++spill_pos;
59   }
60   DCHECK_EQ(spill_pos,
61             POPCOUNT(frame_info.CoreSpillMask()) - 1 + POPCOUNT(frame_info.FpSpillMask()));
62 }
63 
SmashCallerSaves()64 void X86_64Context::SmashCallerSaves() {
65   // This needs to be 0 because we want a null/zero return value.
66   gprs_[RAX] = const_cast<uintptr_t*>(&gZero);
67   gprs_[RDX] = const_cast<uintptr_t*>(&gZero);
68   gprs_[RCX] = nullptr;
69   gprs_[RSI] = nullptr;
70   gprs_[RDI] = nullptr;
71   gprs_[R8] = nullptr;
72   gprs_[R9] = nullptr;
73   gprs_[R10] = nullptr;
74   gprs_[R11] = nullptr;
75   fprs_[XMM0] = nullptr;
76   fprs_[XMM1] = nullptr;
77   fprs_[XMM2] = nullptr;
78   fprs_[XMM3] = nullptr;
79   fprs_[XMM4] = nullptr;
80   fprs_[XMM5] = nullptr;
81   fprs_[XMM6] = nullptr;
82   fprs_[XMM7] = nullptr;
83   fprs_[XMM8] = nullptr;
84   fprs_[XMM9] = nullptr;
85   fprs_[XMM10] = nullptr;
86   fprs_[XMM11] = nullptr;
87 }
88 
SetGPR(uint32_t reg,uintptr_t value)89 void X86_64Context::SetGPR(uint32_t reg, uintptr_t value) {
90   CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
91   DCHECK(IsAccessibleGPR(reg));
92   CHECK_NE(gprs_[reg], &gZero);
93   *gprs_[reg] = value;
94 }
95 
SetFPR(uint32_t reg,uintptr_t value)96 void X86_64Context::SetFPR(uint32_t reg, uintptr_t value) {
97   CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
98   DCHECK(IsAccessibleFPR(reg));
99   CHECK_NE(fprs_[reg], reinterpret_cast<const uint64_t*>(&gZero));
100   *fprs_[reg] = value;
101 }
102 
103 extern "C" NO_RETURN void art_quick_do_long_jump(uintptr_t*, uintptr_t*);
104 
DoLongJump()105 void X86_64Context::DoLongJump() {
106 #if defined(__x86_64__)
107   uintptr_t gprs[kNumberOfCpuRegisters + 1];
108   uintptr_t fprs[kNumberOfFloatRegisters];
109 
110   for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) {
111     gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86_64Context::kBadGprBase + i;
112   }
113   for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
114     fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : X86_64Context::kBadFprBase + i;
115   }
116 
117   // We want to load the stack pointer one slot below so that the ret will pop eip.
118   uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t);
119   gprs[kNumberOfCpuRegisters] = rsp;
120   *(reinterpret_cast<uintptr_t*>(rsp)) = rip_;
121 
122   art_quick_do_long_jump(gprs, fprs);
123 #else
124   UNIMPLEMENTED(FATAL);
125   UNREACHABLE();
126 #endif
127 }
128 
129 }  // namespace x86_64
130 }  // namespace art
131