1 #include <gtest/gtest.h> 2 3 #include <cpuinfo.h> 4 5 6 TEST(PROCESSORS_COUNT, non_zero) { 7 ASSERT_TRUE(cpuinfo_initialize()); 8 EXPECT_NE(0, cpuinfo_get_processors_count()); 9 cpuinfo_deinitialize(); 10 } 11 12 TEST(PROCESSORS, non_null) { 13 ASSERT_TRUE(cpuinfo_initialize()); 14 EXPECT_TRUE(cpuinfo_get_processors()); 15 cpuinfo_deinitialize(); 16 } 17 18 TEST(PROCESSOR, non_null) { 19 ASSERT_TRUE(cpuinfo_initialize()); 20 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 21 EXPECT_TRUE(cpuinfo_get_processor(i)); 22 } 23 cpuinfo_deinitialize(); 24 } 25 26 TEST(PROCESSOR, valid_smt_id) { 27 ASSERT_TRUE(cpuinfo_initialize()); 28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 29 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 30 ASSERT_TRUE(processor); 31 const cpuinfo_core* core = processor->core; 32 ASSERT_TRUE(core); 33 34 EXPECT_LT(processor->smt_id, core->processor_count); 35 } 36 cpuinfo_deinitialize(); 37 } 38 39 TEST(PROCESSOR, valid_core) { 40 ASSERT_TRUE(cpuinfo_initialize()); 41 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 42 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 43 ASSERT_TRUE(processor); 44 45 EXPECT_TRUE(processor->core); 46 } 47 cpuinfo_deinitialize(); 48 } 49 50 TEST(PROCESSOR, consistent_core) { 51 ASSERT_TRUE(cpuinfo_initialize()); 52 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 53 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 54 ASSERT_TRUE(processor); 55 const cpuinfo_core* core = processor->core; 56 ASSERT_TRUE(core); 57 58 EXPECT_GE(i, core->processor_start); 59 EXPECT_LT(i, core->processor_start + core->processor_count); 60 } 61 cpuinfo_deinitialize(); 62 } 63 64 TEST(PROCESSOR, valid_cluster) { 65 ASSERT_TRUE(cpuinfo_initialize()); 66 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 67 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 68 ASSERT_TRUE(processor); 69 70 EXPECT_TRUE(processor->cluster); 71 } 72 cpuinfo_deinitialize(); 73 } 74 75 TEST(PROCESSOR, consistent_cluster) { 76 ASSERT_TRUE(cpuinfo_initialize()); 77 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 78 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 79 ASSERT_TRUE(processor); 80 const cpuinfo_cluster* cluster = processor->cluster; 81 ASSERT_TRUE(cluster); 82 83 EXPECT_GE(i, cluster->processor_start); 84 EXPECT_LT(i, cluster->processor_start + cluster->processor_count); 85 } 86 cpuinfo_deinitialize(); 87 } 88 89 TEST(PROCESSOR, valid_package) { 90 ASSERT_TRUE(cpuinfo_initialize()); 91 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 92 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 93 ASSERT_TRUE(processor); 94 95 EXPECT_TRUE(processor->package); 96 } 97 cpuinfo_deinitialize(); 98 } 99 100 TEST(PROCESSOR, consistent_package) { 101 ASSERT_TRUE(cpuinfo_initialize()); 102 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 103 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 104 ASSERT_TRUE(processor); 105 const cpuinfo_package* package = processor->package; 106 ASSERT_TRUE(package); 107 108 EXPECT_GE(i, package->processor_start); 109 EXPECT_LT(i, package->processor_start + package->processor_count); 110 } 111 cpuinfo_deinitialize(); 112 } 113 114 TEST(PROCESSOR, consistent_l1i) { 115 ASSERT_TRUE(cpuinfo_initialize()); 116 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 117 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 118 ASSERT_TRUE(processor); 119 const cpuinfo_cache* l1i = processor->cache.l1i; 120 if (l1i != nullptr) { 121 EXPECT_GE(i, l1i->processor_start); 122 EXPECT_LT(i, l1i->processor_start + l1i->processor_count); 123 } 124 } 125 cpuinfo_deinitialize(); 126 } 127 128 TEST(PROCESSOR, consistent_l1d) { 129 ASSERT_TRUE(cpuinfo_initialize()); 130 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 131 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 132 ASSERT_TRUE(processor); 133 const cpuinfo_cache* l1d = processor->cache.l1d; 134 if (l1d != nullptr) { 135 EXPECT_GE(i, l1d->processor_start); 136 EXPECT_LT(i, l1d->processor_start + l1d->processor_count); 137 } 138 } 139 cpuinfo_deinitialize(); 140 } 141 142 TEST(PROCESSOR, consistent_l2) { 143 ASSERT_TRUE(cpuinfo_initialize()); 144 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 145 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 146 ASSERT_TRUE(processor); 147 const cpuinfo_cache* l2 = processor->cache.l2; 148 if (l2 != nullptr) { 149 EXPECT_GE(i, l2->processor_start); 150 EXPECT_LT(i, l2->processor_start + l2->processor_count); 151 } 152 } 153 cpuinfo_deinitialize(); 154 } 155 156 TEST(PROCESSOR, consistent_l3) { 157 ASSERT_TRUE(cpuinfo_initialize()); 158 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 159 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 160 ASSERT_TRUE(processor); 161 const cpuinfo_cache* l3 = processor->cache.l3; 162 if (l3 != nullptr) { 163 EXPECT_GE(i, l3->processor_start); 164 EXPECT_LT(i, l3->processor_start + l3->processor_count); 165 } 166 } 167 cpuinfo_deinitialize(); 168 } 169 170 TEST(PROCESSOR, consistent_l4) { 171 ASSERT_TRUE(cpuinfo_initialize()); 172 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 173 const cpuinfo_processor* processor = cpuinfo_get_processor(i); 174 ASSERT_TRUE(processor); 175 const cpuinfo_cache* l4 = processor->cache.l4; 176 if (l4 != nullptr) { 177 EXPECT_GE(i, l4->processor_start); 178 EXPECT_LT(i, l4->processor_start + l4->processor_count); 179 } 180 } 181 cpuinfo_deinitialize(); 182 } 183 184 TEST(CORES_COUNT, within_bounds) { 185 ASSERT_TRUE(cpuinfo_initialize()); 186 EXPECT_NE(0, cpuinfo_get_cores_count()); 187 EXPECT_LE(cpuinfo_get_cores_count(), cpuinfo_get_processors_count()); 188 EXPECT_GE(cpuinfo_get_cores_count(), cpuinfo_get_packages_count()); 189 cpuinfo_deinitialize(); 190 } 191 192 TEST(CORES, non_null) { 193 ASSERT_TRUE(cpuinfo_initialize()); 194 EXPECT_TRUE(cpuinfo_get_cores()); 195 cpuinfo_deinitialize(); 196 } 197 198 TEST(CORE, non_null) { 199 ASSERT_TRUE(cpuinfo_initialize()); 200 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 201 EXPECT_TRUE(cpuinfo_get_core(i)); 202 } 203 cpuinfo_deinitialize(); 204 } 205 206 TEST(CORE, non_zero_processors) { 207 ASSERT_TRUE(cpuinfo_initialize()); 208 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 209 const cpuinfo_core* core = cpuinfo_get_core(i); 210 ASSERT_TRUE(core); 211 212 EXPECT_NE(0, core->processor_count); 213 } 214 cpuinfo_deinitialize(); 215 } 216 217 TEST(CORE, consistent_processors) { 218 ASSERT_TRUE(cpuinfo_initialize()); 219 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 220 const cpuinfo_core* core = cpuinfo_get_core(i); 221 ASSERT_TRUE(core); 222 223 for (uint32_t i = 0; i < core->processor_count; i++) { 224 const cpuinfo_processor* processor = cpuinfo_get_processor(core->processor_start + i); 225 ASSERT_TRUE(processor); 226 227 EXPECT_EQ(core, processor->core); 228 } 229 } 230 cpuinfo_deinitialize(); 231 } 232 233 TEST(CORE, valid_core_id) { 234 ASSERT_TRUE(cpuinfo_initialize()); 235 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 236 const cpuinfo_core* core = cpuinfo_get_core(i); 237 ASSERT_TRUE(core); 238 const cpuinfo_package* package = core->package; 239 ASSERT_TRUE(package); 240 241 EXPECT_LT(core->core_id, package->core_count); 242 } 243 cpuinfo_deinitialize(); 244 } 245 246 TEST(CORE, valid_cluster) { 247 ASSERT_TRUE(cpuinfo_initialize()); 248 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 249 const cpuinfo_core* core = cpuinfo_get_core(i); 250 ASSERT_TRUE(core); 251 252 EXPECT_TRUE(core->cluster); 253 } 254 cpuinfo_deinitialize(); 255 } 256 257 TEST(CORE, consistent_cluster) { 258 ASSERT_TRUE(cpuinfo_initialize()); 259 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 260 const cpuinfo_core* core = cpuinfo_get_core(i); 261 ASSERT_TRUE(core); 262 const cpuinfo_cluster* cluster = core->cluster; 263 ASSERT_TRUE(cluster); 264 265 EXPECT_GE(i, cluster->core_start); 266 EXPECT_LT(i, cluster->core_start + cluster->core_count); 267 } 268 cpuinfo_deinitialize(); 269 } 270 271 TEST(CORE, valid_package) { 272 ASSERT_TRUE(cpuinfo_initialize()); 273 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 274 const cpuinfo_core* core = cpuinfo_get_core(i); 275 ASSERT_TRUE(core); 276 277 EXPECT_TRUE(core->package); 278 } 279 cpuinfo_deinitialize(); 280 } 281 282 TEST(CORE, consistent_package) { 283 ASSERT_TRUE(cpuinfo_initialize()); 284 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 285 const cpuinfo_core* core = cpuinfo_get_core(i); 286 ASSERT_TRUE(core); 287 const cpuinfo_package* package = core->package; 288 ASSERT_TRUE(package); 289 290 EXPECT_GE(i, package->core_start); 291 EXPECT_LT(i, package->core_start + package->core_count); 292 } 293 cpuinfo_deinitialize(); 294 } 295 296 TEST(CORE, known_vendor) { 297 ASSERT_TRUE(cpuinfo_initialize()); 298 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 299 const cpuinfo_core* core = cpuinfo_get_core(i); 300 ASSERT_TRUE(core); 301 302 EXPECT_NE(cpuinfo_vendor_unknown, core->vendor); 303 } 304 cpuinfo_deinitialize(); 305 } 306 307 TEST(CORE, known_uarch) { 308 ASSERT_TRUE(cpuinfo_initialize()); 309 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 310 const cpuinfo_core* core = cpuinfo_get_core(i); 311 ASSERT_TRUE(core); 312 313 EXPECT_NE(cpuinfo_uarch_unknown, core->uarch); 314 } 315 cpuinfo_deinitialize(); 316 } 317 318 TEST(CLUSTERS_COUNT, within_bounds) { 319 ASSERT_TRUE(cpuinfo_initialize()); 320 EXPECT_NE(0, cpuinfo_get_clusters_count()); 321 EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_cores_count()); 322 EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_processors_count()); 323 EXPECT_GE(cpuinfo_get_clusters_count(), cpuinfo_get_packages_count()); 324 cpuinfo_deinitialize(); 325 } 326 327 TEST(CLUSTERS, non_null) { 328 ASSERT_TRUE(cpuinfo_initialize()); 329 EXPECT_TRUE(cpuinfo_get_clusters()); 330 cpuinfo_deinitialize(); 331 } 332 333 TEST(CLUSTER, non_null) { 334 ASSERT_TRUE(cpuinfo_initialize()); 335 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 336 EXPECT_TRUE(cpuinfo_get_cluster(i)); 337 } 338 cpuinfo_deinitialize(); 339 } 340 341 TEST(CLUSTER, non_zero_processors) { 342 ASSERT_TRUE(cpuinfo_initialize()); 343 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 344 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 345 ASSERT_TRUE(cluster); 346 347 EXPECT_NE(0, cluster->processor_count); 348 } 349 cpuinfo_deinitialize(); 350 } 351 352 TEST(CLUSTER, valid_processors) { 353 ASSERT_TRUE(cpuinfo_initialize()); 354 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 355 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 356 ASSERT_TRUE(cluster); 357 358 EXPECT_LT(cluster->processor_start, cpuinfo_get_processors_count()); 359 EXPECT_LE(cluster->processor_start + cluster->processor_count, cpuinfo_get_processors_count()); 360 } 361 cpuinfo_deinitialize(); 362 } 363 364 TEST(CLUSTER, consistent_processors) { 365 ASSERT_TRUE(cpuinfo_initialize()); 366 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 367 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 368 ASSERT_TRUE(cluster); 369 370 for (uint32_t j = 0; j < cluster->processor_count; j++) { 371 const cpuinfo_processor* processor = cpuinfo_get_processor(cluster->processor_start + j); 372 EXPECT_EQ(cluster, processor->cluster); 373 } 374 } 375 cpuinfo_deinitialize(); 376 } 377 378 TEST(CLUSTER, non_zero_cores) { 379 ASSERT_TRUE(cpuinfo_initialize()); 380 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 381 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 382 ASSERT_TRUE(cluster); 383 384 EXPECT_NE(0, cluster->core_count); 385 } 386 cpuinfo_deinitialize(); 387 } 388 389 TEST(CLUSTER, valid_cores) { 390 ASSERT_TRUE(cpuinfo_initialize()); 391 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 392 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 393 ASSERT_TRUE(cluster); 394 395 EXPECT_LT(cluster->core_start, cpuinfo_get_cores_count()); 396 EXPECT_LE(cluster->core_start + cluster->core_count, cpuinfo_get_cores_count()); 397 } 398 cpuinfo_deinitialize(); 399 } 400 401 TEST(CLUSTER, consistent_cores) { 402 ASSERT_TRUE(cpuinfo_initialize()); 403 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 404 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 405 ASSERT_TRUE(cluster); 406 407 for (uint32_t j = 0; j < cluster->core_count; j++) { 408 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 409 ASSERT_TRUE(core); 410 411 EXPECT_EQ(cluster, core->cluster); 412 } 413 } 414 cpuinfo_deinitialize(); 415 } 416 417 TEST(CLUSTER, valid_cluster_id) { 418 ASSERT_TRUE(cpuinfo_initialize()); 419 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 420 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 421 ASSERT_TRUE(cluster); 422 423 for (uint32_t j = 0; j < cluster->core_count; j++) { 424 const cpuinfo_package* package = cluster->package; 425 ASSERT_TRUE(package); 426 427 EXPECT_LT(cluster->cluster_id, package->cluster_count); 428 } 429 } 430 cpuinfo_deinitialize(); 431 } 432 433 TEST(CLUSTER, valid_package) { 434 ASSERT_TRUE(cpuinfo_initialize()); 435 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 436 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 437 ASSERT_TRUE(cluster); 438 439 EXPECT_TRUE(cluster->package); 440 } 441 cpuinfo_deinitialize(); 442 } 443 444 TEST(CLUSTER, consistent_package) { 445 ASSERT_TRUE(cpuinfo_initialize()); 446 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 447 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 448 ASSERT_TRUE(cluster); 449 const cpuinfo_package* package = cluster->package; 450 ASSERT_TRUE(package); 451 452 EXPECT_GE(i, package->cluster_start); 453 EXPECT_LT(i, package->cluster_start + package->cluster_count); 454 } 455 cpuinfo_deinitialize(); 456 } 457 458 TEST(CLUSTER, consistent_vendor) { 459 ASSERT_TRUE(cpuinfo_initialize()); 460 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 461 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 462 ASSERT_TRUE(cluster); 463 464 for (uint32_t j = 0; j < cluster->core_count; j++) { 465 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 466 ASSERT_TRUE(core); 467 468 EXPECT_EQ(cluster->vendor, core->vendor); 469 } 470 } 471 cpuinfo_deinitialize(); 472 } 473 474 TEST(CLUSTER, consistent_uarch) { 475 ASSERT_TRUE(cpuinfo_initialize()); 476 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 477 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 478 ASSERT_TRUE(cluster); 479 480 for (uint32_t j = 0; j < cluster->core_count; j++) { 481 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 482 ASSERT_TRUE(core); 483 484 EXPECT_EQ(cluster->uarch, core->uarch); 485 } 486 } 487 cpuinfo_deinitialize(); 488 } 489 490 #if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64 491 TEST(CLUSTER, consistent_cpuid) { 492 ASSERT_TRUE(cpuinfo_initialize()); 493 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 494 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 495 ASSERT_TRUE(cluster); 496 497 for (uint32_t j = 0; j < cluster->core_count; j++) { 498 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 499 ASSERT_TRUE(core); 500 501 EXPECT_EQ(cluster->cpuid, core->cpuid); 502 } 503 } 504 cpuinfo_deinitialize(); 505 } 506 #endif /* CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64 */ 507 508 #if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 509 TEST(CLUSTER, consistent_midr) { 510 ASSERT_TRUE(cpuinfo_initialize()); 511 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 512 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 513 ASSERT_TRUE(cluster); 514 515 for (uint32_t j = 0; j < cluster->core_count; j++) { 516 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 517 ASSERT_TRUE(core); 518 519 EXPECT_EQ(cluster->midr, core->midr); 520 } 521 } 522 cpuinfo_deinitialize(); 523 } 524 #endif /* CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 */ 525 526 TEST(CLUSTER, consistent_frequency) { 527 ASSERT_TRUE(cpuinfo_initialize()); 528 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 529 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i); 530 ASSERT_TRUE(cluster); 531 532 for (uint32_t j = 0; j < cluster->core_count; j++) { 533 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j); 534 ASSERT_TRUE(core); 535 536 EXPECT_EQ(cluster->frequency, core->frequency); 537 } 538 } 539 cpuinfo_deinitialize(); 540 } 541 542 TEST(PACKAGES_COUNT, within_bounds) { 543 ASSERT_TRUE(cpuinfo_initialize()); 544 EXPECT_NE(0, cpuinfo_get_packages_count()); 545 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_cores_count()); 546 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_processors_count()); 547 cpuinfo_deinitialize(); 548 } 549 550 TEST(PACKAGES, non_null) { 551 ASSERT_TRUE(cpuinfo_initialize()); 552 EXPECT_TRUE(cpuinfo_get_packages()); 553 cpuinfo_deinitialize(); 554 } 555 556 TEST(PACKAGE, non_null) { 557 ASSERT_TRUE(cpuinfo_initialize()); 558 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 559 EXPECT_TRUE(cpuinfo_get_package(i)); 560 } 561 cpuinfo_deinitialize(); 562 } 563 564 TEST(PACKAGE, non_zero_processors) { 565 ASSERT_TRUE(cpuinfo_initialize()); 566 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 567 const cpuinfo_package* package = cpuinfo_get_package(i); 568 ASSERT_TRUE(package); 569 570 EXPECT_NE(0, package->processor_count); 571 } 572 cpuinfo_deinitialize(); 573 } 574 575 TEST(PACKAGE, valid_processors) { 576 ASSERT_TRUE(cpuinfo_initialize()); 577 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 578 const cpuinfo_package* package = cpuinfo_get_package(i); 579 ASSERT_TRUE(package); 580 581 EXPECT_LT(package->processor_start, cpuinfo_get_processors_count()); 582 EXPECT_LE(package->processor_start + package->processor_count, cpuinfo_get_processors_count()); 583 } 584 cpuinfo_deinitialize(); 585 } 586 587 TEST(PACKAGE, consistent_processors) { 588 ASSERT_TRUE(cpuinfo_initialize()); 589 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 590 const cpuinfo_package* package = cpuinfo_get_package(i); 591 ASSERT_TRUE(package); 592 593 for (uint32_t j = 0; j < package->processor_count; j++) { 594 const cpuinfo_processor* processor = cpuinfo_get_processor(package->processor_start + j); 595 ASSERT_TRUE(processor); 596 597 EXPECT_EQ(package, processor->package); 598 } 599 } 600 cpuinfo_deinitialize(); 601 } 602 603 TEST(PACKAGE, non_zero_cores) { 604 ASSERT_TRUE(cpuinfo_initialize()); 605 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 606 const cpuinfo_package* package = cpuinfo_get_package(i); 607 ASSERT_TRUE(package); 608 609 EXPECT_NE(0, package->core_count); 610 } 611 cpuinfo_deinitialize(); 612 } 613 614 TEST(PACKAGE, valid_cores) { 615 ASSERT_TRUE(cpuinfo_initialize()); 616 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 617 const cpuinfo_package* package = cpuinfo_get_package(i); 618 ASSERT_TRUE(package); 619 620 EXPECT_LT(package->core_start, cpuinfo_get_cores_count()); 621 EXPECT_LE(package->core_start + package->core_count, cpuinfo_get_cores_count()); 622 } 623 cpuinfo_deinitialize(); 624 } 625 626 TEST(PACKAGE, consistent_cores) { 627 ASSERT_TRUE(cpuinfo_initialize()); 628 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 629 const cpuinfo_package* package = cpuinfo_get_package(i); 630 ASSERT_TRUE(package); 631 632 for (uint32_t j = 0; j < package->core_count; j++) { 633 const cpuinfo_core* core = cpuinfo_get_core(package->core_start + j); 634 ASSERT_TRUE(core); 635 636 EXPECT_EQ(package, core->package); 637 } 638 } 639 cpuinfo_deinitialize(); 640 } 641 642 TEST(PACKAGE, non_zero_clusters) { 643 ASSERT_TRUE(cpuinfo_initialize()); 644 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 645 const cpuinfo_package* package = cpuinfo_get_package(i); 646 ASSERT_TRUE(package); 647 648 EXPECT_NE(0, package->cluster_count); 649 } 650 cpuinfo_deinitialize(); 651 } 652 653 TEST(PACKAGE, valid_clusters) { 654 ASSERT_TRUE(cpuinfo_initialize()); 655 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 656 const cpuinfo_package* package = cpuinfo_get_package(i); 657 ASSERT_TRUE(package); 658 659 EXPECT_LT(package->cluster_start, cpuinfo_get_clusters_count()); 660 EXPECT_LE(package->cluster_start + package->cluster_count, cpuinfo_get_clusters_count()); 661 } 662 cpuinfo_deinitialize(); 663 } 664 665 TEST(PACKAGE, consistent_cluster) { 666 ASSERT_TRUE(cpuinfo_initialize()); 667 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 668 const cpuinfo_package* package = cpuinfo_get_package(i); 669 ASSERT_TRUE(package); 670 671 for (uint32_t j = 0; j < package->cluster_count; j++) { 672 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(package->cluster_start + j); 673 ASSERT_TRUE(cluster); 674 675 EXPECT_EQ(package, cluster->package); 676 } 677 } 678 cpuinfo_deinitialize(); 679 } 680 681 TEST(L1I_CACHES_COUNT, within_bounds) { 682 ASSERT_TRUE(cpuinfo_initialize()); 683 EXPECT_NE(0, cpuinfo_get_l1i_caches_count()); 684 EXPECT_LE(cpuinfo_get_l1i_caches_count(), cpuinfo_get_processors_count()); 685 cpuinfo_deinitialize(); 686 } 687 688 TEST(L1I_CACHES, non_null) { 689 ASSERT_TRUE(cpuinfo_initialize()); 690 EXPECT_TRUE(cpuinfo_get_l1i_caches()); 691 cpuinfo_deinitialize(); 692 } 693 694 TEST(L1I_CACHE, non_null) { 695 ASSERT_TRUE(cpuinfo_initialize()); 696 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 697 EXPECT_TRUE(cpuinfo_get_l1i_cache(i)); 698 } 699 cpuinfo_deinitialize(); 700 } 701 702 TEST(L1I_CACHE, non_zero_size) { 703 ASSERT_TRUE(cpuinfo_initialize()); 704 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 705 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 706 ASSERT_TRUE(cache); 707 708 EXPECT_NE(0, cache->size); 709 } 710 cpuinfo_deinitialize(); 711 } 712 713 TEST(L1I_CACHE, valid_size) { 714 ASSERT_TRUE(cpuinfo_initialize()); 715 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 716 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 717 ASSERT_TRUE(cache); 718 719 EXPECT_EQ(cache->size, 720 cache->associativity * cache->sets * cache->partitions * cache->line_size); 721 } 722 cpuinfo_deinitialize(); 723 } 724 725 TEST(L1I_CACHE, non_zero_associativity) { 726 ASSERT_TRUE(cpuinfo_initialize()); 727 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 728 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 729 ASSERT_TRUE(cache); 730 731 EXPECT_NE(0, cache->associativity); 732 } 733 cpuinfo_deinitialize(); 734 } 735 736 TEST(L1I_CACHE, non_zero_partitions) { 737 ASSERT_TRUE(cpuinfo_initialize()); 738 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 739 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 740 ASSERT_TRUE(cache); 741 742 EXPECT_NE(0, cache->partitions); 743 } 744 cpuinfo_deinitialize(); 745 } 746 747 TEST(L1I_CACHE, non_zero_line_size) { 748 ASSERT_TRUE(cpuinfo_initialize()); 749 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 750 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 751 ASSERT_TRUE(cache); 752 753 EXPECT_NE(0, cache->line_size); 754 } 755 cpuinfo_deinitialize(); 756 } 757 758 TEST(L1I_CACHE, power_of_2_line_size) { 759 ASSERT_TRUE(cpuinfo_initialize()); 760 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 761 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 762 ASSERT_TRUE(cache); 763 764 const uint32_t line_size = cache->line_size; 765 EXPECT_NE(0, line_size); 766 EXPECT_EQ(0, line_size & (line_size - 1)); 767 } 768 cpuinfo_deinitialize(); 769 } 770 771 TEST(L1I_CACHE, reasonable_line_size) { 772 ASSERT_TRUE(cpuinfo_initialize()); 773 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 774 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 775 ASSERT_TRUE(cache); 776 777 EXPECT_GE(cache->line_size, 16); 778 EXPECT_LE(cache->line_size, 128); 779 } 780 cpuinfo_deinitialize(); 781 } 782 783 TEST(L1I_CACHE, valid_flags) { 784 ASSERT_TRUE(cpuinfo_initialize()); 785 786 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING; 787 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 788 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 789 ASSERT_TRUE(cache); 790 791 EXPECT_EQ(0, cache->flags & ~valid_flags); 792 } 793 cpuinfo_deinitialize(); 794 } 795 796 TEST(L1I_CACHE, non_inclusive) { 797 ASSERT_TRUE(cpuinfo_initialize()); 798 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 799 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 800 ASSERT_TRUE(cache); 801 802 EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE); 803 } 804 cpuinfo_deinitialize(); 805 } 806 807 TEST(L1I_CACHE, non_zero_processors) { 808 ASSERT_TRUE(cpuinfo_initialize()); 809 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 810 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 811 ASSERT_TRUE(cache); 812 813 EXPECT_NE(0, cache->processor_count); 814 } 815 cpuinfo_deinitialize(); 816 } 817 818 TEST(L1I_CACHE, valid_processors) { 819 ASSERT_TRUE(cpuinfo_initialize()); 820 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 821 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 822 ASSERT_TRUE(cache); 823 824 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count()); 825 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count()); 826 } 827 cpuinfo_deinitialize(); 828 } 829 830 TEST(L1I_CACHE, consistent_processors) { 831 ASSERT_TRUE(cpuinfo_initialize()); 832 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 833 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i); 834 ASSERT_TRUE(cache); 835 836 for (uint32_t j = 0; j < cache->processor_count; j++) { 837 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j); 838 ASSERT_TRUE(processor); 839 840 EXPECT_EQ(cache, processor->cache.l1i); 841 } 842 } 843 cpuinfo_deinitialize(); 844 } 845 846 TEST(L1D_CACHES_COUNT, within_bounds) { 847 ASSERT_TRUE(cpuinfo_initialize()); 848 EXPECT_NE(0, cpuinfo_get_l1d_caches_count()); 849 EXPECT_LE(cpuinfo_get_l1d_caches_count(), cpuinfo_get_processors_count()); 850 cpuinfo_deinitialize(); 851 } 852 853 TEST(L1D_CACHES, non_null) { 854 ASSERT_TRUE(cpuinfo_initialize()); 855 EXPECT_TRUE(cpuinfo_get_l1d_caches()); 856 cpuinfo_deinitialize(); 857 } 858 859 TEST(L1D_CACHE, non_null) { 860 ASSERT_TRUE(cpuinfo_initialize()); 861 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 862 EXPECT_TRUE(cpuinfo_get_l1d_cache(i)); 863 } 864 cpuinfo_deinitialize(); 865 } 866 867 TEST(L1D_CACHE, non_zero_size) { 868 ASSERT_TRUE(cpuinfo_initialize()); 869 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 870 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 871 ASSERT_TRUE(cache); 872 873 EXPECT_NE(0, cache->size); 874 } 875 cpuinfo_deinitialize(); 876 } 877 878 TEST(L1D_CACHE, valid_size) { 879 ASSERT_TRUE(cpuinfo_initialize()); 880 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 881 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 882 ASSERT_TRUE(cache); 883 884 EXPECT_EQ(cache->size, 885 cache->associativity * cache->sets * cache->partitions * cache->line_size); 886 } 887 cpuinfo_deinitialize(); 888 } 889 890 TEST(L1D_CACHE, non_zero_associativity) { 891 ASSERT_TRUE(cpuinfo_initialize()); 892 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 893 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 894 ASSERT_TRUE(cache); 895 896 EXPECT_NE(0, cache->associativity); 897 } 898 cpuinfo_deinitialize(); 899 } 900 901 TEST(L1D_CACHE, non_zero_partitions) { 902 ASSERT_TRUE(cpuinfo_initialize()); 903 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 904 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 905 ASSERT_TRUE(cache); 906 907 EXPECT_NE(0, cache->partitions); 908 } 909 cpuinfo_deinitialize(); 910 } 911 912 TEST(L1D_CACHE, non_zero_line_size) { 913 ASSERT_TRUE(cpuinfo_initialize()); 914 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 915 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 916 ASSERT_TRUE(cache); 917 918 EXPECT_NE(0, cache->line_size); 919 } 920 cpuinfo_deinitialize(); 921 } 922 923 TEST(L1D_CACHE, power_of_2_line_size) { 924 ASSERT_TRUE(cpuinfo_initialize()); 925 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 926 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 927 ASSERT_TRUE(cache); 928 929 const uint32_t line_size = cache->line_size; 930 EXPECT_NE(0, line_size); 931 EXPECT_EQ(0, line_size & (line_size - 1)); 932 } 933 cpuinfo_deinitialize(); 934 } 935 936 TEST(L1D_CACHE, reasonable_line_size) { 937 ASSERT_TRUE(cpuinfo_initialize()); 938 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 939 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 940 ASSERT_TRUE(cache); 941 942 EXPECT_GE(cache->line_size, 16); 943 EXPECT_LE(cache->line_size, 128); 944 } 945 cpuinfo_deinitialize(); 946 } 947 948 TEST(L1D_CACHE, valid_flags) { 949 ASSERT_TRUE(cpuinfo_initialize()); 950 951 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING; 952 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 953 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 954 ASSERT_TRUE(cache); 955 956 EXPECT_EQ(0, cache->flags & ~valid_flags); 957 } 958 cpuinfo_deinitialize(); 959 } 960 961 TEST(L1D_CACHE, non_inclusive) { 962 ASSERT_TRUE(cpuinfo_initialize()); 963 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 964 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 965 ASSERT_TRUE(cache); 966 967 EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE); 968 } 969 cpuinfo_deinitialize(); 970 } 971 972 TEST(L1D_CACHE, non_zero_processors) { 973 ASSERT_TRUE(cpuinfo_initialize()); 974 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 975 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 976 ASSERT_TRUE(cache); 977 978 EXPECT_NE(0, cache->processor_count); 979 } 980 cpuinfo_deinitialize(); 981 } 982 983 TEST(L1D_CACHE, valid_processors) { 984 ASSERT_TRUE(cpuinfo_initialize()); 985 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 986 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 987 ASSERT_TRUE(cache); 988 989 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count()); 990 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count()); 991 } 992 cpuinfo_deinitialize(); 993 } 994 995 TEST(L1D_CACHE, consistent_processors) { 996 ASSERT_TRUE(cpuinfo_initialize()); 997 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 998 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i); 999 ASSERT_TRUE(cache); 1000 1001 for (uint32_t j = 0; j < cache->processor_count; j++) { 1002 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j); 1003 ASSERT_TRUE(processor); 1004 1005 EXPECT_EQ(cache, processor->cache.l1d); 1006 } 1007 } 1008 cpuinfo_deinitialize(); 1009 } 1010 1011 TEST(L2_CACHES_COUNT, within_bounds) { 1012 ASSERT_TRUE(cpuinfo_initialize()); 1013 EXPECT_NE(0, cpuinfo_get_l2_caches_count()); 1014 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_processors_count()); 1015 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1d_caches_count()); 1016 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1i_caches_count()); 1017 cpuinfo_deinitialize(); 1018 } 1019 1020 TEST(L2_CACHES, non_null) { 1021 ASSERT_TRUE(cpuinfo_initialize()); 1022 EXPECT_TRUE(cpuinfo_get_l2_caches()); 1023 cpuinfo_deinitialize(); 1024 } 1025 1026 TEST(L2_CACHE, non_null) { 1027 ASSERT_TRUE(cpuinfo_initialize()); 1028 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1029 EXPECT_TRUE(cpuinfo_get_l2_cache(i)); 1030 } 1031 cpuinfo_deinitialize(); 1032 } 1033 1034 TEST(L2_CACHE, non_zero_size) { 1035 ASSERT_TRUE(cpuinfo_initialize()); 1036 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1037 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1038 ASSERT_TRUE(cache); 1039 1040 EXPECT_NE(0, cache->size); 1041 } 1042 cpuinfo_deinitialize(); 1043 } 1044 1045 TEST(L2_CACHE, valid_size) { 1046 ASSERT_TRUE(cpuinfo_initialize()); 1047 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1048 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1049 ASSERT_TRUE(cache); 1050 1051 EXPECT_EQ(cache->size, 1052 cache->associativity * cache->sets * cache->partitions * cache->line_size); 1053 } 1054 cpuinfo_deinitialize(); 1055 } 1056 1057 TEST(L2_CACHE, non_zero_associativity) { 1058 ASSERT_TRUE(cpuinfo_initialize()); 1059 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1060 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1061 ASSERT_TRUE(cache); 1062 1063 EXPECT_NE(0, cache->associativity); 1064 } 1065 cpuinfo_deinitialize(); 1066 } 1067 1068 TEST(L2_CACHE, non_zero_partitions) { 1069 ASSERT_TRUE(cpuinfo_initialize()); 1070 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1071 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1072 ASSERT_TRUE(cache); 1073 1074 EXPECT_NE(0, cache->partitions); 1075 } 1076 cpuinfo_deinitialize(); 1077 } 1078 1079 TEST(L2_CACHE, non_zero_line_size) { 1080 ASSERT_TRUE(cpuinfo_initialize()); 1081 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1082 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1083 ASSERT_TRUE(cache); 1084 1085 EXPECT_NE(0, cache->line_size); 1086 } 1087 cpuinfo_deinitialize(); 1088 } 1089 1090 TEST(L2_CACHE, power_of_2_line_size) { 1091 ASSERT_TRUE(cpuinfo_initialize()); 1092 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1093 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1094 ASSERT_TRUE(cache); 1095 1096 const uint32_t line_size = cache->line_size; 1097 EXPECT_NE(0, line_size); 1098 EXPECT_EQ(0, line_size & (line_size - 1)); 1099 } 1100 cpuinfo_deinitialize(); 1101 } 1102 1103 TEST(L2_CACHE, reasonable_line_size) { 1104 ASSERT_TRUE(cpuinfo_initialize()); 1105 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1106 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1107 ASSERT_TRUE(cache); 1108 1109 EXPECT_GE(cache->line_size, 16); 1110 EXPECT_LE(cache->line_size, 128); 1111 } 1112 cpuinfo_deinitialize(); 1113 } 1114 1115 TEST(L2_CACHE, valid_flags) { 1116 ASSERT_TRUE(cpuinfo_initialize()); 1117 1118 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING; 1119 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1120 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1121 ASSERT_TRUE(cache); 1122 1123 EXPECT_EQ(0, cache->flags & ~valid_flags); 1124 } 1125 cpuinfo_deinitialize(); 1126 } 1127 1128 TEST(L2_CACHE, non_zero_processors) { 1129 ASSERT_TRUE(cpuinfo_initialize()); 1130 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1131 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1132 ASSERT_TRUE(cache); 1133 1134 EXPECT_NE(0, cache->processor_count); 1135 } 1136 cpuinfo_deinitialize(); 1137 } 1138 1139 TEST(L2_CACHE, valid_processors) { 1140 ASSERT_TRUE(cpuinfo_initialize()); 1141 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1142 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1143 ASSERT_TRUE(cache); 1144 1145 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count()); 1146 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count()); 1147 } 1148 cpuinfo_deinitialize(); 1149 } 1150 1151 TEST(L2_CACHE, consistent_processors) { 1152 ASSERT_TRUE(cpuinfo_initialize()); 1153 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 1154 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i); 1155 ASSERT_TRUE(cache); 1156 1157 for (uint32_t j = 0; j < cache->processor_count; j++) { 1158 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j); 1159 ASSERT_TRUE(processor); 1160 1161 EXPECT_EQ(cache, processor->cache.l2); 1162 } 1163 } 1164 cpuinfo_deinitialize(); 1165 } 1166 1167 TEST(L3_CACHES_COUNT, within_bounds) { 1168 ASSERT_TRUE(cpuinfo_initialize()); 1169 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_processors_count()); 1170 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_l2_caches_count()); 1171 cpuinfo_deinitialize(); 1172 } 1173 1174 TEST(L3_CACHE, non_null) { 1175 ASSERT_TRUE(cpuinfo_initialize()); 1176 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1177 EXPECT_TRUE(cpuinfo_get_l3_cache(i)); 1178 } 1179 cpuinfo_deinitialize(); 1180 } 1181 1182 TEST(L3_CACHE, non_zero_size) { 1183 ASSERT_TRUE(cpuinfo_initialize()); 1184 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1185 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1186 ASSERT_TRUE(cache); 1187 1188 EXPECT_NE(0, cache->size); 1189 } 1190 cpuinfo_deinitialize(); 1191 } 1192 1193 TEST(L3_CACHE, valid_size) { 1194 ASSERT_TRUE(cpuinfo_initialize()); 1195 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1196 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1197 ASSERT_TRUE(cache); 1198 1199 EXPECT_EQ(cache->size, 1200 cache->associativity * cache->sets * cache->partitions * cache->line_size); 1201 } 1202 cpuinfo_deinitialize(); 1203 } 1204 1205 TEST(L3_CACHE, non_zero_associativity) { 1206 ASSERT_TRUE(cpuinfo_initialize()); 1207 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1208 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1209 ASSERT_TRUE(cache); 1210 1211 EXPECT_NE(0, cache->associativity); 1212 } 1213 cpuinfo_deinitialize(); 1214 } 1215 1216 TEST(L3_CACHE, non_zero_partitions) { 1217 ASSERT_TRUE(cpuinfo_initialize()); 1218 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1219 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1220 ASSERT_TRUE(cache); 1221 1222 EXPECT_NE(0, cache->partitions); 1223 } 1224 cpuinfo_deinitialize(); 1225 } 1226 1227 TEST(L3_CACHE, non_zero_line_size) { 1228 ASSERT_TRUE(cpuinfo_initialize()); 1229 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1230 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1231 ASSERT_TRUE(cache); 1232 1233 EXPECT_NE(0, cache->line_size); 1234 } 1235 cpuinfo_deinitialize(); 1236 } 1237 1238 TEST(L3_CACHE, power_of_2_line_size) { 1239 ASSERT_TRUE(cpuinfo_initialize()); 1240 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1241 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1242 ASSERT_TRUE(cache); 1243 1244 const uint32_t line_size = cache->line_size; 1245 EXPECT_NE(0, line_size); 1246 EXPECT_EQ(0, line_size & (line_size - 1)); 1247 } 1248 cpuinfo_deinitialize(); 1249 } 1250 1251 TEST(L3_CACHE, reasonable_line_size) { 1252 ASSERT_TRUE(cpuinfo_initialize()); 1253 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1254 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1255 ASSERT_TRUE(cache); 1256 1257 EXPECT_GE(cache->line_size, 16); 1258 EXPECT_LE(cache->line_size, 128); 1259 } 1260 cpuinfo_deinitialize(); 1261 } 1262 1263 TEST(L3_CACHE, valid_flags) { 1264 ASSERT_TRUE(cpuinfo_initialize()); 1265 1266 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING; 1267 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1268 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1269 ASSERT_TRUE(cache); 1270 1271 EXPECT_EQ(0, cache->flags & ~valid_flags); 1272 } 1273 cpuinfo_deinitialize(); 1274 } 1275 1276 TEST(L3_CACHE, non_zero_processors) { 1277 ASSERT_TRUE(cpuinfo_initialize()); 1278 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1279 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1280 ASSERT_TRUE(cache); 1281 1282 EXPECT_NE(0, cache->processor_count); 1283 } 1284 cpuinfo_deinitialize(); 1285 } 1286 1287 TEST(L3_CACHE, valid_processors) { 1288 ASSERT_TRUE(cpuinfo_initialize()); 1289 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1290 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1291 ASSERT_TRUE(cache); 1292 1293 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count()); 1294 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count()); 1295 } 1296 cpuinfo_deinitialize(); 1297 } 1298 1299 TEST(L3_CACHE, consistent_processors) { 1300 ASSERT_TRUE(cpuinfo_initialize()); 1301 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) { 1302 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i); 1303 ASSERT_TRUE(cache); 1304 1305 for (uint32_t j = 0; j < cache->processor_count; j++) { 1306 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j); 1307 ASSERT_TRUE(processor); 1308 1309 EXPECT_EQ(cache, processor->cache.l3); 1310 } 1311 } 1312 cpuinfo_deinitialize(); 1313 } 1314 1315 TEST(L4_CACHES_COUNT, within_bounds) { 1316 ASSERT_TRUE(cpuinfo_initialize()); 1317 EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_processors_count()); 1318 EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_l3_caches_count()); 1319 cpuinfo_deinitialize(); 1320 } 1321 1322 TEST(L4_CACHE, non_null) { 1323 ASSERT_TRUE(cpuinfo_initialize()); 1324 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1325 EXPECT_TRUE(cpuinfo_get_l4_cache(i)); 1326 } 1327 cpuinfo_deinitialize(); 1328 } 1329 1330 TEST(L4_CACHE, non_zero_size) { 1331 ASSERT_TRUE(cpuinfo_initialize()); 1332 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1333 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1334 ASSERT_TRUE(cache); 1335 1336 EXPECT_NE(0, cache->size); 1337 } 1338 cpuinfo_deinitialize(); 1339 } 1340 1341 TEST(L4_CACHE, valid_size) { 1342 ASSERT_TRUE(cpuinfo_initialize()); 1343 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1344 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1345 ASSERT_TRUE(cache); 1346 1347 EXPECT_EQ(cache->size, 1348 cache->associativity * cache->sets * cache->partitions * cache->line_size); 1349 } 1350 cpuinfo_deinitialize(); 1351 } 1352 1353 TEST(L4_CACHE, non_zero_associativity) { 1354 ASSERT_TRUE(cpuinfo_initialize()); 1355 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1356 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1357 ASSERT_TRUE(cache); 1358 1359 EXPECT_NE(0, cache->associativity); 1360 } 1361 cpuinfo_deinitialize(); 1362 } 1363 1364 TEST(L4_CACHE, non_zero_partitions) { 1365 ASSERT_TRUE(cpuinfo_initialize()); 1366 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1367 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1368 ASSERT_TRUE(cache); 1369 1370 EXPECT_NE(0, cache->partitions); 1371 } 1372 cpuinfo_deinitialize(); 1373 } 1374 1375 TEST(L4_CACHE, non_zero_line_size) { 1376 ASSERT_TRUE(cpuinfo_initialize()); 1377 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1378 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1379 ASSERT_TRUE(cache); 1380 1381 EXPECT_NE(0, cache->line_size); 1382 } 1383 cpuinfo_deinitialize(); 1384 } 1385 1386 TEST(L4_CACHE, power_of_2_line_size) { 1387 ASSERT_TRUE(cpuinfo_initialize()); 1388 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1389 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1390 ASSERT_TRUE(cache); 1391 1392 const uint32_t line_size = cache->line_size; 1393 EXPECT_NE(0, line_size); 1394 EXPECT_EQ(0, line_size & (line_size - 1)); 1395 } 1396 cpuinfo_deinitialize(); 1397 } 1398 1399 TEST(L4_CACHE, reasonable_line_size) { 1400 ASSERT_TRUE(cpuinfo_initialize()); 1401 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1402 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1403 ASSERT_TRUE(cache); 1404 1405 EXPECT_GE(cache->line_size, 16); 1406 EXPECT_LE(cache->line_size, 128); 1407 } 1408 cpuinfo_deinitialize(); 1409 } 1410 1411 TEST(L4_CACHE, valid_flags) { 1412 ASSERT_TRUE(cpuinfo_initialize()); 1413 1414 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING; 1415 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1416 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1417 ASSERT_TRUE(cache); 1418 1419 EXPECT_EQ(0, cache->flags & ~valid_flags); 1420 } 1421 cpuinfo_deinitialize(); 1422 } 1423 1424 TEST(L4_CACHE, non_zero_processors) { 1425 ASSERT_TRUE(cpuinfo_initialize()); 1426 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1427 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1428 ASSERT_TRUE(cache); 1429 1430 EXPECT_NE(0, cache->processor_count); 1431 } 1432 cpuinfo_deinitialize(); 1433 } 1434 1435 TEST(L4_CACHE, valid_processors) { 1436 ASSERT_TRUE(cpuinfo_initialize()); 1437 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1438 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1439 ASSERT_TRUE(cache); 1440 1441 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count()); 1442 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count()); 1443 } 1444 cpuinfo_deinitialize(); 1445 } 1446 1447 TEST(L4_CACHE, consistent_processors) { 1448 ASSERT_TRUE(cpuinfo_initialize()); 1449 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) { 1450 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i); 1451 ASSERT_TRUE(cache); 1452 1453 for (uint32_t j = 0; j < cache->processor_count; j++) { 1454 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j); 1455 ASSERT_TRUE(processor); 1456 1457 EXPECT_EQ(cache, processor->cache.l4); 1458 } 1459 } 1460 cpuinfo_deinitialize(); 1461 } 1462