1 #include <gtest/gtest.h> 2 3 #include <cpuinfo.h> 4 #include <cpuinfo-mock.h> 5 6 7 TEST(PROCESSORS, count) { 8 ASSERT_EQ(4, cpuinfo_get_processors_count()); 9 } 10 11 TEST(PROCESSORS, non_null) { 12 ASSERT_TRUE(cpuinfo_get_processors()); 13 } 14 15 TEST(PROCESSORS, smt_id) { 16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); 18 } 19 } 20 21 TEST(PROCESSORS, core) { 22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); 24 } 25 } 26 27 TEST(PROCESSORS, cluster) { 28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 29 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); 30 } 31 } 32 33 TEST(PROCESSORS, package) { 34 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 35 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); 36 } 37 } 38 39 TEST(PROCESSORS, linux_id) { 40 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 41 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id); 42 } 43 } 44 45 TEST(PROCESSORS, l1i) { 46 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 47 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); 48 } 49 } 50 51 TEST(PROCESSORS, l1d) { 52 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 53 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); 54 } 55 } 56 57 TEST(PROCESSORS, l2) { 58 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 59 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); 60 } 61 } 62 63 TEST(PROCESSORS, l3) { 64 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); 66 } 67 } 68 69 TEST(PROCESSORS, l4) { 70 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 71 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); 72 } 73 } 74 75 TEST(CORES, count) { 76 ASSERT_EQ(4, cpuinfo_get_cores_count()); 77 } 78 79 TEST(CORES, non_null) { 80 ASSERT_TRUE(cpuinfo_get_cores()); 81 } 82 83 TEST(CORES, processor_start) { 84 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 85 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); 86 } 87 } 88 89 TEST(CORES, processor_count) { 90 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 91 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); 92 } 93 } 94 95 TEST(CORES, core_id) { 96 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 97 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); 98 } 99 } 100 101 TEST(CORES, cluster) { 102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 103 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); 104 } 105 } 106 107 TEST(CORES, package) { 108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 109 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); 110 } 111 } 112 113 TEST(CORES, vendor) { 114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 115 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); 116 } 117 } 118 119 TEST(CORES, uarch) { 120 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 121 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); 122 } 123 } 124 125 TEST(CORES, midr) { 126 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 127 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr); 128 } 129 } 130 131 TEST(CORES, DISABLED_frequency) { 132 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 133 ASSERT_EQ(UINT64_C(1300000000), cpuinfo_get_core(i)->frequency); 134 } 135 } 136 137 TEST(CLUSTERS, count) { 138 ASSERT_EQ(1, cpuinfo_get_clusters_count()); 139 } 140 141 TEST(CLUSTERS, non_null) { 142 ASSERT_TRUE(cpuinfo_get_clusters()); 143 } 144 145 TEST(CLUSTERS, processor_start) { 146 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 147 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); 148 } 149 } 150 151 TEST(CLUSTERS, processor_count) { 152 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 153 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); 154 } 155 } 156 157 TEST(CLUSTERS, core_start) { 158 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 159 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); 160 } 161 } 162 163 TEST(CLUSTERS, core_count) { 164 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 165 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); 166 } 167 } 168 169 TEST(CLUSTERS, cluster_id) { 170 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 171 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); 172 } 173 } 174 175 TEST(CLUSTERS, package) { 176 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); 178 } 179 } 180 181 TEST(CLUSTERS, vendor) { 182 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 183 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); 184 } 185 } 186 187 TEST(CLUSTERS, uarch) { 188 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 189 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch); 190 } 191 } 192 193 TEST(CLUSTERS, midr) { 194 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 195 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_cluster(i)->midr); 196 } 197 } 198 199 TEST(CLUSTERS, DISABLED_frequency) { 200 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 201 ASSERT_EQ(UINT64_C(1300000000), cpuinfo_get_cluster(i)->frequency); 202 } 203 } 204 205 TEST(PACKAGES, count) { 206 ASSERT_EQ(1, cpuinfo_get_packages_count()); 207 } 208 209 TEST(PACKAGES, non_null) { 210 ASSERT_TRUE(cpuinfo_get_packages()); 211 } 212 213 TEST(PACKAGES, name) { 214 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 215 ASSERT_EQ("MediaTek MT6735", 216 std::string(cpuinfo_get_package(i)->name, 217 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); 218 } 219 } 220 221 TEST(PACKAGES, processor_start) { 222 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 223 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); 224 } 225 } 226 227 TEST(PACKAGES, processor_count) { 228 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 229 ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count); 230 } 231 } 232 233 TEST(PACKAGES, core_start) { 234 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 235 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); 236 } 237 } 238 239 TEST(PACKAGES, core_count) { 240 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 241 ASSERT_EQ(4, cpuinfo_get_package(i)->core_count); 242 } 243 } 244 245 TEST(PACKAGES, cluster_start) { 246 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 247 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); 248 } 249 } 250 251 TEST(PACKAGES, cluster_count) { 252 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 253 ASSERT_EQ(1, cpuinfo_get_package(i)->cluster_count); 254 } 255 } 256 257 TEST(ISA, thumb) { 258 ASSERT_TRUE(cpuinfo_has_arm_thumb()); 259 } 260 261 TEST(ISA, thumb2) { 262 ASSERT_TRUE(cpuinfo_has_arm_thumb2()); 263 } 264 265 TEST(ISA, armv5e) { 266 ASSERT_TRUE(cpuinfo_has_arm_v5e()); 267 } 268 269 TEST(ISA, armv6) { 270 ASSERT_TRUE(cpuinfo_has_arm_v6()); 271 } 272 273 TEST(ISA, armv6k) { 274 ASSERT_TRUE(cpuinfo_has_arm_v6k()); 275 } 276 277 TEST(ISA, armv7) { 278 ASSERT_TRUE(cpuinfo_has_arm_v7()); 279 } 280 281 TEST(ISA, armv7mp) { 282 ASSERT_TRUE(cpuinfo_has_arm_v7mp()); 283 } 284 285 TEST(ISA, idiv) { 286 ASSERT_TRUE(cpuinfo_has_arm_idiv()); 287 } 288 289 TEST(ISA, vfpv2) { 290 ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); 291 } 292 293 TEST(ISA, vfpv3) { 294 ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); 295 } 296 297 TEST(ISA, vfpv3_d32) { 298 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); 299 } 300 301 TEST(ISA, vfpv3_fp16) { 302 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); 303 } 304 305 TEST(ISA, vfpv3_fp16_d32) { 306 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); 307 } 308 309 TEST(ISA, vfpv4) { 310 ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); 311 } 312 313 TEST(ISA, vfpv4_d32) { 314 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); 315 } 316 317 TEST(ISA, wmmx) { 318 ASSERT_FALSE(cpuinfo_has_arm_wmmx()); 319 } 320 321 TEST(ISA, wmmx2) { 322 ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); 323 } 324 325 TEST(ISA, neon) { 326 ASSERT_TRUE(cpuinfo_has_arm_neon()); 327 } 328 329 TEST(ISA, neon_fp16) { 330 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); 331 } 332 333 TEST(ISA, neon_fma) { 334 ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); 335 } 336 337 TEST(ISA, atomics) { 338 ASSERT_FALSE(cpuinfo_has_arm_atomics()); 339 } 340 341 TEST(ISA, neon_rdm) { 342 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); 343 } 344 345 TEST(ISA, fp16_arith) { 346 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); 347 } 348 349 TEST(ISA, neon_fp16_arith) { 350 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith()); 351 } 352 353 TEST(ISA, neon_dot) { 354 ASSERT_FALSE(cpuinfo_has_arm_neon_dot()); 355 } 356 357 TEST(ISA, jscvt) { 358 ASSERT_FALSE(cpuinfo_has_arm_jscvt()); 359 } 360 361 TEST(ISA, fcma) { 362 ASSERT_FALSE(cpuinfo_has_arm_fcma()); 363 } 364 365 TEST(ISA, aes) { 366 ASSERT_FALSE(cpuinfo_has_arm_aes()); 367 } 368 369 TEST(ISA, sha1) { 370 ASSERT_FALSE(cpuinfo_has_arm_sha1()); 371 } 372 373 TEST(ISA, sha2) { 374 ASSERT_TRUE(cpuinfo_has_arm_sha2()); 375 } 376 377 TEST(ISA, pmull) { 378 ASSERT_FALSE(cpuinfo_has_arm_pmull()); 379 } 380 381 TEST(ISA, crc32) { 382 ASSERT_FALSE(cpuinfo_has_arm_crc32()); 383 } 384 385 TEST(L1I, count) { 386 ASSERT_EQ(4, cpuinfo_get_l1i_caches_count()); 387 } 388 389 TEST(L1I, non_null) { 390 ASSERT_TRUE(cpuinfo_get_l1i_caches()); 391 } 392 393 TEST(L1I, size) { 394 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 395 ASSERT_EQ(16 * 1024, cpuinfo_get_l1i_cache(i)->size); 396 } 397 } 398 399 TEST(L1I, associativity) { 400 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 401 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); 402 } 403 } 404 405 TEST(L1I, sets) { 406 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 407 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, 408 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); 409 } 410 } 411 412 TEST(L1I, partitions) { 413 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 414 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); 415 } 416 } 417 418 TEST(L1I, line_size) { 419 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 420 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); 421 } 422 } 423 424 TEST(L1I, flags) { 425 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 426 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); 427 } 428 } 429 430 TEST(L1I, processors) { 431 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 432 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); 433 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); 434 } 435 } 436 437 TEST(L1D, count) { 438 ASSERT_EQ(4, cpuinfo_get_l1d_caches_count()); 439 } 440 441 TEST(L1D, non_null) { 442 ASSERT_TRUE(cpuinfo_get_l1d_caches()); 443 } 444 445 TEST(L1D, size) { 446 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 447 ASSERT_EQ(16 * 1024, cpuinfo_get_l1d_cache(i)->size); 448 } 449 } 450 451 TEST(L1D, associativity) { 452 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 453 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); 454 } 455 } 456 457 TEST(L1D, sets) { 458 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 459 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, 460 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); 461 } 462 } 463 464 TEST(L1D, partitions) { 465 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 466 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); 467 } 468 } 469 470 TEST(L1D, line_size) { 471 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 472 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); 473 } 474 } 475 476 TEST(L1D, flags) { 477 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 478 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); 479 } 480 } 481 482 TEST(L1D, processors) { 483 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 484 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); 485 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); 486 } 487 } 488 489 TEST(L2, count) { 490 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); 491 } 492 493 TEST(L2, non_null) { 494 ASSERT_TRUE(cpuinfo_get_l2_caches()); 495 } 496 497 TEST(L2, size) { 498 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 499 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size); 500 } 501 } 502 503 TEST(L2, associativity) { 504 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 505 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); 506 } 507 } 508 509 TEST(L2, sets) { 510 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 511 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, 512 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); 513 } 514 } 515 516 TEST(L2, partitions) { 517 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 518 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); 519 } 520 } 521 522 TEST(L2, line_size) { 523 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 524 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); 525 } 526 } 527 528 TEST(L2, flags) { 529 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 530 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); 531 } 532 } 533 534 TEST(L2, processors) { 535 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 536 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); 537 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); 538 } 539 } 540 541 TEST(L3, none) { 542 ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); 543 ASSERT_FALSE(cpuinfo_get_l3_caches()); 544 } 545 546 TEST(L4, none) { 547 ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); 548 ASSERT_FALSE(cpuinfo_get_l4_caches()); 549 } 550 551 #include <blu-r1-hd.h> 552 553 int main(int argc, char* argv[]) { 554 #if CPUINFO_ARCH_ARM 555 cpuinfo_set_hwcap(UINT32_C(0x003FB0D6)); 556 cpuinfo_set_hwcap2(UINT32_C(0x00000008)); 557 #endif 558 cpuinfo_mock_filesystem(filesystem); 559 #ifdef __ANDROID__ 560 cpuinfo_mock_android_properties(properties); 561 #endif 562 cpuinfo_initialize(); 563 ::testing::InitGoogleTest(&argc, argv); 564 return RUN_ALL_TESTS(); 565 } 566