1 #include <gtest/gtest.h> 2 3 #include <cpuinfo.h> 4 #include <cpuinfo-mock.h> 5 6 7 TEST(PROCESSORS, count) { 8 ASSERT_EQ(4, cpuinfo_get_processors_count()); 9 } 10 11 TEST(PROCESSORS, non_null) { 12 ASSERT_TRUE(cpuinfo_get_processors()); 13 } 14 15 TEST(PROCESSORS, smt_id) { 16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); 18 } 19 } 20 21 TEST(PROCESSORS, core) { 22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); 24 } 25 } 26 27 TEST(PROCESSORS, cluster) { 28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 29 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); 30 } 31 } 32 33 TEST(PROCESSORS, package) { 34 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 35 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); 36 } 37 } 38 39 TEST(PROCESSORS, linux_id) { 40 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 41 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id); 42 } 43 } 44 45 TEST(PROCESSORS, l1i) { 46 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 47 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); 48 } 49 } 50 51 TEST(PROCESSORS, l1d) { 52 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 53 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); 54 } 55 } 56 57 TEST(PROCESSORS, l2) { 58 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 59 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); 60 } 61 } 62 63 TEST(PROCESSORS, l3) { 64 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); 66 } 67 } 68 69 TEST(PROCESSORS, l4) { 70 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { 71 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); 72 } 73 } 74 75 TEST(CORES, count) { 76 ASSERT_EQ(4, cpuinfo_get_cores_count()); 77 } 78 79 TEST(CORES, non_null) { 80 ASSERT_TRUE(cpuinfo_get_cores()); 81 } 82 83 TEST(CORES, processor_start) { 84 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 85 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); 86 } 87 } 88 89 TEST(CORES, processor_count) { 90 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 91 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); 92 } 93 } 94 95 TEST(CORES, core_id) { 96 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 97 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); 98 } 99 } 100 101 TEST(CORES, cluster) { 102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 103 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); 104 } 105 } 106 107 TEST(CORES, package) { 108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 109 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); 110 } 111 } 112 113 TEST(CORES, vendor) { 114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 115 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); 116 } 117 } 118 119 TEST(CORES, uarch) { 120 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 121 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); 122 } 123 } 124 125 TEST(CORES, midr) { 126 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 127 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr); 128 } 129 } 130 131 TEST(CORES, DISABLED_frequency) { 132 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { 133 ASSERT_EQ(UINT64_C(1500000000), cpuinfo_get_core(i)->frequency); 134 } 135 } 136 137 TEST(CLUSTERS, count) { 138 ASSERT_EQ(1, cpuinfo_get_clusters_count()); 139 } 140 141 TEST(CLUSTERS, non_null) { 142 ASSERT_TRUE(cpuinfo_get_clusters()); 143 } 144 145 TEST(CLUSTERS, processor_start) { 146 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 147 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); 148 } 149 } 150 151 TEST(CLUSTERS, processor_count) { 152 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 153 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); 154 } 155 } 156 157 TEST(CLUSTERS, core_start) { 158 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 159 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); 160 } 161 } 162 163 TEST(CLUSTERS, core_count) { 164 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 165 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); 166 } 167 } 168 169 TEST(CLUSTERS, cluster_id) { 170 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 171 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); 172 } 173 } 174 175 TEST(CLUSTERS, package) { 176 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); 178 } 179 } 180 181 TEST(CLUSTERS, vendor) { 182 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 183 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); 184 } 185 } 186 187 TEST(CLUSTERS, uarch) { 188 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 189 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch); 190 } 191 } 192 193 TEST(CLUSTERS, midr) { 194 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 195 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_cluster(i)->midr); 196 } 197 } 198 199 TEST(CLUSTERS, DISABLED_frequency) { 200 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { 201 ASSERT_EQ(UINT64_C(1500000000), cpuinfo_get_cluster(i)->frequency); 202 } 203 } 204 205 TEST(PACKAGES, count) { 206 ASSERT_EQ(1, cpuinfo_get_packages_count()); 207 } 208 209 TEST(PACKAGES, name) { 210 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 211 ASSERT_EQ("Samsung Exynos 7578", 212 std::string(cpuinfo_get_package(i)->name, 213 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); 214 } 215 } 216 217 TEST(PACKAGES, processor_start) { 218 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 219 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); 220 } 221 } 222 223 TEST(PACKAGES, processor_count) { 224 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 225 ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count); 226 } 227 } 228 229 TEST(PACKAGES, core_start) { 230 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 231 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); 232 } 233 } 234 235 TEST(PACKAGES, core_count) { 236 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 237 ASSERT_EQ(4, cpuinfo_get_package(i)->core_count); 238 } 239 } 240 241 TEST(PACKAGES, cluster_start) { 242 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 243 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); 244 } 245 } 246 247 TEST(PACKAGES, cluster_count) { 248 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { 249 ASSERT_EQ(1, cpuinfo_get_package(i)->cluster_count); 250 } 251 } 252 253 TEST(ISA, thumb) { 254 #if CPUINFO_ARCH_ARM 255 ASSERT_TRUE(cpuinfo_has_arm_thumb()); 256 #elif CPUINFO_ARCH_ARM64 257 ASSERT_FALSE(cpuinfo_has_arm_thumb()); 258 #endif 259 } 260 261 TEST(ISA, thumb2) { 262 #if CPUINFO_ARCH_ARM 263 ASSERT_TRUE(cpuinfo_has_arm_thumb2()); 264 #elif CPUINFO_ARCH_ARM64 265 ASSERT_FALSE(cpuinfo_has_arm_thumb2()); 266 #endif 267 } 268 269 TEST(ISA, armv5e) { 270 #if CPUINFO_ARCH_ARM 271 ASSERT_TRUE(cpuinfo_has_arm_v5e()); 272 #elif CPUINFO_ARCH_ARM64 273 ASSERT_FALSE(cpuinfo_has_arm_v5e()); 274 #endif 275 } 276 277 TEST(ISA, armv6) { 278 #if CPUINFO_ARCH_ARM 279 ASSERT_TRUE(cpuinfo_has_arm_v6()); 280 #elif CPUINFO_ARCH_ARM64 281 ASSERT_FALSE(cpuinfo_has_arm_v6()); 282 #endif 283 } 284 285 TEST(ISA, armv6k) { 286 #if CPUINFO_ARCH_ARM 287 ASSERT_TRUE(cpuinfo_has_arm_v6k()); 288 #elif CPUINFO_ARCH_ARM64 289 ASSERT_FALSE(cpuinfo_has_arm_v6k()); 290 #endif 291 } 292 293 TEST(ISA, armv7) { 294 #if CPUINFO_ARCH_ARM 295 ASSERT_TRUE(cpuinfo_has_arm_v7()); 296 #elif CPUINFO_ARCH_ARM64 297 ASSERT_FALSE(cpuinfo_has_arm_v7()); 298 #endif 299 } 300 301 TEST(ISA, armv7mp) { 302 #if CPUINFO_ARCH_ARM 303 ASSERT_TRUE(cpuinfo_has_arm_v7mp()); 304 #elif CPUINFO_ARCH_ARM64 305 ASSERT_FALSE(cpuinfo_has_arm_v7mp()); 306 #endif 307 } 308 309 TEST(ISA, idiv) { 310 ASSERT_TRUE(cpuinfo_has_arm_idiv()); 311 } 312 313 TEST(ISA, vfpv2) { 314 ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); 315 } 316 317 TEST(ISA, vfpv3) { 318 ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); 319 } 320 321 TEST(ISA, vfpv3_d32) { 322 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); 323 } 324 325 TEST(ISA, vfpv3_fp16) { 326 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); 327 } 328 329 TEST(ISA, vfpv3_fp16_d32) { 330 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); 331 } 332 333 TEST(ISA, vfpv4) { 334 ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); 335 } 336 337 TEST(ISA, vfpv4_d32) { 338 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); 339 } 340 341 TEST(ISA, wmmx) { 342 ASSERT_FALSE(cpuinfo_has_arm_wmmx()); 343 } 344 345 TEST(ISA, wmmx2) { 346 ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); 347 } 348 349 TEST(ISA, neon) { 350 ASSERT_TRUE(cpuinfo_has_arm_neon()); 351 } 352 353 TEST(ISA, neon_fp16) { 354 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); 355 } 356 357 TEST(ISA, neon_fma) { 358 ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); 359 } 360 361 TEST(ISA, atomics) { 362 ASSERT_FALSE(cpuinfo_has_arm_atomics()); 363 } 364 365 TEST(ISA, neon_rdm) { 366 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); 367 } 368 369 TEST(ISA, fp16_arith) { 370 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); 371 } 372 373 TEST(ISA, neon_fp16_arith) { 374 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith()); 375 } 376 377 TEST(ISA, neon_dot) { 378 ASSERT_FALSE(cpuinfo_has_arm_neon_dot()); 379 } 380 381 TEST(ISA, jscvt) { 382 ASSERT_FALSE(cpuinfo_has_arm_jscvt()); 383 } 384 385 TEST(ISA, fcma) { 386 ASSERT_FALSE(cpuinfo_has_arm_fcma()); 387 } 388 389 TEST(ISA, aes) { 390 ASSERT_TRUE(cpuinfo_has_arm_aes()); 391 } 392 393 TEST(ISA, sha1) { 394 ASSERT_TRUE(cpuinfo_has_arm_sha1()); 395 } 396 397 TEST(ISA, sha2) { 398 ASSERT_TRUE(cpuinfo_has_arm_sha2()); 399 } 400 401 TEST(ISA, pmull) { 402 ASSERT_TRUE(cpuinfo_has_arm_pmull()); 403 } 404 405 TEST(ISA, crc32) { 406 ASSERT_TRUE(cpuinfo_has_arm_crc32()); 407 } 408 409 TEST(L1I, count) { 410 ASSERT_EQ(4, cpuinfo_get_l1i_caches_count()); 411 } 412 413 TEST(L1I, non_null) { 414 ASSERT_TRUE(cpuinfo_get_l1i_caches()); 415 } 416 417 TEST(L1I, size) { 418 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 419 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); 420 } 421 } 422 423 TEST(L1I, associativity) { 424 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 425 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); 426 } 427 } 428 429 TEST(L1I, sets) { 430 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 431 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, 432 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); 433 } 434 } 435 436 TEST(L1I, partitions) { 437 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 438 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); 439 } 440 } 441 442 TEST(L1I, line_size) { 443 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 444 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); 445 } 446 } 447 448 TEST(L1I, flags) { 449 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 450 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); 451 } 452 } 453 454 TEST(L1I, processors) { 455 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { 456 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); 457 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); 458 } 459 } 460 461 TEST(L1D, count) { 462 ASSERT_EQ(4, cpuinfo_get_l1d_caches_count()); 463 } 464 465 TEST(L1D, non_null) { 466 ASSERT_TRUE(cpuinfo_get_l1d_caches()); 467 } 468 469 TEST(L1D, size) { 470 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 471 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); 472 } 473 } 474 475 TEST(L1D, associativity) { 476 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 477 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); 478 } 479 } 480 481 TEST(L1D, sets) { 482 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 483 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, 484 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); 485 } 486 } 487 488 TEST(L1D, partitions) { 489 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 490 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); 491 } 492 } 493 494 TEST(L1D, line_size) { 495 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 496 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); 497 } 498 } 499 500 TEST(L1D, flags) { 501 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 502 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); 503 } 504 } 505 506 TEST(L1D, processors) { 507 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { 508 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); 509 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); 510 } 511 } 512 513 TEST(L2, count) { 514 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); 515 } 516 517 TEST(L2, non_null) { 518 ASSERT_TRUE(cpuinfo_get_l2_caches()); 519 } 520 521 TEST(L2, size) { 522 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 523 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size); 524 } 525 } 526 527 TEST(L2, associativity) { 528 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 529 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); 530 } 531 } 532 533 TEST(L2, sets) { 534 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 535 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, 536 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); 537 } 538 } 539 540 TEST(L2, partitions) { 541 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 542 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); 543 } 544 } 545 546 TEST(L2, line_size) { 547 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 548 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); 549 } 550 } 551 552 TEST(L2, flags) { 553 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 554 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); 555 } 556 } 557 558 TEST(L2, processors) { 559 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { 560 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); 561 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); 562 } 563 } 564 565 TEST(L3, none) { 566 ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); 567 ASSERT_FALSE(cpuinfo_get_l3_caches()); 568 } 569 570 TEST(L4, none) { 571 ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); 572 ASSERT_FALSE(cpuinfo_get_l4_caches()); 573 } 574 575 #include <galaxy-a3-2016-eu.h> 576 577 int main(int argc, char* argv[]) { 578 #if CPUINFO_ARCH_ARM 579 cpuinfo_set_hwcap(UINT32_C(0x0007B0D6)); 580 cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); 581 #endif 582 cpuinfo_mock_filesystem(filesystem); 583 #ifdef __ANDROID__ 584 cpuinfo_mock_android_properties(properties); 585 #endif 586 cpuinfo_initialize(); 587 ::testing::InitGoogleTest(&argc, argv); 588 return RUN_ALL_TESTS(); 589 } 590