1 struct cpuinfo_mock_file filesystem[] = {
2 	{
3 		.path = "/proc/cpuinfo",
4 		.size = 1140,
5 		.content =
6 			"processor\t: 0\n"
7 			"BogoMIPS\t: 200.00\n"
8 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
9 			"CPU implementer\t: 0x43\n"
10 			"CPU architecture: 8\n"
11 			"CPU variant\t: 0x1\n"
12 			"CPU part\t: 0x0a1\n"
13 			"CPU revision\t: 1\n"
14 			"\n"
15 			"processor\t: 1\n"
16 			"BogoMIPS\t: 200.00\n"
17 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
18 			"CPU implementer\t: 0x43\n"
19 			"CPU architecture: 8\n"
20 			"CPU variant\t: 0x1\n"
21 			"CPU part\t: 0x0a1\n"
22 			"CPU revision\t: 1\n"
23 			"\n"
24 			"processor\t: 2\n"
25 			"BogoMIPS\t: 200.00\n"
26 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
27 			"CPU implementer\t: 0x43\n"
28 			"CPU architecture: 8\n"
29 			"CPU variant\t: 0x1\n"
30 			"CPU part\t: 0x0a1\n"
31 			"CPU revision\t: 1\n"
32 			"\n"
33 			"processor\t: 3\n"
34 			"BogoMIPS\t: 200.00\n"
35 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
36 			"CPU implementer\t: 0x43\n"
37 			"CPU architecture: 8\n"
38 			"CPU variant\t: 0x1\n"
39 			"CPU part\t: 0x0a1\n"
40 			"CPU revision\t: 1\n"
41 			"\n"
42 			"processor\t: 4\n"
43 			"BogoMIPS\t: 200.00\n"
44 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
45 			"CPU implementer\t: 0x43\n"
46 			"CPU architecture: 8\n"
47 			"CPU variant\t: 0x1\n"
48 			"CPU part\t: 0x0a1\n"
49 			"CPU revision\t: 1\n"
50 			"\n"
51 			"processor\t: 5\n"
52 			"BogoMIPS\t: 200.00\n"
53 			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics\n"
54 			"CPU implementer\t: 0x43\n"
55 			"CPU architecture: 8\n"
56 			"CPU variant\t: 0x1\n"
57 			"CPU part\t: 0x0a1\n"
58 			"CPU revision\t: 1\n"
59 			"\n",
60 	},
61 	{
62 		.path = "/sys/devices/system/cpu/kernel_max",
63 		.size = 4,
64 		.content = "127\n",
65 	},
66 	{
67 		.path = "/sys/devices/system/cpu/possible",
68 		.size = 4,
69 		.content = "0-5\n",
70 	},
71 	{
72 		.path = "/sys/devices/system/cpu/present",
73 		.size = 4,
74 		.content = "0-5\n",
75 	},
76 	{
77 		.path = "/sys/devices/system/cpu/cpu0/topology/physical_package_id",
78 		.size = 2,
79 		.content = "0\n",
80 	},
81 	{
82 		.path = "/sys/devices/system/cpu/cpu0/topology/core_siblings_list",
83 		.size = 4,
84 		.content = "0-5\n",
85 	},
86 	{
87 		.path = "/sys/devices/system/cpu/cpu0/topology/core_id",
88 		.size = 2,
89 		.content = "0\n",
90 	},
91 	{
92 		.path = "/sys/devices/system/cpu/cpu0/topology/thread_siblings_list",
93 		.size = 2,
94 		.content = "0\n",
95 	},
96 	{
97 		.path = "/sys/devices/system/cpu/cpu1/topology/physical_package_id",
98 		.size = 2,
99 		.content = "0\n",
100 	},
101 	{
102 		.path = "/sys/devices/system/cpu/cpu1/topology/core_siblings_list",
103 		.size = 4,
104 		.content = "0-5\n",
105 	},
106 	{
107 		.path = "/sys/devices/system/cpu/cpu1/topology/core_id",
108 		.size = 2,
109 		.content = "1\n",
110 	},
111 	{
112 		.path = "/sys/devices/system/cpu/cpu1/topology/thread_siblings_list",
113 		.size = 2,
114 		.content = "1\n",
115 	},
116 	{
117 		.path = "/sys/devices/system/cpu/cpu2/topology/physical_package_id",
118 		.size = 2,
119 		.content = "0\n",
120 	},
121 	{
122 		.path = "/sys/devices/system/cpu/cpu2/topology/core_siblings_list",
123 		.size = 4,
124 		.content = "0-5\n",
125 	},
126 	{
127 		.path = "/sys/devices/system/cpu/cpu2/topology/core_id",
128 		.size = 2,
129 		.content = "2\n",
130 	},
131 	{
132 		.path = "/sys/devices/system/cpu/cpu2/topology/thread_siblings_list",
133 		.size = 2,
134 		.content = "2\n",
135 	},
136 	{
137 		.path = "/sys/devices/system/cpu/cpu3/topology/physical_package_id",
138 		.size = 2,
139 		.content = "0\n",
140 	},
141 	{
142 		.path = "/sys/devices/system/cpu/cpu3/topology/core_siblings_list",
143 		.size = 4,
144 		.content = "0-5\n",
145 	},
146 	{
147 		.path = "/sys/devices/system/cpu/cpu3/topology/core_id",
148 		.size = 2,
149 		.content = "3\n",
150 	},
151 	{
152 		.path = "/sys/devices/system/cpu/cpu3/topology/thread_siblings_list",
153 		.size = 2,
154 		.content = "3\n",
155 	},
156 	{
157 		.path = "/sys/devices/system/cpu/cpu4/topology/physical_package_id",
158 		.size = 2,
159 		.content = "0\n",
160 	},
161 	{
162 		.path = "/sys/devices/system/cpu/cpu4/topology/core_siblings_list",
163 		.size = 4,
164 		.content = "0-5\n",
165 	},
166 	{
167 		.path = "/sys/devices/system/cpu/cpu4/topology/core_id",
168 		.size = 2,
169 		.content = "4\n",
170 	},
171 	{
172 		.path = "/sys/devices/system/cpu/cpu4/topology/thread_siblings_list",
173 		.size = 2,
174 		.content = "4\n",
175 	},
176 	{
177 		.path = "/sys/devices/system/cpu/cpu5/topology/physical_package_id",
178 		.size = 2,
179 		.content = "0\n",
180 	},
181 	{
182 		.path = "/sys/devices/system/cpu/cpu5/topology/core_siblings_list",
183 		.size = 4,
184 		.content = "0-5\n",
185 	},
186 	{
187 		.path = "/sys/devices/system/cpu/cpu5/topology/core_id",
188 		.size = 2,
189 		.content = "5\n",
190 	},
191 	{
192 		.path = "/sys/devices/system/cpu/cpu5/topology/thread_siblings_list",
193 		.size = 2,
194 		.content = "5\n",
195 	},
196 	{ NULL },
197 };
198