64    uint64_t dst_address = sdst->buffer.gpu_address + sdst->surface.u.gfx9.surf_offset;  in si_sdma_v4_copy_texture()
65    uint64_t src_address = ssrc->buffer.gpu_address + ssrc->surface.u.gfx9.surf_offset;  in si_sdma_v4_copy_texture()
66    unsigned dst_pitch = sdst->surface.u.gfx9.surf_pitch;  in si_sdma_v4_copy_texture()
67    unsigned src_pitch = ssrc->surface.u.gfx9.surf_pitch;  in si_sdma_v4_copy_texture()
68    uint64_t dst_slice_pitch = ((uint64_t)sdst->surface.u.gfx9.surf_slice_size) / bpp;  in si_sdma_v4_copy_texture()
69    uint64_t src_slice_pitch = ((uint64_t)ssrc->surface.u.gfx9.surf_slice_size) / bpp;  in si_sdma_v4_copy_texture()
80    assert(sdst->surface.u.gfx9.surf_offset + dst_slice_pitch * bpp * (dstz + src_box->depth) <=  in si_sdma_v4_copy_texture()
82    assert(ssrc->surface.u.gfx9.surf_offset + src_slice_pitch * bpp * (srcz + src_box->depth) <=  in si_sdma_v4_copy_texture()
107       src_address += ssrc->surface.u.gfx9.offset[src_level];  in si_sdma_v4_copy_texture()
108       dst_address += sdst->surface.u.gfx9.offset[dst_level];  in si_sdma_v4_copy_texture()
158       linear_address += linear->surface.u.gfx9.offset[linear_level];  in si_sdma_v4_copy_texture()
185       radeon_emit(cs, util_logbase2(bpp) | tiled->surface.u.gfx9.surf.swizzle_mode << 3 |  in si_sdma_v4_copy_texture()
186                          tiled->surface.u.gfx9.resource_type << 9 |  in si_sdma_v4_copy_texture()
187                          tiled->surface.u.gfx9.surf.epitch << 16);  in si_sdma_v4_copy_texture()