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/external/llvm-project/llvm/test/CodeGen/X86/
Dfp-strict-scalar-cmp.ll8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefix=X87
9 …llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,+cmov -O3 | FileCheck %s --check-prefix=X87-CMOV
11 define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
13 ; SSE-32: # %bb.0:
14 ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
15 ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
16 ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
17 ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
24 ; SSE-64: # %bb.0:
32 ; AVX-32: # %bb.0:
[all …]
Dfp-strict-scalar-fptoint.ll8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
32 define i1 @fptosi_f32toi1(float %x) #0 {
34 ; SSE-X86: # %bb.0:
35 ; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax
40 ; SSE-X64: # %bb.0:
46 ; AVX-X86: # %bb.0:
47 ; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax
52 ; AVX-X64: # %bb.0:
57 ; X87-LABEL: fptosi_f32toi1:
58 ; X87: # %bb.0:
[all …]
Dfp-intrinsics.ll2 ; RUN: llc -O3 -mtriple=i686-pc-linux -mattr=+cmov < %s | FileCheck %s --check-prefix=X87
17 define double @f1() #0 {
18 ; X87-LABEL: f1:
19 ; X87: # %bb.0: # %entry
20 ; X87-NEXT: fld1
21 ; X87-NEXT: fdivs {{\.LCPI.*}}
22 ; X87-NEXT: wait
23 ; X87-NEXT: retl
26 ; X86-SSE: # %bb.0: # %entry
29 ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
[all …]
Dfp-strict-scalar-inttofp.ll8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
32 define float @sitofp_i1tof32(i1 %x) #0 {
34 ; SSE-X86: # %bb.0:
37 ; SSE-X86-NEXT: movb {{[0-9]+}}(%esp), %al
50 ; SSE-X64: # %bb.0:
58 ; AVX-X86: # %bb.0:
61 ; AVX-X86-NEXT: movb {{[0-9]+}}(%esp), %al
74 ; AVX-X64: # %bb.0:
81 ; X87-LABEL: sitofp_i1tof32:
82 ; X87: # %bb.0:
[all …]
Dpowi.ll2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86-X87
9 ; X86-X87-LABEL: pow_wrapper:
10 ; X86-X87: # %bb.0:
11 ; X86-X87-NEXT: fldl {{[0-9]+}}(%esp)
12 ; X86-X87-NEXT: fld %st(0)
13 ; X86-X87-NEXT: fmul %st(1), %st
14 ; X86-X87-NEXT: fmul %st, %st(1)
15 ; X86-X87-NEXT: fmul %st, %st(0)
16 ; X86-X87-NEXT: fmul %st, %st(1)
17 ; X86-X87-NEXT: fmul %st, %st(0)
[all …]
Dscalar-fp-to-i64.ll22 …mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefixes=CHECK,X86,X87,X87-WIN
23 …mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefixes=CHECK,X86,X87,X87-LIN
39 ; SSE2 (cvtts[ds]2si) and vanilla X87 (fnstcw+fist, 32-bit only).
43 ; X86-AVX512DQVL: # %bb.0:
44 ; X86-AVX512DQVL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
51 ; X64-AVX512: # %bb.0:
56 ; X86-AVX512DQ: # %bb.0:
57 ; X86-AVX512DQ-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
65 ; X86-AVX512F-WIN: # %bb.0:
70 ; X86-AVX512F-WIN-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
[all …]
Dscalar-fp-to-i32.ll24 …llc < %s -mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-WIN
25 …llc < %s -mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-LIN
32 ; X86-AVX512: # %bb.0:
33 ; X86-AVX512-NEXT: vcvttss2usi {{[0-9]+}}(%esp), %eax
37 ; X64-AVX512: # %bb.0:
42 ; X86-SSE3-WIN: # %bb.0:
47 ; X86-SSE3-WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
57 ; X86-SSE3-LIN: # %bb.0:
59 ; X86-SSE3-LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
68 ; X64-SSE: # %bb.0:
[all …]
Dfp-cvt.ll3 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-X87
12 ; X86: # %bb.0:
14 ; X86-NEXT: fldt {{[0-9]+}}(%esp)
15 ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
16 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
17 ; X86-NEXT: orl $3072, %eax # imm = 0xC00
18 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
19 ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
20 ; X86-NEXT: fistps {{[0-9]+}}(%esp)
21 ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
[all …]
Dfp-strict-scalar.ll8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
27 ; SSE-X86: # %bb.0:
32 ; SSE-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
42 ; SSE-X64: # %bb.0:
47 ; AVX-X86: # %bb.0:
52 ; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
62 ; AVX-X64: # %bb.0:
66 ; X87-LABEL: fadd_f64:
67 ; X87: # %bb.0:
68 ; X87-NEXT: fldl {{[0-9]+}}(%esp)
[all …]
Dscalar-int-to-fp.ll11 … < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefixes=CHECK32,X87
19 ; AVX512_32: # %bb.0:
21 ; AVX512_32-NEXT: vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
28 ; AVX512_64: # %bb.0:
33 ; SSE2_32: # %bb.0:
35 ; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
45 ; SSE2_64: # %bb.0:
51 ; SSE1_32: # %bb.0:
57 ; SSE1_32-NEXT: movl %eax, {{[0-9]+}}(%esp)
58 ; SSE1_32-NEXT: movl $0, {{[0-9]+}}(%esp)
[all …]
Dfabs.ll2 …r=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87
10 ; X87-LABEL: test1:
11 ; X87: # %bb.0:
12 ; X87-NEXT: flds {{[0-9]+}}(%esp)
13 ; X87-NEXT: fabs
14 ; X87-NEXT: retl
17 ; X87UNSAFE: # %bb.0:
18 ; X87UNSAFE-NEXT: flds {{[0-9]+}}(%esp)
23 ; X64: # %bb.0:
31 ; X87-LABEL: test2:
[all …]
/external/capstone/suite/MC/Sparc/
Dsparc-alu-instructions.s.cs2 0x80,0x00,0x00,0x00 = add %g0, %g0, %g0
3 0x86,0x00,0x40,0x02 = add %g1, %g2, %g3
4 0xa0,0x02,0x00,0x09 = add %o0, %o1, %l0
5 0xa0,0x02,0x20,0x0a = add %o0, 10, %l0
6 0x86,0x80,0x40,0x02 = addcc %g1, %g2, %g3
7 0x86,0xc0,0x40,0x02 = addxcc %g1, %g2, %g3
8 0x86,0x70,0x40,0x02 = udiv %g1, %g2, %g3
9 0x86,0x78,0x40,0x02 = sdiv %g1, %g2, %g3
10 0x86,0x08,0x40,0x02 = and %g1, %g2, %g3
11 0x86,0x28,0x40,0x02 = andn %g1, %g2, %g3
[all …]
Dsparc64-ctrl-instructions.s.cs2 0x85,0x66,0x40,0x01 = movne %icc, %g1, %g2
3 0x85,0x64,0x40,0x01 = move %icc, %g1, %g2
4 0x85,0x66,0x80,0x01 = movg %icc, %g1, %g2
5 0x85,0x64,0x80,0x01 = movle %icc, %g1, %g2
6 0x85,0x66,0xc0,0x01 = movge %icc, %g1, %g2
7 0x85,0x64,0xc0,0x01 = movl %icc, %g1, %g2
8 0x85,0x67,0x00,0x01 = movgu %icc, %g1, %g2
9 0x85,0x65,0x00,0x01 = movleu %icc, %g1, %g2
10 0x85,0x67,0x40,0x01 = movcc %icc, %g1, %g2
11 0x85,0x65,0x40,0x01 = movcs %icc, %g1, %g2
[all …]
/external/vixl/test/aarch32/traces/
Dassembler-cond-rd-rn-rm-usad8-a32.h38 0x19, 0xf5, 0x81, 0x87 // usad8 hi r1 r9 r5
41 0x16, 0xf2, 0x88, 0x57 // usad8 pl r8 r6 r2
44 0x18, 0xf2, 0x85, 0x87 // usad8 hi r5 r8 r2
47 0x12, 0xf7, 0x89, 0x77 // usad8 vc r9 r2 r7
50 0x16, 0xf3, 0x84, 0xb7 // usad8 lt r4 r6 r3
53 0x16, 0xf2, 0x8b, 0xd7 // usad8 le r11 r6 r2
56 0x1e, 0xf4, 0x88, 0x37 // usad8 cc r8 r14 r4
59 0x1e, 0xf6, 0x85, 0xd7 // usad8 le r5 r14 r6
62 0x11, 0xf0, 0x86, 0xb7 // usad8 lt r6 r1 r0
65 0x10, 0xf9, 0x85, 0xb7 // usad8 lt r5 r0 r9
[all …]
Dassembler-cond-rd-rn-rm-qadd-t32.h38 0x82, 0xfa, 0x8c, 0xf5 // qadd al r5 r12 r2
41 0x8c, 0xfa, 0x83, 0xf7 // qadd al r7 r3 r12
44 0x8a, 0xfa, 0x82, 0xf1 // qadd al r1 r2 r10
47 0x81, 0xfa, 0x87, 0xf2 // qadd al r2 r7 r1
50 0x80, 0xfa, 0x89, 0xfb // qadd al r11 r9 r0
53 0x8a, 0xfa, 0x89, 0xf6 // qadd al r6 r9 r10
56 0x80, 0xfa, 0x85, 0xf0 // qadd al r0 r5 r0
59 0x86, 0xfa, 0x86, 0xf4 // qadd al r4 r6 r6
62 0x81, 0xfa, 0x8d, 0xf1 // qadd al r1 r13 r1
65 0x88, 0xfa, 0x8e, 0xf8 // qadd al r8 r14 r8
[all …]
/external/llvm-project/llvm/test/MC/Sparc/
Dsparc-alu-instructions.s4 ! CHECK: add %g0, %g0, %g0 ! encoding: [0x80,0x00,0x00,0x00]
6 ! CHECK: add %g1, %g2, %g3 ! encoding: [0x86,0x00,0x40,0x02]
8 ! CHECK: add %o0, %o1, %l0 ! encoding: [0xa0,0x02,0x00,0x09]
10 ! CHECK: add %o0, 10, %l0 ! encoding: [0xa0,0x02,0x20,0x0a]
13 ! CHECK: addcc %g1, %g2, %g3 ! encoding: [0x86,0x80,0x40,0x02]
16 ! CHECK: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
19 ! CHECK: udiv %g1, %g2, %g3 ! encoding: [0x86,0x70,0x40,0x02]
22 ! CHECK: sdiv %g1, %g2, %g3 ! encoding: [0x86,0x78,0x40,0x02]
25 ! CHECK: and %g1, %g2, %g3 ! encoding: [0x86,0x08,0x40,0x02]
27 ! CHECK: andn %g1, %g2, %g3 ! encoding: [0x86,0x28,0x40,0x02]
[all …]
/external/llvm/test/MC/Sparc/
Dsparc-alu-instructions.s4 ! CHECK: add %g0, %g0, %g0 ! encoding: [0x80,0x00,0x00,0x00]
6 ! CHECK: add %g1, %g2, %g3 ! encoding: [0x86,0x00,0x40,0x02]
8 ! CHECK: add %o0, %o1, %l0 ! encoding: [0xa0,0x02,0x00,0x09]
10 ! CHECK: add %o0, 10, %l0 ! encoding: [0xa0,0x02,0x20,0x0a]
13 ! CHECK: addcc %g1, %g2, %g3 ! encoding: [0x86,0x80,0x40,0x02]
16 ! CHECK: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
19 ! CHECK: udiv %g1, %g2, %g3 ! encoding: [0x86,0x70,0x40,0x02]
22 ! CHECK: sdiv %g1, %g2, %g3 ! encoding: [0x86,0x78,0x40,0x02]
25 ! CHECK: and %g1, %g2, %g3 ! encoding: [0x86,0x08,0x40,0x02]
27 ! CHECK: andn %g1, %g2, %g3 ! encoding: [0x86,0x28,0x40,0x02]
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86InsertWait.cpp1 //- X86Insertwait.cpp - Strict-Fp:Insert wait instruction X87 instructions --//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
10 // X87 instructions when strict float is enabled.
12 // The logic to insert a wait instruction after an X87 instruction is as below:
13 // 1. If the X87 instruction don't raise float exception nor is a load/store
14 // instruction, or is a x87 control instruction, don't insert wait.
15 // 2. If the X87 instruction is an instruction which the following instruction
16 // is an X87 exception synchronizing X87 instruction, don't insert wait.
54 char WaitInsert::ID = 0;
58 /// Return true if the Reg is X87 register.
[all …]
/external/icu/icu4c/source/data/mappings/
Dicu-internal-compound-t.ucm25 <U0080> \xC2\x80 |0
26 <U0081> \xC2\x81 |0
27 <U0082> \xC2\x82 |0
28 <U0083> \xC2\x83 |0
29 <U0084> \xC2\x84 |0
30 <U0085> \xC2\x85 |0
31 <U0086> \xC2\x86 |0
32 <U0087> \xC2\x87 |0
33 <U0088> \xC2\x88 |0
34 <U0089> \xC2\x89 |0
[all …]
/external/llvm/test/CodeGen/X86/
Dscalar-int-to-fp.ll12 …ple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefix=CHECK --check-prefix=X87
19 ; X87: fildll
30 ; X87: fildl
41 ; X87: fildll
52 ; X87: fildl
63 ; X87: fildll
77 ; AVX512_32: vmovq {{.*#+}} xmm0 = mem[0],zero
78 ; AVX512_32: vmovlpd %xmm0, {{[0-9]+}}(%esp)
83 ; SSE2_32: movq {{.*#+}} xmm0 = mem[0],zero
84 ; SSE2_32: movq %xmm0, {{[0-9]+}}(%esp)
[all …]
/external/vixl/test/aarch64/traces/
Dsim-sabd-16b-trace-aarch64.h38 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0x22, 0x28, 0x01, 0x01, 0xff, 0x01, 0x01, 0x01, 0x27, 0x22, 0x2c, 0x05, 0x01, 0x01, 0x01, 0x01,
40 0x4a, 0x29, 0x02, 0xfe, 0xfe, 0x02, 0x02, 0x28, 0x49, 0x4e, 0x31, 0x06, 0x02, 0x02, 0x02, 0x02,
41 0x4b, 0x2a, 0xfd, 0xfd, 0xfd, 0x03, 0x29, 0x4a, 0x75, 0x53, 0x32, 0x07, 0x03, 0x03, 0x03, 0x08,
42 0x4c, 0xd5, 0xfc, 0xfc, 0xfc, 0x2a, 0x4b, 0x76, 0x7a, 0x54, 0x33, 0x08, 0x04, 0x04, 0x09, 0x33,
43 0xb3, 0xd4, 0xfb, 0xfb, 0xd5, 0x4c, 0x77, 0x7b, 0x7b, 0x55, 0x34, 0x09, 0x05, 0x0a, 0x34, 0x55,
44 0xb2, 0xd3, 0xfa, 0xd4, 0xb3, 0x78, 0x7c, 0x7c, 0x7c, 0x56, 0x35, 0x0a, 0x0b, 0x35, 0x56, 0x7d,
45 0xb1, 0xd2, 0xd3, 0xb2, 0x87, 0x7d, 0x7d, 0x7d, 0x7d, 0x57, 0x36, 0x10, 0x36, 0x57, 0x7e, 0x7e,
46 0xb0, 0xab, 0xb1, 0x86, 0x82, 0x7e, 0x7e, 0x7e, 0x7e, 0x58, 0x3c, 0x3b, 0x58, 0x7f, 0x7f, 0x7f,
47 0x89, 0x89, 0x85, 0x81, 0x81, 0x7f, 0x7f, 0x7f, 0x7f, 0x5e, 0x67, 0x5d, 0x80, 0x80, 0x80, 0x80,
[all …]
Dsim-orn-16b-trace-aarch64.h38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
39 0xbb, 0xd7, 0xfd, 0xfe, 0x7f, 0xfe, 0xfd, 0xfe, 0xd7, 0xbb, 0xcf, 0xfa, 0xfd, 0xfe, 0xff, 0xfe,
40 0xb3, 0xd5, 0xfd, 0x7f, 0x7f, 0xfd, 0xfd, 0xd7, 0xb3, 0xaf, 0xce, 0xf9, 0xfd, 0xff, 0xff, 0xfd,
41 0xb3, 0xd5, 0x7f, 0x7e, 0x7f, 0xfc, 0xd5, 0xb3, 0x87, 0xaa, 0xcd, 0xf8, 0xff, 0xfe, 0xff, 0xf7,
42 0xb3, 0x7f, 0x7f, 0x7f, 0x7f, 0xd5, 0xb3, 0x87, 0x83, 0xab, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xcc,
43 0x7f, 0x7f, 0x7d, 0x7e, 0x7f, 0xb3, 0x87, 0x82, 0x83, 0xaa, 0xff, 0xfe, 0xfd, 0xff, 0xff, 0xaa,
44 0x7f, 0x7d, 0x7d, 0x7f, 0x7f, 0x87, 0x83, 0x83, 0x83, 0xff, 0xfe, 0xfd, 0xff, 0xfe, 0xff, 0x82,
45 0x7f, 0x7d, 0x7d, 0x7f, 0x7f, 0x82, 0x81, 0x82, 0xff, 0xfe, 0xfd, 0xff, 0xfd, 0xfe, 0xff, 0x81,
46 0x7f, 0x55, 0x7f, 0x7f, 0x7f, 0x81, 0x81, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xfe, 0xff, 0x80,
47 0x77, 0x77, 0x7f, 0x7e, 0x7f, 0x80, 0xff, 0xfe, 0xff, 0xff, 0xcc, 0xfa, 0xff, 0xff, 0xff, 0x7f,
[all …]
Dsim-saba-16b-trace-aarch64.h38 0x00, 0x01, 0x02, 0x08, 0x33, 0x55, 0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0xaa, 0xcc, 0xf8,
39 0x22, 0x29, 0x03, 0x09, 0x32, 0x56, 0x7e, 0x7f, 0xa6, 0xa2, 0xad, 0x87, 0x84, 0xab, 0xcd, 0xf9,
40 0x4a, 0x2a, 0x04, 0x06, 0x31, 0x57, 0x7f, 0xa6, 0xc8, 0xce, 0xb2, 0x88, 0x85, 0xac, 0xce, 0xfa,
41 0x4b, 0x2b, 0xff, 0x05, 0x30, 0x58, 0xa6, 0xc8, 0xf4, 0xd3, 0xb3, 0x89, 0x86, 0xad, 0xcf, 0x00,
42 0x4c, 0xd6, 0xfe, 0x04, 0x2f, 0x7f, 0xc8, 0xf4, 0xf9, 0xd4, 0xb4, 0x8a, 0x87, 0xae, 0xd5, 0x2b,
43 0xb3, 0xd5, 0xfd, 0x03, 0x08, 0xa1, 0xf4, 0xf9, 0xfa, 0xd5, 0xb5, 0x8b, 0x88, 0xb4, 0x00, 0x4d,
44 0xb2, 0xd4, 0xfc, 0xdc, 0xe6, 0xcd, 0xf9, 0xfa, 0xfb, 0xd6, 0xb6, 0x8c, 0x8e, 0xdf, 0x22, 0x75,
45 0xb1, 0xd3, 0xd5, 0xba, 0xba, 0xd2, 0xfa, 0xfb, 0xfc, 0xd7, 0xb7, 0x92, 0xb9, 0x01, 0x4a, 0x76,
46 0xb0, 0xac, 0xb3, 0x8e, 0xb5, 0xd3, 0xfb, 0xfc, 0xfd, 0xd8, 0xbd, 0xbd, 0xdb, 0x29, 0x4b, 0x77,
47 0x89, 0x8a, 0x87, 0x89, 0xb4, 0xd4, 0xfc, 0xfd, 0xfe, 0xde, 0xe8, 0xdf, 0x03, 0x2a, 0x4c, 0x78,
[all …]
/external/llvm-project/libc/utils/FPUtil/x86_64/
DFEnv.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
27 // The rounding control values in the x87 control register and the MXCSR
31 static constexpr uint16_t ToNearest = 0x0;
32 static constexpr uint16_t Downward = 0x1;
33 static constexpr uint16_t Upward = 0x2;
34 static constexpr uint16_t TowardZero = 0x3;
40 // The exception flags in the x87 status register and the MXCSR have the same
43 static constexpr uint16_t Invalid = 0x1;
44 static constexpr uint16_t Denormal = 0x2; // This flag is not used
45 static constexpr uint16_t DivByZero = 0x4;
[all …]
/external/llvm-project/clang/test/CodeGen/
Dattr-target-x86.c40 // CHECK: baz{{.*}} #0
43 // CHECK: koala{{.*}} #0
47 // CHECK: bar{{.*}} #0
54 // CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87" "tune-cpu"="i686"
55 …sr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
57 // CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-aes,-avx,-avx2,-avx512bf16,-…
58 …target-features"="+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686"
59 // CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-avx,-avx2,-avx512bf16,-avx51…
60 …+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-a…
62 // CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-3dnow,-3dnowa,-mmx"
[all …]

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