1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64 6; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-32 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-64 8; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefix=X87 9; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,+cmov -O3 | FileCheck %s --check-prefix=X87-CMOV 10 11define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 12; SSE-32-LABEL: test_f32_oeq_q: 13; SSE-32: # %bb.0: 14; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 15; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 16; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 17; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 18; SSE-32-NEXT: cmovnel %eax, %ecx 19; SSE-32-NEXT: cmovpl %eax, %ecx 20; SSE-32-NEXT: movl (%ecx), %eax 21; SSE-32-NEXT: retl 22; 23; SSE-64-LABEL: test_f32_oeq_q: 24; SSE-64: # %bb.0: 25; SSE-64-NEXT: movl %edi, %eax 26; SSE-64-NEXT: ucomiss %xmm1, %xmm0 27; SSE-64-NEXT: cmovnel %esi, %eax 28; SSE-64-NEXT: cmovpl %esi, %eax 29; SSE-64-NEXT: retq 30; 31; AVX-32-LABEL: test_f32_oeq_q: 32; AVX-32: # %bb.0: 33; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 34; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 35; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 36; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 37; AVX-32-NEXT: cmovnel %eax, %ecx 38; AVX-32-NEXT: cmovpl %eax, %ecx 39; AVX-32-NEXT: movl (%ecx), %eax 40; AVX-32-NEXT: retl 41; 42; AVX-64-LABEL: test_f32_oeq_q: 43; AVX-64: # %bb.0: 44; AVX-64-NEXT: movl %edi, %eax 45; AVX-64-NEXT: vucomiss %xmm1, %xmm0 46; AVX-64-NEXT: cmovnel %esi, %eax 47; AVX-64-NEXT: cmovpl %esi, %eax 48; AVX-64-NEXT: retq 49; 50; X87-LABEL: test_f32_oeq_q: 51; X87: # %bb.0: 52; X87-NEXT: flds {{[0-9]+}}(%esp) 53; X87-NEXT: flds {{[0-9]+}}(%esp) 54; X87-NEXT: fucompp 55; X87-NEXT: wait 56; X87-NEXT: fnstsw %ax 57; X87-NEXT: # kill: def $ah killed $ah killed $ax 58; X87-NEXT: sahf 59; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 60; X87-NEXT: jne .LBB0_3 61; X87-NEXT: # %bb.1: 62; X87-NEXT: jp .LBB0_3 63; X87-NEXT: # %bb.2: 64; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 65; X87-NEXT: .LBB0_3: 66; X87-NEXT: movl (%eax), %eax 67; X87-NEXT: retl 68; 69; X87-CMOV-LABEL: test_f32_oeq_q: 70; X87-CMOV: # %bb.0: 71; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 72; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 73; X87-CMOV-NEXT: fucompi %st(1), %st 74; X87-CMOV-NEXT: fstp %st(0) 75; X87-CMOV-NEXT: wait 76; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 77; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 78; X87-CMOV-NEXT: cmovnel %eax, %ecx 79; X87-CMOV-NEXT: cmovpl %eax, %ecx 80; X87-CMOV-NEXT: movl (%ecx), %eax 81; X87-CMOV-NEXT: retl 82 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 83 float %f1, float %f2, metadata !"oeq", 84 metadata !"fpexcept.strict") #0 85 %res = select i1 %cond, i32 %a, i32 %b 86 ret i32 %res 87} 88 89define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 90; SSE-32-LABEL: test_f32_ogt_q: 91; SSE-32: # %bb.0: 92; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 93; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 94; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 95; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 96; SSE-32-NEXT: cmoval %eax, %ecx 97; SSE-32-NEXT: movl (%ecx), %eax 98; SSE-32-NEXT: retl 99; 100; SSE-64-LABEL: test_f32_ogt_q: 101; SSE-64: # %bb.0: 102; SSE-64-NEXT: movl %edi, %eax 103; SSE-64-NEXT: ucomiss %xmm1, %xmm0 104; SSE-64-NEXT: cmovbel %esi, %eax 105; SSE-64-NEXT: retq 106; 107; AVX-32-LABEL: test_f32_ogt_q: 108; AVX-32: # %bb.0: 109; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 110; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 111; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 112; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 113; AVX-32-NEXT: cmoval %eax, %ecx 114; AVX-32-NEXT: movl (%ecx), %eax 115; AVX-32-NEXT: retl 116; 117; AVX-64-LABEL: test_f32_ogt_q: 118; AVX-64: # %bb.0: 119; AVX-64-NEXT: movl %edi, %eax 120; AVX-64-NEXT: vucomiss %xmm1, %xmm0 121; AVX-64-NEXT: cmovbel %esi, %eax 122; AVX-64-NEXT: retq 123; 124; X87-LABEL: test_f32_ogt_q: 125; X87: # %bb.0: 126; X87-NEXT: flds {{[0-9]+}}(%esp) 127; X87-NEXT: flds {{[0-9]+}}(%esp) 128; X87-NEXT: fucompp 129; X87-NEXT: wait 130; X87-NEXT: fnstsw %ax 131; X87-NEXT: # kill: def $ah killed $ah killed $ax 132; X87-NEXT: sahf 133; X87-NEXT: ja .LBB1_1 134; X87-NEXT: # %bb.2: 135; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 136; X87-NEXT: movl (%eax), %eax 137; X87-NEXT: retl 138; X87-NEXT: .LBB1_1: 139; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 140; X87-NEXT: movl (%eax), %eax 141; X87-NEXT: retl 142; 143; X87-CMOV-LABEL: test_f32_ogt_q: 144; X87-CMOV: # %bb.0: 145; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 146; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 147; X87-CMOV-NEXT: fucompi %st(1), %st 148; X87-CMOV-NEXT: fstp %st(0) 149; X87-CMOV-NEXT: wait 150; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 151; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 152; X87-CMOV-NEXT: cmoval %eax, %ecx 153; X87-CMOV-NEXT: movl (%ecx), %eax 154; X87-CMOV-NEXT: retl 155 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 156 float %f1, float %f2, metadata !"ogt", 157 metadata !"fpexcept.strict") #0 158 %res = select i1 %cond, i32 %a, i32 %b 159 ret i32 %res 160} 161 162define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 163; SSE-32-LABEL: test_f32_oge_q: 164; SSE-32: # %bb.0: 165; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 166; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 167; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 168; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 169; SSE-32-NEXT: cmovael %eax, %ecx 170; SSE-32-NEXT: movl (%ecx), %eax 171; SSE-32-NEXT: retl 172; 173; SSE-64-LABEL: test_f32_oge_q: 174; SSE-64: # %bb.0: 175; SSE-64-NEXT: movl %edi, %eax 176; SSE-64-NEXT: ucomiss %xmm1, %xmm0 177; SSE-64-NEXT: cmovbl %esi, %eax 178; SSE-64-NEXT: retq 179; 180; AVX-32-LABEL: test_f32_oge_q: 181; AVX-32: # %bb.0: 182; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 183; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 184; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 185; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 186; AVX-32-NEXT: cmovael %eax, %ecx 187; AVX-32-NEXT: movl (%ecx), %eax 188; AVX-32-NEXT: retl 189; 190; AVX-64-LABEL: test_f32_oge_q: 191; AVX-64: # %bb.0: 192; AVX-64-NEXT: movl %edi, %eax 193; AVX-64-NEXT: vucomiss %xmm1, %xmm0 194; AVX-64-NEXT: cmovbl %esi, %eax 195; AVX-64-NEXT: retq 196; 197; X87-LABEL: test_f32_oge_q: 198; X87: # %bb.0: 199; X87-NEXT: flds {{[0-9]+}}(%esp) 200; X87-NEXT: flds {{[0-9]+}}(%esp) 201; X87-NEXT: fucompp 202; X87-NEXT: wait 203; X87-NEXT: fnstsw %ax 204; X87-NEXT: # kill: def $ah killed $ah killed $ax 205; X87-NEXT: sahf 206; X87-NEXT: jae .LBB2_1 207; X87-NEXT: # %bb.2: 208; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 209; X87-NEXT: movl (%eax), %eax 210; X87-NEXT: retl 211; X87-NEXT: .LBB2_1: 212; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 213; X87-NEXT: movl (%eax), %eax 214; X87-NEXT: retl 215; 216; X87-CMOV-LABEL: test_f32_oge_q: 217; X87-CMOV: # %bb.0: 218; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 219; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 220; X87-CMOV-NEXT: fucompi %st(1), %st 221; X87-CMOV-NEXT: fstp %st(0) 222; X87-CMOV-NEXT: wait 223; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 224; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 225; X87-CMOV-NEXT: cmovael %eax, %ecx 226; X87-CMOV-NEXT: movl (%ecx), %eax 227; X87-CMOV-NEXT: retl 228 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 229 float %f1, float %f2, metadata !"oge", 230 metadata !"fpexcept.strict") #0 231 %res = select i1 %cond, i32 %a, i32 %b 232 ret i32 %res 233} 234 235define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 236; SSE-32-LABEL: test_f32_olt_q: 237; SSE-32: # %bb.0: 238; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 239; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 240; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 241; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 242; SSE-32-NEXT: cmoval %eax, %ecx 243; SSE-32-NEXT: movl (%ecx), %eax 244; SSE-32-NEXT: retl 245; 246; SSE-64-LABEL: test_f32_olt_q: 247; SSE-64: # %bb.0: 248; SSE-64-NEXT: movl %edi, %eax 249; SSE-64-NEXT: ucomiss %xmm0, %xmm1 250; SSE-64-NEXT: cmovbel %esi, %eax 251; SSE-64-NEXT: retq 252; 253; AVX-32-LABEL: test_f32_olt_q: 254; AVX-32: # %bb.0: 255; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 256; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 257; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 258; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 259; AVX-32-NEXT: cmoval %eax, %ecx 260; AVX-32-NEXT: movl (%ecx), %eax 261; AVX-32-NEXT: retl 262; 263; AVX-64-LABEL: test_f32_olt_q: 264; AVX-64: # %bb.0: 265; AVX-64-NEXT: movl %edi, %eax 266; AVX-64-NEXT: vucomiss %xmm0, %xmm1 267; AVX-64-NEXT: cmovbel %esi, %eax 268; AVX-64-NEXT: retq 269; 270; X87-LABEL: test_f32_olt_q: 271; X87: # %bb.0: 272; X87-NEXT: flds {{[0-9]+}}(%esp) 273; X87-NEXT: flds {{[0-9]+}}(%esp) 274; X87-NEXT: fucompp 275; X87-NEXT: wait 276; X87-NEXT: fnstsw %ax 277; X87-NEXT: # kill: def $ah killed $ah killed $ax 278; X87-NEXT: sahf 279; X87-NEXT: ja .LBB3_1 280; X87-NEXT: # %bb.2: 281; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 282; X87-NEXT: movl (%eax), %eax 283; X87-NEXT: retl 284; X87-NEXT: .LBB3_1: 285; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 286; X87-NEXT: movl (%eax), %eax 287; X87-NEXT: retl 288; 289; X87-CMOV-LABEL: test_f32_olt_q: 290; X87-CMOV: # %bb.0: 291; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 292; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 293; X87-CMOV-NEXT: fucompi %st(1), %st 294; X87-CMOV-NEXT: fstp %st(0) 295; X87-CMOV-NEXT: wait 296; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 297; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 298; X87-CMOV-NEXT: cmoval %eax, %ecx 299; X87-CMOV-NEXT: movl (%ecx), %eax 300; X87-CMOV-NEXT: retl 301 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 302 float %f1, float %f2, metadata !"olt", 303 metadata !"fpexcept.strict") #0 304 %res = select i1 %cond, i32 %a, i32 %b 305 ret i32 %res 306} 307 308define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 309; SSE-32-LABEL: test_f32_ole_q: 310; SSE-32: # %bb.0: 311; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 312; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 313; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 314; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 315; SSE-32-NEXT: cmovael %eax, %ecx 316; SSE-32-NEXT: movl (%ecx), %eax 317; SSE-32-NEXT: retl 318; 319; SSE-64-LABEL: test_f32_ole_q: 320; SSE-64: # %bb.0: 321; SSE-64-NEXT: movl %edi, %eax 322; SSE-64-NEXT: ucomiss %xmm0, %xmm1 323; SSE-64-NEXT: cmovbl %esi, %eax 324; SSE-64-NEXT: retq 325; 326; AVX-32-LABEL: test_f32_ole_q: 327; AVX-32: # %bb.0: 328; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 329; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 330; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 331; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 332; AVX-32-NEXT: cmovael %eax, %ecx 333; AVX-32-NEXT: movl (%ecx), %eax 334; AVX-32-NEXT: retl 335; 336; AVX-64-LABEL: test_f32_ole_q: 337; AVX-64: # %bb.0: 338; AVX-64-NEXT: movl %edi, %eax 339; AVX-64-NEXT: vucomiss %xmm0, %xmm1 340; AVX-64-NEXT: cmovbl %esi, %eax 341; AVX-64-NEXT: retq 342; 343; X87-LABEL: test_f32_ole_q: 344; X87: # %bb.0: 345; X87-NEXT: flds {{[0-9]+}}(%esp) 346; X87-NEXT: flds {{[0-9]+}}(%esp) 347; X87-NEXT: fucompp 348; X87-NEXT: wait 349; X87-NEXT: fnstsw %ax 350; X87-NEXT: # kill: def $ah killed $ah killed $ax 351; X87-NEXT: sahf 352; X87-NEXT: jae .LBB4_1 353; X87-NEXT: # %bb.2: 354; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 355; X87-NEXT: movl (%eax), %eax 356; X87-NEXT: retl 357; X87-NEXT: .LBB4_1: 358; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 359; X87-NEXT: movl (%eax), %eax 360; X87-NEXT: retl 361; 362; X87-CMOV-LABEL: test_f32_ole_q: 363; X87-CMOV: # %bb.0: 364; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 365; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 366; X87-CMOV-NEXT: fucompi %st(1), %st 367; X87-CMOV-NEXT: fstp %st(0) 368; X87-CMOV-NEXT: wait 369; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 370; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 371; X87-CMOV-NEXT: cmovael %eax, %ecx 372; X87-CMOV-NEXT: movl (%ecx), %eax 373; X87-CMOV-NEXT: retl 374 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 375 float %f1, float %f2, metadata !"ole", 376 metadata !"fpexcept.strict") #0 377 %res = select i1 %cond, i32 %a, i32 %b 378 ret i32 %res 379} 380 381define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 382; SSE-32-LABEL: test_f32_one_q: 383; SSE-32: # %bb.0: 384; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 385; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 386; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 387; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 388; SSE-32-NEXT: cmovnel %eax, %ecx 389; SSE-32-NEXT: movl (%ecx), %eax 390; SSE-32-NEXT: retl 391; 392; SSE-64-LABEL: test_f32_one_q: 393; SSE-64: # %bb.0: 394; SSE-64-NEXT: movl %edi, %eax 395; SSE-64-NEXT: ucomiss %xmm1, %xmm0 396; SSE-64-NEXT: cmovel %esi, %eax 397; SSE-64-NEXT: retq 398; 399; AVX-32-LABEL: test_f32_one_q: 400; AVX-32: # %bb.0: 401; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 402; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 403; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 404; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 405; AVX-32-NEXT: cmovnel %eax, %ecx 406; AVX-32-NEXT: movl (%ecx), %eax 407; AVX-32-NEXT: retl 408; 409; AVX-64-LABEL: test_f32_one_q: 410; AVX-64: # %bb.0: 411; AVX-64-NEXT: movl %edi, %eax 412; AVX-64-NEXT: vucomiss %xmm1, %xmm0 413; AVX-64-NEXT: cmovel %esi, %eax 414; AVX-64-NEXT: retq 415; 416; X87-LABEL: test_f32_one_q: 417; X87: # %bb.0: 418; X87-NEXT: flds {{[0-9]+}}(%esp) 419; X87-NEXT: flds {{[0-9]+}}(%esp) 420; X87-NEXT: fucompp 421; X87-NEXT: wait 422; X87-NEXT: fnstsw %ax 423; X87-NEXT: # kill: def $ah killed $ah killed $ax 424; X87-NEXT: sahf 425; X87-NEXT: jne .LBB5_1 426; X87-NEXT: # %bb.2: 427; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 428; X87-NEXT: movl (%eax), %eax 429; X87-NEXT: retl 430; X87-NEXT: .LBB5_1: 431; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 432; X87-NEXT: movl (%eax), %eax 433; X87-NEXT: retl 434; 435; X87-CMOV-LABEL: test_f32_one_q: 436; X87-CMOV: # %bb.0: 437; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 438; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 439; X87-CMOV-NEXT: fucompi %st(1), %st 440; X87-CMOV-NEXT: fstp %st(0) 441; X87-CMOV-NEXT: wait 442; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 443; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 444; X87-CMOV-NEXT: cmovnel %eax, %ecx 445; X87-CMOV-NEXT: movl (%ecx), %eax 446; X87-CMOV-NEXT: retl 447 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 448 float %f1, float %f2, metadata !"one", 449 metadata !"fpexcept.strict") #0 450 %res = select i1 %cond, i32 %a, i32 %b 451 ret i32 %res 452} 453 454define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 455; SSE-32-LABEL: test_f32_ord_q: 456; SSE-32: # %bb.0: 457; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 458; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 459; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 460; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 461; SSE-32-NEXT: cmovnpl %eax, %ecx 462; SSE-32-NEXT: movl (%ecx), %eax 463; SSE-32-NEXT: retl 464; 465; SSE-64-LABEL: test_f32_ord_q: 466; SSE-64: # %bb.0: 467; SSE-64-NEXT: movl %edi, %eax 468; SSE-64-NEXT: ucomiss %xmm1, %xmm0 469; SSE-64-NEXT: cmovpl %esi, %eax 470; SSE-64-NEXT: retq 471; 472; AVX-32-LABEL: test_f32_ord_q: 473; AVX-32: # %bb.0: 474; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 475; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 476; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 477; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 478; AVX-32-NEXT: cmovnpl %eax, %ecx 479; AVX-32-NEXT: movl (%ecx), %eax 480; AVX-32-NEXT: retl 481; 482; AVX-64-LABEL: test_f32_ord_q: 483; AVX-64: # %bb.0: 484; AVX-64-NEXT: movl %edi, %eax 485; AVX-64-NEXT: vucomiss %xmm1, %xmm0 486; AVX-64-NEXT: cmovpl %esi, %eax 487; AVX-64-NEXT: retq 488; 489; X87-LABEL: test_f32_ord_q: 490; X87: # %bb.0: 491; X87-NEXT: flds {{[0-9]+}}(%esp) 492; X87-NEXT: flds {{[0-9]+}}(%esp) 493; X87-NEXT: fucompp 494; X87-NEXT: wait 495; X87-NEXT: fnstsw %ax 496; X87-NEXT: # kill: def $ah killed $ah killed $ax 497; X87-NEXT: sahf 498; X87-NEXT: jnp .LBB6_1 499; X87-NEXT: # %bb.2: 500; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 501; X87-NEXT: movl (%eax), %eax 502; X87-NEXT: retl 503; X87-NEXT: .LBB6_1: 504; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 505; X87-NEXT: movl (%eax), %eax 506; X87-NEXT: retl 507; 508; X87-CMOV-LABEL: test_f32_ord_q: 509; X87-CMOV: # %bb.0: 510; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 511; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 512; X87-CMOV-NEXT: fucompi %st(1), %st 513; X87-CMOV-NEXT: fstp %st(0) 514; X87-CMOV-NEXT: wait 515; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 516; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 517; X87-CMOV-NEXT: cmovnpl %eax, %ecx 518; X87-CMOV-NEXT: movl (%ecx), %eax 519; X87-CMOV-NEXT: retl 520 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 521 float %f1, float %f2, metadata !"ord", 522 metadata !"fpexcept.strict") #0 523 %res = select i1 %cond, i32 %a, i32 %b 524 ret i32 %res 525} 526 527define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 528; SSE-32-LABEL: test_f32_ueq_q: 529; SSE-32: # %bb.0: 530; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 531; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 532; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 533; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 534; SSE-32-NEXT: cmovel %eax, %ecx 535; SSE-32-NEXT: movl (%ecx), %eax 536; SSE-32-NEXT: retl 537; 538; SSE-64-LABEL: test_f32_ueq_q: 539; SSE-64: # %bb.0: 540; SSE-64-NEXT: movl %edi, %eax 541; SSE-64-NEXT: ucomiss %xmm1, %xmm0 542; SSE-64-NEXT: cmovnel %esi, %eax 543; SSE-64-NEXT: retq 544; 545; AVX-32-LABEL: test_f32_ueq_q: 546; AVX-32: # %bb.0: 547; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 548; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 549; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 550; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 551; AVX-32-NEXT: cmovel %eax, %ecx 552; AVX-32-NEXT: movl (%ecx), %eax 553; AVX-32-NEXT: retl 554; 555; AVX-64-LABEL: test_f32_ueq_q: 556; AVX-64: # %bb.0: 557; AVX-64-NEXT: movl %edi, %eax 558; AVX-64-NEXT: vucomiss %xmm1, %xmm0 559; AVX-64-NEXT: cmovnel %esi, %eax 560; AVX-64-NEXT: retq 561; 562; X87-LABEL: test_f32_ueq_q: 563; X87: # %bb.0: 564; X87-NEXT: flds {{[0-9]+}}(%esp) 565; X87-NEXT: flds {{[0-9]+}}(%esp) 566; X87-NEXT: fucompp 567; X87-NEXT: wait 568; X87-NEXT: fnstsw %ax 569; X87-NEXT: # kill: def $ah killed $ah killed $ax 570; X87-NEXT: sahf 571; X87-NEXT: je .LBB7_1 572; X87-NEXT: # %bb.2: 573; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 574; X87-NEXT: movl (%eax), %eax 575; X87-NEXT: retl 576; X87-NEXT: .LBB7_1: 577; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 578; X87-NEXT: movl (%eax), %eax 579; X87-NEXT: retl 580; 581; X87-CMOV-LABEL: test_f32_ueq_q: 582; X87-CMOV: # %bb.0: 583; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 584; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 585; X87-CMOV-NEXT: fucompi %st(1), %st 586; X87-CMOV-NEXT: fstp %st(0) 587; X87-CMOV-NEXT: wait 588; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 589; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 590; X87-CMOV-NEXT: cmovel %eax, %ecx 591; X87-CMOV-NEXT: movl (%ecx), %eax 592; X87-CMOV-NEXT: retl 593 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 594 float %f1, float %f2, metadata !"ueq", 595 metadata !"fpexcept.strict") #0 596 %res = select i1 %cond, i32 %a, i32 %b 597 ret i32 %res 598} 599 600define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 601; SSE-32-LABEL: test_f32_ugt_q: 602; SSE-32: # %bb.0: 603; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 604; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 605; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 606; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 607; SSE-32-NEXT: cmovbl %eax, %ecx 608; SSE-32-NEXT: movl (%ecx), %eax 609; SSE-32-NEXT: retl 610; 611; SSE-64-LABEL: test_f32_ugt_q: 612; SSE-64: # %bb.0: 613; SSE-64-NEXT: movl %edi, %eax 614; SSE-64-NEXT: ucomiss %xmm0, %xmm1 615; SSE-64-NEXT: cmovael %esi, %eax 616; SSE-64-NEXT: retq 617; 618; AVX-32-LABEL: test_f32_ugt_q: 619; AVX-32: # %bb.0: 620; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 621; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 622; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 623; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 624; AVX-32-NEXT: cmovbl %eax, %ecx 625; AVX-32-NEXT: movl (%ecx), %eax 626; AVX-32-NEXT: retl 627; 628; AVX-64-LABEL: test_f32_ugt_q: 629; AVX-64: # %bb.0: 630; AVX-64-NEXT: movl %edi, %eax 631; AVX-64-NEXT: vucomiss %xmm0, %xmm1 632; AVX-64-NEXT: cmovael %esi, %eax 633; AVX-64-NEXT: retq 634; 635; X87-LABEL: test_f32_ugt_q: 636; X87: # %bb.0: 637; X87-NEXT: flds {{[0-9]+}}(%esp) 638; X87-NEXT: flds {{[0-9]+}}(%esp) 639; X87-NEXT: fucompp 640; X87-NEXT: wait 641; X87-NEXT: fnstsw %ax 642; X87-NEXT: # kill: def $ah killed $ah killed $ax 643; X87-NEXT: sahf 644; X87-NEXT: jb .LBB8_1 645; X87-NEXT: # %bb.2: 646; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 647; X87-NEXT: movl (%eax), %eax 648; X87-NEXT: retl 649; X87-NEXT: .LBB8_1: 650; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 651; X87-NEXT: movl (%eax), %eax 652; X87-NEXT: retl 653; 654; X87-CMOV-LABEL: test_f32_ugt_q: 655; X87-CMOV: # %bb.0: 656; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 657; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 658; X87-CMOV-NEXT: fucompi %st(1), %st 659; X87-CMOV-NEXT: fstp %st(0) 660; X87-CMOV-NEXT: wait 661; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 662; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 663; X87-CMOV-NEXT: cmovbl %eax, %ecx 664; X87-CMOV-NEXT: movl (%ecx), %eax 665; X87-CMOV-NEXT: retl 666 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 667 float %f1, float %f2, metadata !"ugt", 668 metadata !"fpexcept.strict") #0 669 %res = select i1 %cond, i32 %a, i32 %b 670 ret i32 %res 671} 672 673define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 674; SSE-32-LABEL: test_f32_uge_q: 675; SSE-32: # %bb.0: 676; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 677; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 678; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 679; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 680; SSE-32-NEXT: cmovbel %eax, %ecx 681; SSE-32-NEXT: movl (%ecx), %eax 682; SSE-32-NEXT: retl 683; 684; SSE-64-LABEL: test_f32_uge_q: 685; SSE-64: # %bb.0: 686; SSE-64-NEXT: movl %edi, %eax 687; SSE-64-NEXT: ucomiss %xmm0, %xmm1 688; SSE-64-NEXT: cmoval %esi, %eax 689; SSE-64-NEXT: retq 690; 691; AVX-32-LABEL: test_f32_uge_q: 692; AVX-32: # %bb.0: 693; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 694; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 695; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 696; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 697; AVX-32-NEXT: cmovbel %eax, %ecx 698; AVX-32-NEXT: movl (%ecx), %eax 699; AVX-32-NEXT: retl 700; 701; AVX-64-LABEL: test_f32_uge_q: 702; AVX-64: # %bb.0: 703; AVX-64-NEXT: movl %edi, %eax 704; AVX-64-NEXT: vucomiss %xmm0, %xmm1 705; AVX-64-NEXT: cmoval %esi, %eax 706; AVX-64-NEXT: retq 707; 708; X87-LABEL: test_f32_uge_q: 709; X87: # %bb.0: 710; X87-NEXT: flds {{[0-9]+}}(%esp) 711; X87-NEXT: flds {{[0-9]+}}(%esp) 712; X87-NEXT: fucompp 713; X87-NEXT: wait 714; X87-NEXT: fnstsw %ax 715; X87-NEXT: # kill: def $ah killed $ah killed $ax 716; X87-NEXT: sahf 717; X87-NEXT: jbe .LBB9_1 718; X87-NEXT: # %bb.2: 719; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 720; X87-NEXT: movl (%eax), %eax 721; X87-NEXT: retl 722; X87-NEXT: .LBB9_1: 723; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 724; X87-NEXT: movl (%eax), %eax 725; X87-NEXT: retl 726; 727; X87-CMOV-LABEL: test_f32_uge_q: 728; X87-CMOV: # %bb.0: 729; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 730; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 731; X87-CMOV-NEXT: fucompi %st(1), %st 732; X87-CMOV-NEXT: fstp %st(0) 733; X87-CMOV-NEXT: wait 734; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 735; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 736; X87-CMOV-NEXT: cmovbel %eax, %ecx 737; X87-CMOV-NEXT: movl (%ecx), %eax 738; X87-CMOV-NEXT: retl 739 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 740 float %f1, float %f2, metadata !"uge", 741 metadata !"fpexcept.strict") #0 742 %res = select i1 %cond, i32 %a, i32 %b 743 ret i32 %res 744} 745 746define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 747; SSE-32-LABEL: test_f32_ult_q: 748; SSE-32: # %bb.0: 749; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 750; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 751; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 752; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 753; SSE-32-NEXT: cmovbl %eax, %ecx 754; SSE-32-NEXT: movl (%ecx), %eax 755; SSE-32-NEXT: retl 756; 757; SSE-64-LABEL: test_f32_ult_q: 758; SSE-64: # %bb.0: 759; SSE-64-NEXT: movl %edi, %eax 760; SSE-64-NEXT: ucomiss %xmm1, %xmm0 761; SSE-64-NEXT: cmovael %esi, %eax 762; SSE-64-NEXT: retq 763; 764; AVX-32-LABEL: test_f32_ult_q: 765; AVX-32: # %bb.0: 766; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 767; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 768; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 769; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 770; AVX-32-NEXT: cmovbl %eax, %ecx 771; AVX-32-NEXT: movl (%ecx), %eax 772; AVX-32-NEXT: retl 773; 774; AVX-64-LABEL: test_f32_ult_q: 775; AVX-64: # %bb.0: 776; AVX-64-NEXT: movl %edi, %eax 777; AVX-64-NEXT: vucomiss %xmm1, %xmm0 778; AVX-64-NEXT: cmovael %esi, %eax 779; AVX-64-NEXT: retq 780; 781; X87-LABEL: test_f32_ult_q: 782; X87: # %bb.0: 783; X87-NEXT: flds {{[0-9]+}}(%esp) 784; X87-NEXT: flds {{[0-9]+}}(%esp) 785; X87-NEXT: fucompp 786; X87-NEXT: wait 787; X87-NEXT: fnstsw %ax 788; X87-NEXT: # kill: def $ah killed $ah killed $ax 789; X87-NEXT: sahf 790; X87-NEXT: jb .LBB10_1 791; X87-NEXT: # %bb.2: 792; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 793; X87-NEXT: movl (%eax), %eax 794; X87-NEXT: retl 795; X87-NEXT: .LBB10_1: 796; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 797; X87-NEXT: movl (%eax), %eax 798; X87-NEXT: retl 799; 800; X87-CMOV-LABEL: test_f32_ult_q: 801; X87-CMOV: # %bb.0: 802; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 803; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 804; X87-CMOV-NEXT: fucompi %st(1), %st 805; X87-CMOV-NEXT: fstp %st(0) 806; X87-CMOV-NEXT: wait 807; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 808; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 809; X87-CMOV-NEXT: cmovbl %eax, %ecx 810; X87-CMOV-NEXT: movl (%ecx), %eax 811; X87-CMOV-NEXT: retl 812 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 813 float %f1, float %f2, metadata !"ult", 814 metadata !"fpexcept.strict") #0 815 %res = select i1 %cond, i32 %a, i32 %b 816 ret i32 %res 817} 818 819define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 820; SSE-32-LABEL: test_f32_ule_q: 821; SSE-32: # %bb.0: 822; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 823; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 824; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 825; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 826; SSE-32-NEXT: cmovbel %eax, %ecx 827; SSE-32-NEXT: movl (%ecx), %eax 828; SSE-32-NEXT: retl 829; 830; SSE-64-LABEL: test_f32_ule_q: 831; SSE-64: # %bb.0: 832; SSE-64-NEXT: movl %edi, %eax 833; SSE-64-NEXT: ucomiss %xmm1, %xmm0 834; SSE-64-NEXT: cmoval %esi, %eax 835; SSE-64-NEXT: retq 836; 837; AVX-32-LABEL: test_f32_ule_q: 838; AVX-32: # %bb.0: 839; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 840; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 841; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 842; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 843; AVX-32-NEXT: cmovbel %eax, %ecx 844; AVX-32-NEXT: movl (%ecx), %eax 845; AVX-32-NEXT: retl 846; 847; AVX-64-LABEL: test_f32_ule_q: 848; AVX-64: # %bb.0: 849; AVX-64-NEXT: movl %edi, %eax 850; AVX-64-NEXT: vucomiss %xmm1, %xmm0 851; AVX-64-NEXT: cmoval %esi, %eax 852; AVX-64-NEXT: retq 853; 854; X87-LABEL: test_f32_ule_q: 855; X87: # %bb.0: 856; X87-NEXT: flds {{[0-9]+}}(%esp) 857; X87-NEXT: flds {{[0-9]+}}(%esp) 858; X87-NEXT: fucompp 859; X87-NEXT: wait 860; X87-NEXT: fnstsw %ax 861; X87-NEXT: # kill: def $ah killed $ah killed $ax 862; X87-NEXT: sahf 863; X87-NEXT: jbe .LBB11_1 864; X87-NEXT: # %bb.2: 865; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 866; X87-NEXT: movl (%eax), %eax 867; X87-NEXT: retl 868; X87-NEXT: .LBB11_1: 869; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 870; X87-NEXT: movl (%eax), %eax 871; X87-NEXT: retl 872; 873; X87-CMOV-LABEL: test_f32_ule_q: 874; X87-CMOV: # %bb.0: 875; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 876; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 877; X87-CMOV-NEXT: fucompi %st(1), %st 878; X87-CMOV-NEXT: fstp %st(0) 879; X87-CMOV-NEXT: wait 880; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 881; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 882; X87-CMOV-NEXT: cmovbel %eax, %ecx 883; X87-CMOV-NEXT: movl (%ecx), %eax 884; X87-CMOV-NEXT: retl 885 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 886 float %f1, float %f2, metadata !"ule", 887 metadata !"fpexcept.strict") #0 888 %res = select i1 %cond, i32 %a, i32 %b 889 ret i32 %res 890} 891 892define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 893; SSE-32-LABEL: test_f32_une_q: 894; SSE-32: # %bb.0: 895; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 896; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 897; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 898; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 899; SSE-32-NEXT: cmovnel %eax, %ecx 900; SSE-32-NEXT: cmovpl %eax, %ecx 901; SSE-32-NEXT: movl (%ecx), %eax 902; SSE-32-NEXT: retl 903; 904; SSE-64-LABEL: test_f32_une_q: 905; SSE-64: # %bb.0: 906; SSE-64-NEXT: movl %esi, %eax 907; SSE-64-NEXT: ucomiss %xmm1, %xmm0 908; SSE-64-NEXT: cmovnel %edi, %eax 909; SSE-64-NEXT: cmovpl %edi, %eax 910; SSE-64-NEXT: retq 911; 912; AVX-32-LABEL: test_f32_une_q: 913; AVX-32: # %bb.0: 914; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 915; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 916; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 917; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 918; AVX-32-NEXT: cmovnel %eax, %ecx 919; AVX-32-NEXT: cmovpl %eax, %ecx 920; AVX-32-NEXT: movl (%ecx), %eax 921; AVX-32-NEXT: retl 922; 923; AVX-64-LABEL: test_f32_une_q: 924; AVX-64: # %bb.0: 925; AVX-64-NEXT: movl %esi, %eax 926; AVX-64-NEXT: vucomiss %xmm1, %xmm0 927; AVX-64-NEXT: cmovnel %edi, %eax 928; AVX-64-NEXT: cmovpl %edi, %eax 929; AVX-64-NEXT: retq 930; 931; X87-LABEL: test_f32_une_q: 932; X87: # %bb.0: 933; X87-NEXT: flds {{[0-9]+}}(%esp) 934; X87-NEXT: flds {{[0-9]+}}(%esp) 935; X87-NEXT: fucompp 936; X87-NEXT: wait 937; X87-NEXT: fnstsw %ax 938; X87-NEXT: # kill: def $ah killed $ah killed $ax 939; X87-NEXT: sahf 940; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 941; X87-NEXT: jne .LBB12_3 942; X87-NEXT: # %bb.1: 943; X87-NEXT: jp .LBB12_3 944; X87-NEXT: # %bb.2: 945; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 946; X87-NEXT: .LBB12_3: 947; X87-NEXT: movl (%eax), %eax 948; X87-NEXT: retl 949; 950; X87-CMOV-LABEL: test_f32_une_q: 951; X87-CMOV: # %bb.0: 952; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 953; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 954; X87-CMOV-NEXT: fucompi %st(1), %st 955; X87-CMOV-NEXT: fstp %st(0) 956; X87-CMOV-NEXT: wait 957; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 958; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 959; X87-CMOV-NEXT: cmovnel %eax, %ecx 960; X87-CMOV-NEXT: cmovpl %eax, %ecx 961; X87-CMOV-NEXT: movl (%ecx), %eax 962; X87-CMOV-NEXT: retl 963 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 964 float %f1, float %f2, metadata !"une", 965 metadata !"fpexcept.strict") #0 966 %res = select i1 %cond, i32 %a, i32 %b 967 ret i32 %res 968} 969 970define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 { 971; SSE-32-LABEL: test_f32_uno_q: 972; SSE-32: # %bb.0: 973; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 974; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 975; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 976; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 977; SSE-32-NEXT: cmovpl %eax, %ecx 978; SSE-32-NEXT: movl (%ecx), %eax 979; SSE-32-NEXT: retl 980; 981; SSE-64-LABEL: test_f32_uno_q: 982; SSE-64: # %bb.0: 983; SSE-64-NEXT: movl %edi, %eax 984; SSE-64-NEXT: ucomiss %xmm1, %xmm0 985; SSE-64-NEXT: cmovnpl %esi, %eax 986; SSE-64-NEXT: retq 987; 988; AVX-32-LABEL: test_f32_uno_q: 989; AVX-32: # %bb.0: 990; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 991; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 992; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 993; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 994; AVX-32-NEXT: cmovpl %eax, %ecx 995; AVX-32-NEXT: movl (%ecx), %eax 996; AVX-32-NEXT: retl 997; 998; AVX-64-LABEL: test_f32_uno_q: 999; AVX-64: # %bb.0: 1000; AVX-64-NEXT: movl %edi, %eax 1001; AVX-64-NEXT: vucomiss %xmm1, %xmm0 1002; AVX-64-NEXT: cmovnpl %esi, %eax 1003; AVX-64-NEXT: retq 1004; 1005; X87-LABEL: test_f32_uno_q: 1006; X87: # %bb.0: 1007; X87-NEXT: flds {{[0-9]+}}(%esp) 1008; X87-NEXT: flds {{[0-9]+}}(%esp) 1009; X87-NEXT: fucompp 1010; X87-NEXT: wait 1011; X87-NEXT: fnstsw %ax 1012; X87-NEXT: # kill: def $ah killed $ah killed $ax 1013; X87-NEXT: sahf 1014; X87-NEXT: jp .LBB13_1 1015; X87-NEXT: # %bb.2: 1016; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1017; X87-NEXT: movl (%eax), %eax 1018; X87-NEXT: retl 1019; X87-NEXT: .LBB13_1: 1020; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1021; X87-NEXT: movl (%eax), %eax 1022; X87-NEXT: retl 1023; 1024; X87-CMOV-LABEL: test_f32_uno_q: 1025; X87-CMOV: # %bb.0: 1026; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 1027; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 1028; X87-CMOV-NEXT: fucompi %st(1), %st 1029; X87-CMOV-NEXT: fstp %st(0) 1030; X87-CMOV-NEXT: wait 1031; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1032; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1033; X87-CMOV-NEXT: cmovpl %eax, %ecx 1034; X87-CMOV-NEXT: movl (%ecx), %eax 1035; X87-CMOV-NEXT: retl 1036 %cond = call i1 @llvm.experimental.constrained.fcmp.f32( 1037 float %f1, float %f2, metadata !"uno", 1038 metadata !"fpexcept.strict") #0 1039 %res = select i1 %cond, i32 %a, i32 %b 1040 ret i32 %res 1041} 1042 1043define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1044; SSE-32-LABEL: test_f64_oeq_q: 1045; SSE-32: # %bb.0: 1046; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1047; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1048; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1049; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1050; SSE-32-NEXT: cmovnel %eax, %ecx 1051; SSE-32-NEXT: cmovpl %eax, %ecx 1052; SSE-32-NEXT: movl (%ecx), %eax 1053; SSE-32-NEXT: retl 1054; 1055; SSE-64-LABEL: test_f64_oeq_q: 1056; SSE-64: # %bb.0: 1057; SSE-64-NEXT: movl %edi, %eax 1058; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1059; SSE-64-NEXT: cmovnel %esi, %eax 1060; SSE-64-NEXT: cmovpl %esi, %eax 1061; SSE-64-NEXT: retq 1062; 1063; AVX-32-LABEL: test_f64_oeq_q: 1064; AVX-32: # %bb.0: 1065; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1066; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1067; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1068; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1069; AVX-32-NEXT: cmovnel %eax, %ecx 1070; AVX-32-NEXT: cmovpl %eax, %ecx 1071; AVX-32-NEXT: movl (%ecx), %eax 1072; AVX-32-NEXT: retl 1073; 1074; AVX-64-LABEL: test_f64_oeq_q: 1075; AVX-64: # %bb.0: 1076; AVX-64-NEXT: movl %edi, %eax 1077; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1078; AVX-64-NEXT: cmovnel %esi, %eax 1079; AVX-64-NEXT: cmovpl %esi, %eax 1080; AVX-64-NEXT: retq 1081; 1082; X87-LABEL: test_f64_oeq_q: 1083; X87: # %bb.0: 1084; X87-NEXT: fldl {{[0-9]+}}(%esp) 1085; X87-NEXT: fldl {{[0-9]+}}(%esp) 1086; X87-NEXT: fucompp 1087; X87-NEXT: wait 1088; X87-NEXT: fnstsw %ax 1089; X87-NEXT: # kill: def $ah killed $ah killed $ax 1090; X87-NEXT: sahf 1091; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1092; X87-NEXT: jne .LBB14_3 1093; X87-NEXT: # %bb.1: 1094; X87-NEXT: jp .LBB14_3 1095; X87-NEXT: # %bb.2: 1096; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1097; X87-NEXT: .LBB14_3: 1098; X87-NEXT: movl (%eax), %eax 1099; X87-NEXT: retl 1100; 1101; X87-CMOV-LABEL: test_f64_oeq_q: 1102; X87-CMOV: # %bb.0: 1103; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1104; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1105; X87-CMOV-NEXT: fucompi %st(1), %st 1106; X87-CMOV-NEXT: fstp %st(0) 1107; X87-CMOV-NEXT: wait 1108; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1109; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1110; X87-CMOV-NEXT: cmovnel %eax, %ecx 1111; X87-CMOV-NEXT: cmovpl %eax, %ecx 1112; X87-CMOV-NEXT: movl (%ecx), %eax 1113; X87-CMOV-NEXT: retl 1114 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1115 double %f1, double %f2, metadata !"oeq", 1116 metadata !"fpexcept.strict") #0 1117 %res = select i1 %cond, i32 %a, i32 %b 1118 ret i32 %res 1119} 1120 1121define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1122; SSE-32-LABEL: test_f64_ogt_q: 1123; SSE-32: # %bb.0: 1124; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1125; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1126; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1127; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1128; SSE-32-NEXT: cmoval %eax, %ecx 1129; SSE-32-NEXT: movl (%ecx), %eax 1130; SSE-32-NEXT: retl 1131; 1132; SSE-64-LABEL: test_f64_ogt_q: 1133; SSE-64: # %bb.0: 1134; SSE-64-NEXT: movl %edi, %eax 1135; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1136; SSE-64-NEXT: cmovbel %esi, %eax 1137; SSE-64-NEXT: retq 1138; 1139; AVX-32-LABEL: test_f64_ogt_q: 1140; AVX-32: # %bb.0: 1141; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1142; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1143; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1144; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1145; AVX-32-NEXT: cmoval %eax, %ecx 1146; AVX-32-NEXT: movl (%ecx), %eax 1147; AVX-32-NEXT: retl 1148; 1149; AVX-64-LABEL: test_f64_ogt_q: 1150; AVX-64: # %bb.0: 1151; AVX-64-NEXT: movl %edi, %eax 1152; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1153; AVX-64-NEXT: cmovbel %esi, %eax 1154; AVX-64-NEXT: retq 1155; 1156; X87-LABEL: test_f64_ogt_q: 1157; X87: # %bb.0: 1158; X87-NEXT: fldl {{[0-9]+}}(%esp) 1159; X87-NEXT: fldl {{[0-9]+}}(%esp) 1160; X87-NEXT: fucompp 1161; X87-NEXT: wait 1162; X87-NEXT: fnstsw %ax 1163; X87-NEXT: # kill: def $ah killed $ah killed $ax 1164; X87-NEXT: sahf 1165; X87-NEXT: ja .LBB15_1 1166; X87-NEXT: # %bb.2: 1167; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1168; X87-NEXT: movl (%eax), %eax 1169; X87-NEXT: retl 1170; X87-NEXT: .LBB15_1: 1171; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1172; X87-NEXT: movl (%eax), %eax 1173; X87-NEXT: retl 1174; 1175; X87-CMOV-LABEL: test_f64_ogt_q: 1176; X87-CMOV: # %bb.0: 1177; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1178; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1179; X87-CMOV-NEXT: fucompi %st(1), %st 1180; X87-CMOV-NEXT: fstp %st(0) 1181; X87-CMOV-NEXT: wait 1182; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1183; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1184; X87-CMOV-NEXT: cmoval %eax, %ecx 1185; X87-CMOV-NEXT: movl (%ecx), %eax 1186; X87-CMOV-NEXT: retl 1187 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1188 double %f1, double %f2, metadata !"ogt", 1189 metadata !"fpexcept.strict") #0 1190 %res = select i1 %cond, i32 %a, i32 %b 1191 ret i32 %res 1192} 1193 1194define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1195; SSE-32-LABEL: test_f64_oge_q: 1196; SSE-32: # %bb.0: 1197; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1198; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1199; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1200; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1201; SSE-32-NEXT: cmovael %eax, %ecx 1202; SSE-32-NEXT: movl (%ecx), %eax 1203; SSE-32-NEXT: retl 1204; 1205; SSE-64-LABEL: test_f64_oge_q: 1206; SSE-64: # %bb.0: 1207; SSE-64-NEXT: movl %edi, %eax 1208; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1209; SSE-64-NEXT: cmovbl %esi, %eax 1210; SSE-64-NEXT: retq 1211; 1212; AVX-32-LABEL: test_f64_oge_q: 1213; AVX-32: # %bb.0: 1214; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1215; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1216; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1217; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1218; AVX-32-NEXT: cmovael %eax, %ecx 1219; AVX-32-NEXT: movl (%ecx), %eax 1220; AVX-32-NEXT: retl 1221; 1222; AVX-64-LABEL: test_f64_oge_q: 1223; AVX-64: # %bb.0: 1224; AVX-64-NEXT: movl %edi, %eax 1225; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1226; AVX-64-NEXT: cmovbl %esi, %eax 1227; AVX-64-NEXT: retq 1228; 1229; X87-LABEL: test_f64_oge_q: 1230; X87: # %bb.0: 1231; X87-NEXT: fldl {{[0-9]+}}(%esp) 1232; X87-NEXT: fldl {{[0-9]+}}(%esp) 1233; X87-NEXT: fucompp 1234; X87-NEXT: wait 1235; X87-NEXT: fnstsw %ax 1236; X87-NEXT: # kill: def $ah killed $ah killed $ax 1237; X87-NEXT: sahf 1238; X87-NEXT: jae .LBB16_1 1239; X87-NEXT: # %bb.2: 1240; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1241; X87-NEXT: movl (%eax), %eax 1242; X87-NEXT: retl 1243; X87-NEXT: .LBB16_1: 1244; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1245; X87-NEXT: movl (%eax), %eax 1246; X87-NEXT: retl 1247; 1248; X87-CMOV-LABEL: test_f64_oge_q: 1249; X87-CMOV: # %bb.0: 1250; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1251; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1252; X87-CMOV-NEXT: fucompi %st(1), %st 1253; X87-CMOV-NEXT: fstp %st(0) 1254; X87-CMOV-NEXT: wait 1255; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1256; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1257; X87-CMOV-NEXT: cmovael %eax, %ecx 1258; X87-CMOV-NEXT: movl (%ecx), %eax 1259; X87-CMOV-NEXT: retl 1260 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1261 double %f1, double %f2, metadata !"oge", 1262 metadata !"fpexcept.strict") #0 1263 %res = select i1 %cond, i32 %a, i32 %b 1264 ret i32 %res 1265} 1266 1267define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1268; SSE-32-LABEL: test_f64_olt_q: 1269; SSE-32: # %bb.0: 1270; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1271; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1272; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1273; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1274; SSE-32-NEXT: cmoval %eax, %ecx 1275; SSE-32-NEXT: movl (%ecx), %eax 1276; SSE-32-NEXT: retl 1277; 1278; SSE-64-LABEL: test_f64_olt_q: 1279; SSE-64: # %bb.0: 1280; SSE-64-NEXT: movl %edi, %eax 1281; SSE-64-NEXT: ucomisd %xmm0, %xmm1 1282; SSE-64-NEXT: cmovbel %esi, %eax 1283; SSE-64-NEXT: retq 1284; 1285; AVX-32-LABEL: test_f64_olt_q: 1286; AVX-32: # %bb.0: 1287; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1288; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1289; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1290; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1291; AVX-32-NEXT: cmoval %eax, %ecx 1292; AVX-32-NEXT: movl (%ecx), %eax 1293; AVX-32-NEXT: retl 1294; 1295; AVX-64-LABEL: test_f64_olt_q: 1296; AVX-64: # %bb.0: 1297; AVX-64-NEXT: movl %edi, %eax 1298; AVX-64-NEXT: vucomisd %xmm0, %xmm1 1299; AVX-64-NEXT: cmovbel %esi, %eax 1300; AVX-64-NEXT: retq 1301; 1302; X87-LABEL: test_f64_olt_q: 1303; X87: # %bb.0: 1304; X87-NEXT: fldl {{[0-9]+}}(%esp) 1305; X87-NEXT: fldl {{[0-9]+}}(%esp) 1306; X87-NEXT: fucompp 1307; X87-NEXT: wait 1308; X87-NEXT: fnstsw %ax 1309; X87-NEXT: # kill: def $ah killed $ah killed $ax 1310; X87-NEXT: sahf 1311; X87-NEXT: ja .LBB17_1 1312; X87-NEXT: # %bb.2: 1313; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1314; X87-NEXT: movl (%eax), %eax 1315; X87-NEXT: retl 1316; X87-NEXT: .LBB17_1: 1317; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1318; X87-NEXT: movl (%eax), %eax 1319; X87-NEXT: retl 1320; 1321; X87-CMOV-LABEL: test_f64_olt_q: 1322; X87-CMOV: # %bb.0: 1323; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1324; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1325; X87-CMOV-NEXT: fucompi %st(1), %st 1326; X87-CMOV-NEXT: fstp %st(0) 1327; X87-CMOV-NEXT: wait 1328; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1329; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1330; X87-CMOV-NEXT: cmoval %eax, %ecx 1331; X87-CMOV-NEXT: movl (%ecx), %eax 1332; X87-CMOV-NEXT: retl 1333 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1334 double %f1, double %f2, metadata !"olt", 1335 metadata !"fpexcept.strict") #0 1336 %res = select i1 %cond, i32 %a, i32 %b 1337 ret i32 %res 1338} 1339 1340define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1341; SSE-32-LABEL: test_f64_ole_q: 1342; SSE-32: # %bb.0: 1343; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1344; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1345; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1346; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1347; SSE-32-NEXT: cmovael %eax, %ecx 1348; SSE-32-NEXT: movl (%ecx), %eax 1349; SSE-32-NEXT: retl 1350; 1351; SSE-64-LABEL: test_f64_ole_q: 1352; SSE-64: # %bb.0: 1353; SSE-64-NEXT: movl %edi, %eax 1354; SSE-64-NEXT: ucomisd %xmm0, %xmm1 1355; SSE-64-NEXT: cmovbl %esi, %eax 1356; SSE-64-NEXT: retq 1357; 1358; AVX-32-LABEL: test_f64_ole_q: 1359; AVX-32: # %bb.0: 1360; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1361; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1362; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1363; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1364; AVX-32-NEXT: cmovael %eax, %ecx 1365; AVX-32-NEXT: movl (%ecx), %eax 1366; AVX-32-NEXT: retl 1367; 1368; AVX-64-LABEL: test_f64_ole_q: 1369; AVX-64: # %bb.0: 1370; AVX-64-NEXT: movl %edi, %eax 1371; AVX-64-NEXT: vucomisd %xmm0, %xmm1 1372; AVX-64-NEXT: cmovbl %esi, %eax 1373; AVX-64-NEXT: retq 1374; 1375; X87-LABEL: test_f64_ole_q: 1376; X87: # %bb.0: 1377; X87-NEXT: fldl {{[0-9]+}}(%esp) 1378; X87-NEXT: fldl {{[0-9]+}}(%esp) 1379; X87-NEXT: fucompp 1380; X87-NEXT: wait 1381; X87-NEXT: fnstsw %ax 1382; X87-NEXT: # kill: def $ah killed $ah killed $ax 1383; X87-NEXT: sahf 1384; X87-NEXT: jae .LBB18_1 1385; X87-NEXT: # %bb.2: 1386; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1387; X87-NEXT: movl (%eax), %eax 1388; X87-NEXT: retl 1389; X87-NEXT: .LBB18_1: 1390; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1391; X87-NEXT: movl (%eax), %eax 1392; X87-NEXT: retl 1393; 1394; X87-CMOV-LABEL: test_f64_ole_q: 1395; X87-CMOV: # %bb.0: 1396; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1397; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1398; X87-CMOV-NEXT: fucompi %st(1), %st 1399; X87-CMOV-NEXT: fstp %st(0) 1400; X87-CMOV-NEXT: wait 1401; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1402; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1403; X87-CMOV-NEXT: cmovael %eax, %ecx 1404; X87-CMOV-NEXT: movl (%ecx), %eax 1405; X87-CMOV-NEXT: retl 1406 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1407 double %f1, double %f2, metadata !"ole", 1408 metadata !"fpexcept.strict") #0 1409 %res = select i1 %cond, i32 %a, i32 %b 1410 ret i32 %res 1411} 1412 1413define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1414; SSE-32-LABEL: test_f64_one_q: 1415; SSE-32: # %bb.0: 1416; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1417; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1418; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1419; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1420; SSE-32-NEXT: cmovnel %eax, %ecx 1421; SSE-32-NEXT: movl (%ecx), %eax 1422; SSE-32-NEXT: retl 1423; 1424; SSE-64-LABEL: test_f64_one_q: 1425; SSE-64: # %bb.0: 1426; SSE-64-NEXT: movl %edi, %eax 1427; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1428; SSE-64-NEXT: cmovel %esi, %eax 1429; SSE-64-NEXT: retq 1430; 1431; AVX-32-LABEL: test_f64_one_q: 1432; AVX-32: # %bb.0: 1433; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1434; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1435; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1436; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1437; AVX-32-NEXT: cmovnel %eax, %ecx 1438; AVX-32-NEXT: movl (%ecx), %eax 1439; AVX-32-NEXT: retl 1440; 1441; AVX-64-LABEL: test_f64_one_q: 1442; AVX-64: # %bb.0: 1443; AVX-64-NEXT: movl %edi, %eax 1444; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1445; AVX-64-NEXT: cmovel %esi, %eax 1446; AVX-64-NEXT: retq 1447; 1448; X87-LABEL: test_f64_one_q: 1449; X87: # %bb.0: 1450; X87-NEXT: fldl {{[0-9]+}}(%esp) 1451; X87-NEXT: fldl {{[0-9]+}}(%esp) 1452; X87-NEXT: fucompp 1453; X87-NEXT: wait 1454; X87-NEXT: fnstsw %ax 1455; X87-NEXT: # kill: def $ah killed $ah killed $ax 1456; X87-NEXT: sahf 1457; X87-NEXT: jne .LBB19_1 1458; X87-NEXT: # %bb.2: 1459; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1460; X87-NEXT: movl (%eax), %eax 1461; X87-NEXT: retl 1462; X87-NEXT: .LBB19_1: 1463; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1464; X87-NEXT: movl (%eax), %eax 1465; X87-NEXT: retl 1466; 1467; X87-CMOV-LABEL: test_f64_one_q: 1468; X87-CMOV: # %bb.0: 1469; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1470; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1471; X87-CMOV-NEXT: fucompi %st(1), %st 1472; X87-CMOV-NEXT: fstp %st(0) 1473; X87-CMOV-NEXT: wait 1474; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1475; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1476; X87-CMOV-NEXT: cmovnel %eax, %ecx 1477; X87-CMOV-NEXT: movl (%ecx), %eax 1478; X87-CMOV-NEXT: retl 1479 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1480 double %f1, double %f2, metadata !"one", 1481 metadata !"fpexcept.strict") #0 1482 %res = select i1 %cond, i32 %a, i32 %b 1483 ret i32 %res 1484} 1485 1486define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1487; SSE-32-LABEL: test_f64_ord_q: 1488; SSE-32: # %bb.0: 1489; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1490; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1491; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1492; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1493; SSE-32-NEXT: cmovnpl %eax, %ecx 1494; SSE-32-NEXT: movl (%ecx), %eax 1495; SSE-32-NEXT: retl 1496; 1497; SSE-64-LABEL: test_f64_ord_q: 1498; SSE-64: # %bb.0: 1499; SSE-64-NEXT: movl %edi, %eax 1500; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1501; SSE-64-NEXT: cmovpl %esi, %eax 1502; SSE-64-NEXT: retq 1503; 1504; AVX-32-LABEL: test_f64_ord_q: 1505; AVX-32: # %bb.0: 1506; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1507; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1508; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1509; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1510; AVX-32-NEXT: cmovnpl %eax, %ecx 1511; AVX-32-NEXT: movl (%ecx), %eax 1512; AVX-32-NEXT: retl 1513; 1514; AVX-64-LABEL: test_f64_ord_q: 1515; AVX-64: # %bb.0: 1516; AVX-64-NEXT: movl %edi, %eax 1517; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1518; AVX-64-NEXT: cmovpl %esi, %eax 1519; AVX-64-NEXT: retq 1520; 1521; X87-LABEL: test_f64_ord_q: 1522; X87: # %bb.0: 1523; X87-NEXT: fldl {{[0-9]+}}(%esp) 1524; X87-NEXT: fldl {{[0-9]+}}(%esp) 1525; X87-NEXT: fucompp 1526; X87-NEXT: wait 1527; X87-NEXT: fnstsw %ax 1528; X87-NEXT: # kill: def $ah killed $ah killed $ax 1529; X87-NEXT: sahf 1530; X87-NEXT: jnp .LBB20_1 1531; X87-NEXT: # %bb.2: 1532; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1533; X87-NEXT: movl (%eax), %eax 1534; X87-NEXT: retl 1535; X87-NEXT: .LBB20_1: 1536; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1537; X87-NEXT: movl (%eax), %eax 1538; X87-NEXT: retl 1539; 1540; X87-CMOV-LABEL: test_f64_ord_q: 1541; X87-CMOV: # %bb.0: 1542; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1543; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1544; X87-CMOV-NEXT: fucompi %st(1), %st 1545; X87-CMOV-NEXT: fstp %st(0) 1546; X87-CMOV-NEXT: wait 1547; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1548; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1549; X87-CMOV-NEXT: cmovnpl %eax, %ecx 1550; X87-CMOV-NEXT: movl (%ecx), %eax 1551; X87-CMOV-NEXT: retl 1552 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1553 double %f1, double %f2, metadata !"ord", 1554 metadata !"fpexcept.strict") #0 1555 %res = select i1 %cond, i32 %a, i32 %b 1556 ret i32 %res 1557} 1558 1559define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1560; SSE-32-LABEL: test_f64_ueq_q: 1561; SSE-32: # %bb.0: 1562; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1563; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1564; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1565; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1566; SSE-32-NEXT: cmovel %eax, %ecx 1567; SSE-32-NEXT: movl (%ecx), %eax 1568; SSE-32-NEXT: retl 1569; 1570; SSE-64-LABEL: test_f64_ueq_q: 1571; SSE-64: # %bb.0: 1572; SSE-64-NEXT: movl %edi, %eax 1573; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1574; SSE-64-NEXT: cmovnel %esi, %eax 1575; SSE-64-NEXT: retq 1576; 1577; AVX-32-LABEL: test_f64_ueq_q: 1578; AVX-32: # %bb.0: 1579; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1580; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1581; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1582; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1583; AVX-32-NEXT: cmovel %eax, %ecx 1584; AVX-32-NEXT: movl (%ecx), %eax 1585; AVX-32-NEXT: retl 1586; 1587; AVX-64-LABEL: test_f64_ueq_q: 1588; AVX-64: # %bb.0: 1589; AVX-64-NEXT: movl %edi, %eax 1590; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1591; AVX-64-NEXT: cmovnel %esi, %eax 1592; AVX-64-NEXT: retq 1593; 1594; X87-LABEL: test_f64_ueq_q: 1595; X87: # %bb.0: 1596; X87-NEXT: fldl {{[0-9]+}}(%esp) 1597; X87-NEXT: fldl {{[0-9]+}}(%esp) 1598; X87-NEXT: fucompp 1599; X87-NEXT: wait 1600; X87-NEXT: fnstsw %ax 1601; X87-NEXT: # kill: def $ah killed $ah killed $ax 1602; X87-NEXT: sahf 1603; X87-NEXT: je .LBB21_1 1604; X87-NEXT: # %bb.2: 1605; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1606; X87-NEXT: movl (%eax), %eax 1607; X87-NEXT: retl 1608; X87-NEXT: .LBB21_1: 1609; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1610; X87-NEXT: movl (%eax), %eax 1611; X87-NEXT: retl 1612; 1613; X87-CMOV-LABEL: test_f64_ueq_q: 1614; X87-CMOV: # %bb.0: 1615; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1616; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1617; X87-CMOV-NEXT: fucompi %st(1), %st 1618; X87-CMOV-NEXT: fstp %st(0) 1619; X87-CMOV-NEXT: wait 1620; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1621; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1622; X87-CMOV-NEXT: cmovel %eax, %ecx 1623; X87-CMOV-NEXT: movl (%ecx), %eax 1624; X87-CMOV-NEXT: retl 1625 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1626 double %f1, double %f2, metadata !"ueq", 1627 metadata !"fpexcept.strict") #0 1628 %res = select i1 %cond, i32 %a, i32 %b 1629 ret i32 %res 1630} 1631 1632define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1633; SSE-32-LABEL: test_f64_ugt_q: 1634; SSE-32: # %bb.0: 1635; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1636; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1637; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1638; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1639; SSE-32-NEXT: cmovbl %eax, %ecx 1640; SSE-32-NEXT: movl (%ecx), %eax 1641; SSE-32-NEXT: retl 1642; 1643; SSE-64-LABEL: test_f64_ugt_q: 1644; SSE-64: # %bb.0: 1645; SSE-64-NEXT: movl %edi, %eax 1646; SSE-64-NEXT: ucomisd %xmm0, %xmm1 1647; SSE-64-NEXT: cmovael %esi, %eax 1648; SSE-64-NEXT: retq 1649; 1650; AVX-32-LABEL: test_f64_ugt_q: 1651; AVX-32: # %bb.0: 1652; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1653; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1654; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1655; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1656; AVX-32-NEXT: cmovbl %eax, %ecx 1657; AVX-32-NEXT: movl (%ecx), %eax 1658; AVX-32-NEXT: retl 1659; 1660; AVX-64-LABEL: test_f64_ugt_q: 1661; AVX-64: # %bb.0: 1662; AVX-64-NEXT: movl %edi, %eax 1663; AVX-64-NEXT: vucomisd %xmm0, %xmm1 1664; AVX-64-NEXT: cmovael %esi, %eax 1665; AVX-64-NEXT: retq 1666; 1667; X87-LABEL: test_f64_ugt_q: 1668; X87: # %bb.0: 1669; X87-NEXT: fldl {{[0-9]+}}(%esp) 1670; X87-NEXT: fldl {{[0-9]+}}(%esp) 1671; X87-NEXT: fucompp 1672; X87-NEXT: wait 1673; X87-NEXT: fnstsw %ax 1674; X87-NEXT: # kill: def $ah killed $ah killed $ax 1675; X87-NEXT: sahf 1676; X87-NEXT: jb .LBB22_1 1677; X87-NEXT: # %bb.2: 1678; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1679; X87-NEXT: movl (%eax), %eax 1680; X87-NEXT: retl 1681; X87-NEXT: .LBB22_1: 1682; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1683; X87-NEXT: movl (%eax), %eax 1684; X87-NEXT: retl 1685; 1686; X87-CMOV-LABEL: test_f64_ugt_q: 1687; X87-CMOV: # %bb.0: 1688; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1689; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1690; X87-CMOV-NEXT: fucompi %st(1), %st 1691; X87-CMOV-NEXT: fstp %st(0) 1692; X87-CMOV-NEXT: wait 1693; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1694; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1695; X87-CMOV-NEXT: cmovbl %eax, %ecx 1696; X87-CMOV-NEXT: movl (%ecx), %eax 1697; X87-CMOV-NEXT: retl 1698 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1699 double %f1, double %f2, metadata !"ugt", 1700 metadata !"fpexcept.strict") #0 1701 %res = select i1 %cond, i32 %a, i32 %b 1702 ret i32 %res 1703} 1704 1705define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1706; SSE-32-LABEL: test_f64_uge_q: 1707; SSE-32: # %bb.0: 1708; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1709; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1710; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1711; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1712; SSE-32-NEXT: cmovbel %eax, %ecx 1713; SSE-32-NEXT: movl (%ecx), %eax 1714; SSE-32-NEXT: retl 1715; 1716; SSE-64-LABEL: test_f64_uge_q: 1717; SSE-64: # %bb.0: 1718; SSE-64-NEXT: movl %edi, %eax 1719; SSE-64-NEXT: ucomisd %xmm0, %xmm1 1720; SSE-64-NEXT: cmoval %esi, %eax 1721; SSE-64-NEXT: retq 1722; 1723; AVX-32-LABEL: test_f64_uge_q: 1724; AVX-32: # %bb.0: 1725; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1726; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1727; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1728; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1729; AVX-32-NEXT: cmovbel %eax, %ecx 1730; AVX-32-NEXT: movl (%ecx), %eax 1731; AVX-32-NEXT: retl 1732; 1733; AVX-64-LABEL: test_f64_uge_q: 1734; AVX-64: # %bb.0: 1735; AVX-64-NEXT: movl %edi, %eax 1736; AVX-64-NEXT: vucomisd %xmm0, %xmm1 1737; AVX-64-NEXT: cmoval %esi, %eax 1738; AVX-64-NEXT: retq 1739; 1740; X87-LABEL: test_f64_uge_q: 1741; X87: # %bb.0: 1742; X87-NEXT: fldl {{[0-9]+}}(%esp) 1743; X87-NEXT: fldl {{[0-9]+}}(%esp) 1744; X87-NEXT: fucompp 1745; X87-NEXT: wait 1746; X87-NEXT: fnstsw %ax 1747; X87-NEXT: # kill: def $ah killed $ah killed $ax 1748; X87-NEXT: sahf 1749; X87-NEXT: jbe .LBB23_1 1750; X87-NEXT: # %bb.2: 1751; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1752; X87-NEXT: movl (%eax), %eax 1753; X87-NEXT: retl 1754; X87-NEXT: .LBB23_1: 1755; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1756; X87-NEXT: movl (%eax), %eax 1757; X87-NEXT: retl 1758; 1759; X87-CMOV-LABEL: test_f64_uge_q: 1760; X87-CMOV: # %bb.0: 1761; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1762; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1763; X87-CMOV-NEXT: fucompi %st(1), %st 1764; X87-CMOV-NEXT: fstp %st(0) 1765; X87-CMOV-NEXT: wait 1766; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1767; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1768; X87-CMOV-NEXT: cmovbel %eax, %ecx 1769; X87-CMOV-NEXT: movl (%ecx), %eax 1770; X87-CMOV-NEXT: retl 1771 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1772 double %f1, double %f2, metadata !"uge", 1773 metadata !"fpexcept.strict") #0 1774 %res = select i1 %cond, i32 %a, i32 %b 1775 ret i32 %res 1776} 1777 1778define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1779; SSE-32-LABEL: test_f64_ult_q: 1780; SSE-32: # %bb.0: 1781; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1782; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1783; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1784; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1785; SSE-32-NEXT: cmovbl %eax, %ecx 1786; SSE-32-NEXT: movl (%ecx), %eax 1787; SSE-32-NEXT: retl 1788; 1789; SSE-64-LABEL: test_f64_ult_q: 1790; SSE-64: # %bb.0: 1791; SSE-64-NEXT: movl %edi, %eax 1792; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1793; SSE-64-NEXT: cmovael %esi, %eax 1794; SSE-64-NEXT: retq 1795; 1796; AVX-32-LABEL: test_f64_ult_q: 1797; AVX-32: # %bb.0: 1798; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1799; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1800; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1801; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1802; AVX-32-NEXT: cmovbl %eax, %ecx 1803; AVX-32-NEXT: movl (%ecx), %eax 1804; AVX-32-NEXT: retl 1805; 1806; AVX-64-LABEL: test_f64_ult_q: 1807; AVX-64: # %bb.0: 1808; AVX-64-NEXT: movl %edi, %eax 1809; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1810; AVX-64-NEXT: cmovael %esi, %eax 1811; AVX-64-NEXT: retq 1812; 1813; X87-LABEL: test_f64_ult_q: 1814; X87: # %bb.0: 1815; X87-NEXT: fldl {{[0-9]+}}(%esp) 1816; X87-NEXT: fldl {{[0-9]+}}(%esp) 1817; X87-NEXT: fucompp 1818; X87-NEXT: wait 1819; X87-NEXT: fnstsw %ax 1820; X87-NEXT: # kill: def $ah killed $ah killed $ax 1821; X87-NEXT: sahf 1822; X87-NEXT: jb .LBB24_1 1823; X87-NEXT: # %bb.2: 1824; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1825; X87-NEXT: movl (%eax), %eax 1826; X87-NEXT: retl 1827; X87-NEXT: .LBB24_1: 1828; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1829; X87-NEXT: movl (%eax), %eax 1830; X87-NEXT: retl 1831; 1832; X87-CMOV-LABEL: test_f64_ult_q: 1833; X87-CMOV: # %bb.0: 1834; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1835; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1836; X87-CMOV-NEXT: fucompi %st(1), %st 1837; X87-CMOV-NEXT: fstp %st(0) 1838; X87-CMOV-NEXT: wait 1839; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1840; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1841; X87-CMOV-NEXT: cmovbl %eax, %ecx 1842; X87-CMOV-NEXT: movl (%ecx), %eax 1843; X87-CMOV-NEXT: retl 1844 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1845 double %f1, double %f2, metadata !"ult", 1846 metadata !"fpexcept.strict") #0 1847 %res = select i1 %cond, i32 %a, i32 %b 1848 ret i32 %res 1849} 1850 1851define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1852; SSE-32-LABEL: test_f64_ule_q: 1853; SSE-32: # %bb.0: 1854; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1855; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1856; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1857; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1858; SSE-32-NEXT: cmovbel %eax, %ecx 1859; SSE-32-NEXT: movl (%ecx), %eax 1860; SSE-32-NEXT: retl 1861; 1862; SSE-64-LABEL: test_f64_ule_q: 1863; SSE-64: # %bb.0: 1864; SSE-64-NEXT: movl %edi, %eax 1865; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1866; SSE-64-NEXT: cmoval %esi, %eax 1867; SSE-64-NEXT: retq 1868; 1869; AVX-32-LABEL: test_f64_ule_q: 1870; AVX-32: # %bb.0: 1871; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1872; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1873; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1874; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1875; AVX-32-NEXT: cmovbel %eax, %ecx 1876; AVX-32-NEXT: movl (%ecx), %eax 1877; AVX-32-NEXT: retl 1878; 1879; AVX-64-LABEL: test_f64_ule_q: 1880; AVX-64: # %bb.0: 1881; AVX-64-NEXT: movl %edi, %eax 1882; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1883; AVX-64-NEXT: cmoval %esi, %eax 1884; AVX-64-NEXT: retq 1885; 1886; X87-LABEL: test_f64_ule_q: 1887; X87: # %bb.0: 1888; X87-NEXT: fldl {{[0-9]+}}(%esp) 1889; X87-NEXT: fldl {{[0-9]+}}(%esp) 1890; X87-NEXT: fucompp 1891; X87-NEXT: wait 1892; X87-NEXT: fnstsw %ax 1893; X87-NEXT: # kill: def $ah killed $ah killed $ax 1894; X87-NEXT: sahf 1895; X87-NEXT: jbe .LBB25_1 1896; X87-NEXT: # %bb.2: 1897; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1898; X87-NEXT: movl (%eax), %eax 1899; X87-NEXT: retl 1900; X87-NEXT: .LBB25_1: 1901; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1902; X87-NEXT: movl (%eax), %eax 1903; X87-NEXT: retl 1904; 1905; X87-CMOV-LABEL: test_f64_ule_q: 1906; X87-CMOV: # %bb.0: 1907; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1908; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1909; X87-CMOV-NEXT: fucompi %st(1), %st 1910; X87-CMOV-NEXT: fstp %st(0) 1911; X87-CMOV-NEXT: wait 1912; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1913; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1914; X87-CMOV-NEXT: cmovbel %eax, %ecx 1915; X87-CMOV-NEXT: movl (%ecx), %eax 1916; X87-CMOV-NEXT: retl 1917 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1918 double %f1, double %f2, metadata !"ule", 1919 metadata !"fpexcept.strict") #0 1920 %res = select i1 %cond, i32 %a, i32 %b 1921 ret i32 %res 1922} 1923 1924define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 1925; SSE-32-LABEL: test_f64_une_q: 1926; SSE-32: # %bb.0: 1927; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1928; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 1929; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1930; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1931; SSE-32-NEXT: cmovnel %eax, %ecx 1932; SSE-32-NEXT: cmovpl %eax, %ecx 1933; SSE-32-NEXT: movl (%ecx), %eax 1934; SSE-32-NEXT: retl 1935; 1936; SSE-64-LABEL: test_f64_une_q: 1937; SSE-64: # %bb.0: 1938; SSE-64-NEXT: movl %esi, %eax 1939; SSE-64-NEXT: ucomisd %xmm1, %xmm0 1940; SSE-64-NEXT: cmovnel %edi, %eax 1941; SSE-64-NEXT: cmovpl %edi, %eax 1942; SSE-64-NEXT: retq 1943; 1944; AVX-32-LABEL: test_f64_une_q: 1945; AVX-32: # %bb.0: 1946; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1947; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 1948; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 1949; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 1950; AVX-32-NEXT: cmovnel %eax, %ecx 1951; AVX-32-NEXT: cmovpl %eax, %ecx 1952; AVX-32-NEXT: movl (%ecx), %eax 1953; AVX-32-NEXT: retl 1954; 1955; AVX-64-LABEL: test_f64_une_q: 1956; AVX-64: # %bb.0: 1957; AVX-64-NEXT: movl %esi, %eax 1958; AVX-64-NEXT: vucomisd %xmm1, %xmm0 1959; AVX-64-NEXT: cmovnel %edi, %eax 1960; AVX-64-NEXT: cmovpl %edi, %eax 1961; AVX-64-NEXT: retq 1962; 1963; X87-LABEL: test_f64_une_q: 1964; X87: # %bb.0: 1965; X87-NEXT: fldl {{[0-9]+}}(%esp) 1966; X87-NEXT: fldl {{[0-9]+}}(%esp) 1967; X87-NEXT: fucompp 1968; X87-NEXT: wait 1969; X87-NEXT: fnstsw %ax 1970; X87-NEXT: # kill: def $ah killed $ah killed $ax 1971; X87-NEXT: sahf 1972; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1973; X87-NEXT: jne .LBB26_3 1974; X87-NEXT: # %bb.1: 1975; X87-NEXT: jp .LBB26_3 1976; X87-NEXT: # %bb.2: 1977; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 1978; X87-NEXT: .LBB26_3: 1979; X87-NEXT: movl (%eax), %eax 1980; X87-NEXT: retl 1981; 1982; X87-CMOV-LABEL: test_f64_une_q: 1983; X87-CMOV: # %bb.0: 1984; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1985; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 1986; X87-CMOV-NEXT: fucompi %st(1), %st 1987; X87-CMOV-NEXT: fstp %st(0) 1988; X87-CMOV-NEXT: wait 1989; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 1990; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 1991; X87-CMOV-NEXT: cmovnel %eax, %ecx 1992; X87-CMOV-NEXT: cmovpl %eax, %ecx 1993; X87-CMOV-NEXT: movl (%ecx), %eax 1994; X87-CMOV-NEXT: retl 1995 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 1996 double %f1, double %f2, metadata !"une", 1997 metadata !"fpexcept.strict") #0 1998 %res = select i1 %cond, i32 %a, i32 %b 1999 ret i32 %res 2000} 2001 2002define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 { 2003; SSE-32-LABEL: test_f64_uno_q: 2004; SSE-32: # %bb.0: 2005; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 2006; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0 2007; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2008; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2009; SSE-32-NEXT: cmovpl %eax, %ecx 2010; SSE-32-NEXT: movl (%ecx), %eax 2011; SSE-32-NEXT: retl 2012; 2013; SSE-64-LABEL: test_f64_uno_q: 2014; SSE-64: # %bb.0: 2015; SSE-64-NEXT: movl %edi, %eax 2016; SSE-64-NEXT: ucomisd %xmm1, %xmm0 2017; SSE-64-NEXT: cmovnpl %esi, %eax 2018; SSE-64-NEXT: retq 2019; 2020; AVX-32-LABEL: test_f64_uno_q: 2021; AVX-32: # %bb.0: 2022; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 2023; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0 2024; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2025; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2026; AVX-32-NEXT: cmovpl %eax, %ecx 2027; AVX-32-NEXT: movl (%ecx), %eax 2028; AVX-32-NEXT: retl 2029; 2030; AVX-64-LABEL: test_f64_uno_q: 2031; AVX-64: # %bb.0: 2032; AVX-64-NEXT: movl %edi, %eax 2033; AVX-64-NEXT: vucomisd %xmm1, %xmm0 2034; AVX-64-NEXT: cmovnpl %esi, %eax 2035; AVX-64-NEXT: retq 2036; 2037; X87-LABEL: test_f64_uno_q: 2038; X87: # %bb.0: 2039; X87-NEXT: fldl {{[0-9]+}}(%esp) 2040; X87-NEXT: fldl {{[0-9]+}}(%esp) 2041; X87-NEXT: fucompp 2042; X87-NEXT: wait 2043; X87-NEXT: fnstsw %ax 2044; X87-NEXT: # kill: def $ah killed $ah killed $ax 2045; X87-NEXT: sahf 2046; X87-NEXT: jp .LBB27_1 2047; X87-NEXT: # %bb.2: 2048; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2049; X87-NEXT: movl (%eax), %eax 2050; X87-NEXT: retl 2051; X87-NEXT: .LBB27_1: 2052; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2053; X87-NEXT: movl (%eax), %eax 2054; X87-NEXT: retl 2055; 2056; X87-CMOV-LABEL: test_f64_uno_q: 2057; X87-CMOV: # %bb.0: 2058; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 2059; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 2060; X87-CMOV-NEXT: fucompi %st(1), %st 2061; X87-CMOV-NEXT: fstp %st(0) 2062; X87-CMOV-NEXT: wait 2063; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2064; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2065; X87-CMOV-NEXT: cmovpl %eax, %ecx 2066; X87-CMOV-NEXT: movl (%ecx), %eax 2067; X87-CMOV-NEXT: retl 2068 %cond = call i1 @llvm.experimental.constrained.fcmp.f64( 2069 double %f1, double %f2, metadata !"uno", 2070 metadata !"fpexcept.strict") #0 2071 %res = select i1 %cond, i32 %a, i32 %b 2072 ret i32 %res 2073} 2074 2075define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2076; SSE-32-LABEL: test_f32_oeq_s: 2077; SSE-32: # %bb.0: 2078; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2079; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2080; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2081; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2082; SSE-32-NEXT: cmovnel %eax, %ecx 2083; SSE-32-NEXT: cmovpl %eax, %ecx 2084; SSE-32-NEXT: movl (%ecx), %eax 2085; SSE-32-NEXT: retl 2086; 2087; SSE-64-LABEL: test_f32_oeq_s: 2088; SSE-64: # %bb.0: 2089; SSE-64-NEXT: movl %edi, %eax 2090; SSE-64-NEXT: comiss %xmm1, %xmm0 2091; SSE-64-NEXT: cmovnel %esi, %eax 2092; SSE-64-NEXT: cmovpl %esi, %eax 2093; SSE-64-NEXT: retq 2094; 2095; AVX-32-LABEL: test_f32_oeq_s: 2096; AVX-32: # %bb.0: 2097; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2098; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2099; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2100; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2101; AVX-32-NEXT: cmovnel %eax, %ecx 2102; AVX-32-NEXT: cmovpl %eax, %ecx 2103; AVX-32-NEXT: movl (%ecx), %eax 2104; AVX-32-NEXT: retl 2105; 2106; AVX-64-LABEL: test_f32_oeq_s: 2107; AVX-64: # %bb.0: 2108; AVX-64-NEXT: movl %edi, %eax 2109; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2110; AVX-64-NEXT: cmovnel %esi, %eax 2111; AVX-64-NEXT: cmovpl %esi, %eax 2112; AVX-64-NEXT: retq 2113; 2114; X87-LABEL: test_f32_oeq_s: 2115; X87: # %bb.0: 2116; X87-NEXT: flds {{[0-9]+}}(%esp) 2117; X87-NEXT: flds {{[0-9]+}}(%esp) 2118; X87-NEXT: fcompp 2119; X87-NEXT: wait 2120; X87-NEXT: fnstsw %ax 2121; X87-NEXT: # kill: def $ah killed $ah killed $ax 2122; X87-NEXT: sahf 2123; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2124; X87-NEXT: jne .LBB28_3 2125; X87-NEXT: # %bb.1: 2126; X87-NEXT: jp .LBB28_3 2127; X87-NEXT: # %bb.2: 2128; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2129; X87-NEXT: .LBB28_3: 2130; X87-NEXT: movl (%eax), %eax 2131; X87-NEXT: retl 2132; 2133; X87-CMOV-LABEL: test_f32_oeq_s: 2134; X87-CMOV: # %bb.0: 2135; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2136; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2137; X87-CMOV-NEXT: fcompi %st(1), %st 2138; X87-CMOV-NEXT: fstp %st(0) 2139; X87-CMOV-NEXT: wait 2140; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2141; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2142; X87-CMOV-NEXT: cmovnel %eax, %ecx 2143; X87-CMOV-NEXT: cmovpl %eax, %ecx 2144; X87-CMOV-NEXT: movl (%ecx), %eax 2145; X87-CMOV-NEXT: retl 2146 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2147 float %f1, float %f2, metadata !"oeq", 2148 metadata !"fpexcept.strict") #0 2149 %res = select i1 %cond, i32 %a, i32 %b 2150 ret i32 %res 2151} 2152 2153define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2154; SSE-32-LABEL: test_f32_ogt_s: 2155; SSE-32: # %bb.0: 2156; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2157; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2158; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2159; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2160; SSE-32-NEXT: cmoval %eax, %ecx 2161; SSE-32-NEXT: movl (%ecx), %eax 2162; SSE-32-NEXT: retl 2163; 2164; SSE-64-LABEL: test_f32_ogt_s: 2165; SSE-64: # %bb.0: 2166; SSE-64-NEXT: movl %edi, %eax 2167; SSE-64-NEXT: comiss %xmm1, %xmm0 2168; SSE-64-NEXT: cmovbel %esi, %eax 2169; SSE-64-NEXT: retq 2170; 2171; AVX-32-LABEL: test_f32_ogt_s: 2172; AVX-32: # %bb.0: 2173; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2174; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2175; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2176; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2177; AVX-32-NEXT: cmoval %eax, %ecx 2178; AVX-32-NEXT: movl (%ecx), %eax 2179; AVX-32-NEXT: retl 2180; 2181; AVX-64-LABEL: test_f32_ogt_s: 2182; AVX-64: # %bb.0: 2183; AVX-64-NEXT: movl %edi, %eax 2184; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2185; AVX-64-NEXT: cmovbel %esi, %eax 2186; AVX-64-NEXT: retq 2187; 2188; X87-LABEL: test_f32_ogt_s: 2189; X87: # %bb.0: 2190; X87-NEXT: flds {{[0-9]+}}(%esp) 2191; X87-NEXT: flds {{[0-9]+}}(%esp) 2192; X87-NEXT: fcompp 2193; X87-NEXT: wait 2194; X87-NEXT: fnstsw %ax 2195; X87-NEXT: # kill: def $ah killed $ah killed $ax 2196; X87-NEXT: sahf 2197; X87-NEXT: ja .LBB29_1 2198; X87-NEXT: # %bb.2: 2199; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2200; X87-NEXT: movl (%eax), %eax 2201; X87-NEXT: retl 2202; X87-NEXT: .LBB29_1: 2203; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2204; X87-NEXT: movl (%eax), %eax 2205; X87-NEXT: retl 2206; 2207; X87-CMOV-LABEL: test_f32_ogt_s: 2208; X87-CMOV: # %bb.0: 2209; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2210; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2211; X87-CMOV-NEXT: fcompi %st(1), %st 2212; X87-CMOV-NEXT: fstp %st(0) 2213; X87-CMOV-NEXT: wait 2214; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2215; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2216; X87-CMOV-NEXT: cmoval %eax, %ecx 2217; X87-CMOV-NEXT: movl (%ecx), %eax 2218; X87-CMOV-NEXT: retl 2219 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2220 float %f1, float %f2, metadata !"ogt", 2221 metadata !"fpexcept.strict") #0 2222 %res = select i1 %cond, i32 %a, i32 %b 2223 ret i32 %res 2224} 2225 2226define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2227; SSE-32-LABEL: test_f32_oge_s: 2228; SSE-32: # %bb.0: 2229; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2230; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2231; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2232; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2233; SSE-32-NEXT: cmovael %eax, %ecx 2234; SSE-32-NEXT: movl (%ecx), %eax 2235; SSE-32-NEXT: retl 2236; 2237; SSE-64-LABEL: test_f32_oge_s: 2238; SSE-64: # %bb.0: 2239; SSE-64-NEXT: movl %edi, %eax 2240; SSE-64-NEXT: comiss %xmm1, %xmm0 2241; SSE-64-NEXT: cmovbl %esi, %eax 2242; SSE-64-NEXT: retq 2243; 2244; AVX-32-LABEL: test_f32_oge_s: 2245; AVX-32: # %bb.0: 2246; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2247; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2248; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2249; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2250; AVX-32-NEXT: cmovael %eax, %ecx 2251; AVX-32-NEXT: movl (%ecx), %eax 2252; AVX-32-NEXT: retl 2253; 2254; AVX-64-LABEL: test_f32_oge_s: 2255; AVX-64: # %bb.0: 2256; AVX-64-NEXT: movl %edi, %eax 2257; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2258; AVX-64-NEXT: cmovbl %esi, %eax 2259; AVX-64-NEXT: retq 2260; 2261; X87-LABEL: test_f32_oge_s: 2262; X87: # %bb.0: 2263; X87-NEXT: flds {{[0-9]+}}(%esp) 2264; X87-NEXT: flds {{[0-9]+}}(%esp) 2265; X87-NEXT: fcompp 2266; X87-NEXT: wait 2267; X87-NEXT: fnstsw %ax 2268; X87-NEXT: # kill: def $ah killed $ah killed $ax 2269; X87-NEXT: sahf 2270; X87-NEXT: jae .LBB30_1 2271; X87-NEXT: # %bb.2: 2272; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2273; X87-NEXT: movl (%eax), %eax 2274; X87-NEXT: retl 2275; X87-NEXT: .LBB30_1: 2276; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2277; X87-NEXT: movl (%eax), %eax 2278; X87-NEXT: retl 2279; 2280; X87-CMOV-LABEL: test_f32_oge_s: 2281; X87-CMOV: # %bb.0: 2282; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2283; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2284; X87-CMOV-NEXT: fcompi %st(1), %st 2285; X87-CMOV-NEXT: fstp %st(0) 2286; X87-CMOV-NEXT: wait 2287; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2288; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2289; X87-CMOV-NEXT: cmovael %eax, %ecx 2290; X87-CMOV-NEXT: movl (%ecx), %eax 2291; X87-CMOV-NEXT: retl 2292 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2293 float %f1, float %f2, metadata !"oge", 2294 metadata !"fpexcept.strict") #0 2295 %res = select i1 %cond, i32 %a, i32 %b 2296 ret i32 %res 2297} 2298 2299define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2300; SSE-32-LABEL: test_f32_olt_s: 2301; SSE-32: # %bb.0: 2302; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2303; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2304; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2305; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2306; SSE-32-NEXT: cmoval %eax, %ecx 2307; SSE-32-NEXT: movl (%ecx), %eax 2308; SSE-32-NEXT: retl 2309; 2310; SSE-64-LABEL: test_f32_olt_s: 2311; SSE-64: # %bb.0: 2312; SSE-64-NEXT: movl %edi, %eax 2313; SSE-64-NEXT: comiss %xmm0, %xmm1 2314; SSE-64-NEXT: cmovbel %esi, %eax 2315; SSE-64-NEXT: retq 2316; 2317; AVX-32-LABEL: test_f32_olt_s: 2318; AVX-32: # %bb.0: 2319; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2320; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2321; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2322; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2323; AVX-32-NEXT: cmoval %eax, %ecx 2324; AVX-32-NEXT: movl (%ecx), %eax 2325; AVX-32-NEXT: retl 2326; 2327; AVX-64-LABEL: test_f32_olt_s: 2328; AVX-64: # %bb.0: 2329; AVX-64-NEXT: movl %edi, %eax 2330; AVX-64-NEXT: vcomiss %xmm0, %xmm1 2331; AVX-64-NEXT: cmovbel %esi, %eax 2332; AVX-64-NEXT: retq 2333; 2334; X87-LABEL: test_f32_olt_s: 2335; X87: # %bb.0: 2336; X87-NEXT: flds {{[0-9]+}}(%esp) 2337; X87-NEXT: flds {{[0-9]+}}(%esp) 2338; X87-NEXT: fcompp 2339; X87-NEXT: wait 2340; X87-NEXT: fnstsw %ax 2341; X87-NEXT: # kill: def $ah killed $ah killed $ax 2342; X87-NEXT: sahf 2343; X87-NEXT: ja .LBB31_1 2344; X87-NEXT: # %bb.2: 2345; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2346; X87-NEXT: movl (%eax), %eax 2347; X87-NEXT: retl 2348; X87-NEXT: .LBB31_1: 2349; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2350; X87-NEXT: movl (%eax), %eax 2351; X87-NEXT: retl 2352; 2353; X87-CMOV-LABEL: test_f32_olt_s: 2354; X87-CMOV: # %bb.0: 2355; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2356; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2357; X87-CMOV-NEXT: fcompi %st(1), %st 2358; X87-CMOV-NEXT: fstp %st(0) 2359; X87-CMOV-NEXT: wait 2360; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2361; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2362; X87-CMOV-NEXT: cmoval %eax, %ecx 2363; X87-CMOV-NEXT: movl (%ecx), %eax 2364; X87-CMOV-NEXT: retl 2365 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2366 float %f1, float %f2, metadata !"olt", 2367 metadata !"fpexcept.strict") #0 2368 %res = select i1 %cond, i32 %a, i32 %b 2369 ret i32 %res 2370} 2371 2372define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2373; SSE-32-LABEL: test_f32_ole_s: 2374; SSE-32: # %bb.0: 2375; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2376; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2377; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2378; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2379; SSE-32-NEXT: cmovael %eax, %ecx 2380; SSE-32-NEXT: movl (%ecx), %eax 2381; SSE-32-NEXT: retl 2382; 2383; SSE-64-LABEL: test_f32_ole_s: 2384; SSE-64: # %bb.0: 2385; SSE-64-NEXT: movl %edi, %eax 2386; SSE-64-NEXT: comiss %xmm0, %xmm1 2387; SSE-64-NEXT: cmovbl %esi, %eax 2388; SSE-64-NEXT: retq 2389; 2390; AVX-32-LABEL: test_f32_ole_s: 2391; AVX-32: # %bb.0: 2392; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2393; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2394; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2395; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2396; AVX-32-NEXT: cmovael %eax, %ecx 2397; AVX-32-NEXT: movl (%ecx), %eax 2398; AVX-32-NEXT: retl 2399; 2400; AVX-64-LABEL: test_f32_ole_s: 2401; AVX-64: # %bb.0: 2402; AVX-64-NEXT: movl %edi, %eax 2403; AVX-64-NEXT: vcomiss %xmm0, %xmm1 2404; AVX-64-NEXT: cmovbl %esi, %eax 2405; AVX-64-NEXT: retq 2406; 2407; X87-LABEL: test_f32_ole_s: 2408; X87: # %bb.0: 2409; X87-NEXT: flds {{[0-9]+}}(%esp) 2410; X87-NEXT: flds {{[0-9]+}}(%esp) 2411; X87-NEXT: fcompp 2412; X87-NEXT: wait 2413; X87-NEXT: fnstsw %ax 2414; X87-NEXT: # kill: def $ah killed $ah killed $ax 2415; X87-NEXT: sahf 2416; X87-NEXT: jae .LBB32_1 2417; X87-NEXT: # %bb.2: 2418; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2419; X87-NEXT: movl (%eax), %eax 2420; X87-NEXT: retl 2421; X87-NEXT: .LBB32_1: 2422; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2423; X87-NEXT: movl (%eax), %eax 2424; X87-NEXT: retl 2425; 2426; X87-CMOV-LABEL: test_f32_ole_s: 2427; X87-CMOV: # %bb.0: 2428; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2429; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2430; X87-CMOV-NEXT: fcompi %st(1), %st 2431; X87-CMOV-NEXT: fstp %st(0) 2432; X87-CMOV-NEXT: wait 2433; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2434; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2435; X87-CMOV-NEXT: cmovael %eax, %ecx 2436; X87-CMOV-NEXT: movl (%ecx), %eax 2437; X87-CMOV-NEXT: retl 2438 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2439 float %f1, float %f2, metadata !"ole", 2440 metadata !"fpexcept.strict") #0 2441 %res = select i1 %cond, i32 %a, i32 %b 2442 ret i32 %res 2443} 2444 2445define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2446; SSE-32-LABEL: test_f32_one_s: 2447; SSE-32: # %bb.0: 2448; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2449; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2450; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2451; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2452; SSE-32-NEXT: cmovnel %eax, %ecx 2453; SSE-32-NEXT: movl (%ecx), %eax 2454; SSE-32-NEXT: retl 2455; 2456; SSE-64-LABEL: test_f32_one_s: 2457; SSE-64: # %bb.0: 2458; SSE-64-NEXT: movl %edi, %eax 2459; SSE-64-NEXT: comiss %xmm1, %xmm0 2460; SSE-64-NEXT: cmovel %esi, %eax 2461; SSE-64-NEXT: retq 2462; 2463; AVX-32-LABEL: test_f32_one_s: 2464; AVX-32: # %bb.0: 2465; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2466; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2467; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2468; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2469; AVX-32-NEXT: cmovnel %eax, %ecx 2470; AVX-32-NEXT: movl (%ecx), %eax 2471; AVX-32-NEXT: retl 2472; 2473; AVX-64-LABEL: test_f32_one_s: 2474; AVX-64: # %bb.0: 2475; AVX-64-NEXT: movl %edi, %eax 2476; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2477; AVX-64-NEXT: cmovel %esi, %eax 2478; AVX-64-NEXT: retq 2479; 2480; X87-LABEL: test_f32_one_s: 2481; X87: # %bb.0: 2482; X87-NEXT: flds {{[0-9]+}}(%esp) 2483; X87-NEXT: flds {{[0-9]+}}(%esp) 2484; X87-NEXT: fcompp 2485; X87-NEXT: wait 2486; X87-NEXT: fnstsw %ax 2487; X87-NEXT: # kill: def $ah killed $ah killed $ax 2488; X87-NEXT: sahf 2489; X87-NEXT: jne .LBB33_1 2490; X87-NEXT: # %bb.2: 2491; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2492; X87-NEXT: movl (%eax), %eax 2493; X87-NEXT: retl 2494; X87-NEXT: .LBB33_1: 2495; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2496; X87-NEXT: movl (%eax), %eax 2497; X87-NEXT: retl 2498; 2499; X87-CMOV-LABEL: test_f32_one_s: 2500; X87-CMOV: # %bb.0: 2501; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2502; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2503; X87-CMOV-NEXT: fcompi %st(1), %st 2504; X87-CMOV-NEXT: fstp %st(0) 2505; X87-CMOV-NEXT: wait 2506; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2507; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2508; X87-CMOV-NEXT: cmovnel %eax, %ecx 2509; X87-CMOV-NEXT: movl (%ecx), %eax 2510; X87-CMOV-NEXT: retl 2511 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2512 float %f1, float %f2, metadata !"one", 2513 metadata !"fpexcept.strict") #0 2514 %res = select i1 %cond, i32 %a, i32 %b 2515 ret i32 %res 2516} 2517 2518define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2519; SSE-32-LABEL: test_f32_ord_s: 2520; SSE-32: # %bb.0: 2521; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2522; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2523; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2524; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2525; SSE-32-NEXT: cmovnpl %eax, %ecx 2526; SSE-32-NEXT: movl (%ecx), %eax 2527; SSE-32-NEXT: retl 2528; 2529; SSE-64-LABEL: test_f32_ord_s: 2530; SSE-64: # %bb.0: 2531; SSE-64-NEXT: movl %edi, %eax 2532; SSE-64-NEXT: comiss %xmm1, %xmm0 2533; SSE-64-NEXT: cmovpl %esi, %eax 2534; SSE-64-NEXT: retq 2535; 2536; AVX-32-LABEL: test_f32_ord_s: 2537; AVX-32: # %bb.0: 2538; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2539; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2540; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2541; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2542; AVX-32-NEXT: cmovnpl %eax, %ecx 2543; AVX-32-NEXT: movl (%ecx), %eax 2544; AVX-32-NEXT: retl 2545; 2546; AVX-64-LABEL: test_f32_ord_s: 2547; AVX-64: # %bb.0: 2548; AVX-64-NEXT: movl %edi, %eax 2549; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2550; AVX-64-NEXT: cmovpl %esi, %eax 2551; AVX-64-NEXT: retq 2552; 2553; X87-LABEL: test_f32_ord_s: 2554; X87: # %bb.0: 2555; X87-NEXT: flds {{[0-9]+}}(%esp) 2556; X87-NEXT: flds {{[0-9]+}}(%esp) 2557; X87-NEXT: fcompp 2558; X87-NEXT: wait 2559; X87-NEXT: fnstsw %ax 2560; X87-NEXT: # kill: def $ah killed $ah killed $ax 2561; X87-NEXT: sahf 2562; X87-NEXT: jnp .LBB34_1 2563; X87-NEXT: # %bb.2: 2564; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2565; X87-NEXT: movl (%eax), %eax 2566; X87-NEXT: retl 2567; X87-NEXT: .LBB34_1: 2568; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2569; X87-NEXT: movl (%eax), %eax 2570; X87-NEXT: retl 2571; 2572; X87-CMOV-LABEL: test_f32_ord_s: 2573; X87-CMOV: # %bb.0: 2574; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2575; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2576; X87-CMOV-NEXT: fcompi %st(1), %st 2577; X87-CMOV-NEXT: fstp %st(0) 2578; X87-CMOV-NEXT: wait 2579; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2580; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2581; X87-CMOV-NEXT: cmovnpl %eax, %ecx 2582; X87-CMOV-NEXT: movl (%ecx), %eax 2583; X87-CMOV-NEXT: retl 2584 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2585 float %f1, float %f2, metadata !"ord", 2586 metadata !"fpexcept.strict") #0 2587 %res = select i1 %cond, i32 %a, i32 %b 2588 ret i32 %res 2589} 2590 2591define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2592; SSE-32-LABEL: test_f32_ueq_s: 2593; SSE-32: # %bb.0: 2594; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2595; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2596; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2597; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2598; SSE-32-NEXT: cmovel %eax, %ecx 2599; SSE-32-NEXT: movl (%ecx), %eax 2600; SSE-32-NEXT: retl 2601; 2602; SSE-64-LABEL: test_f32_ueq_s: 2603; SSE-64: # %bb.0: 2604; SSE-64-NEXT: movl %edi, %eax 2605; SSE-64-NEXT: comiss %xmm1, %xmm0 2606; SSE-64-NEXT: cmovnel %esi, %eax 2607; SSE-64-NEXT: retq 2608; 2609; AVX-32-LABEL: test_f32_ueq_s: 2610; AVX-32: # %bb.0: 2611; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2612; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2613; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2614; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2615; AVX-32-NEXT: cmovel %eax, %ecx 2616; AVX-32-NEXT: movl (%ecx), %eax 2617; AVX-32-NEXT: retl 2618; 2619; AVX-64-LABEL: test_f32_ueq_s: 2620; AVX-64: # %bb.0: 2621; AVX-64-NEXT: movl %edi, %eax 2622; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2623; AVX-64-NEXT: cmovnel %esi, %eax 2624; AVX-64-NEXT: retq 2625; 2626; X87-LABEL: test_f32_ueq_s: 2627; X87: # %bb.0: 2628; X87-NEXT: flds {{[0-9]+}}(%esp) 2629; X87-NEXT: flds {{[0-9]+}}(%esp) 2630; X87-NEXT: fcompp 2631; X87-NEXT: wait 2632; X87-NEXT: fnstsw %ax 2633; X87-NEXT: # kill: def $ah killed $ah killed $ax 2634; X87-NEXT: sahf 2635; X87-NEXT: je .LBB35_1 2636; X87-NEXT: # %bb.2: 2637; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2638; X87-NEXT: movl (%eax), %eax 2639; X87-NEXT: retl 2640; X87-NEXT: .LBB35_1: 2641; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2642; X87-NEXT: movl (%eax), %eax 2643; X87-NEXT: retl 2644; 2645; X87-CMOV-LABEL: test_f32_ueq_s: 2646; X87-CMOV: # %bb.0: 2647; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2648; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2649; X87-CMOV-NEXT: fcompi %st(1), %st 2650; X87-CMOV-NEXT: fstp %st(0) 2651; X87-CMOV-NEXT: wait 2652; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2653; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2654; X87-CMOV-NEXT: cmovel %eax, %ecx 2655; X87-CMOV-NEXT: movl (%ecx), %eax 2656; X87-CMOV-NEXT: retl 2657 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2658 float %f1, float %f2, metadata !"ueq", 2659 metadata !"fpexcept.strict") #0 2660 %res = select i1 %cond, i32 %a, i32 %b 2661 ret i32 %res 2662} 2663 2664define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2665; SSE-32-LABEL: test_f32_ugt_s: 2666; SSE-32: # %bb.0: 2667; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2668; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2669; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2670; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2671; SSE-32-NEXT: cmovbl %eax, %ecx 2672; SSE-32-NEXT: movl (%ecx), %eax 2673; SSE-32-NEXT: retl 2674; 2675; SSE-64-LABEL: test_f32_ugt_s: 2676; SSE-64: # %bb.0: 2677; SSE-64-NEXT: movl %edi, %eax 2678; SSE-64-NEXT: comiss %xmm0, %xmm1 2679; SSE-64-NEXT: cmovael %esi, %eax 2680; SSE-64-NEXT: retq 2681; 2682; AVX-32-LABEL: test_f32_ugt_s: 2683; AVX-32: # %bb.0: 2684; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2685; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2686; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2687; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2688; AVX-32-NEXT: cmovbl %eax, %ecx 2689; AVX-32-NEXT: movl (%ecx), %eax 2690; AVX-32-NEXT: retl 2691; 2692; AVX-64-LABEL: test_f32_ugt_s: 2693; AVX-64: # %bb.0: 2694; AVX-64-NEXT: movl %edi, %eax 2695; AVX-64-NEXT: vcomiss %xmm0, %xmm1 2696; AVX-64-NEXT: cmovael %esi, %eax 2697; AVX-64-NEXT: retq 2698; 2699; X87-LABEL: test_f32_ugt_s: 2700; X87: # %bb.0: 2701; X87-NEXT: flds {{[0-9]+}}(%esp) 2702; X87-NEXT: flds {{[0-9]+}}(%esp) 2703; X87-NEXT: fcompp 2704; X87-NEXT: wait 2705; X87-NEXT: fnstsw %ax 2706; X87-NEXT: # kill: def $ah killed $ah killed $ax 2707; X87-NEXT: sahf 2708; X87-NEXT: jb .LBB36_1 2709; X87-NEXT: # %bb.2: 2710; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2711; X87-NEXT: movl (%eax), %eax 2712; X87-NEXT: retl 2713; X87-NEXT: .LBB36_1: 2714; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2715; X87-NEXT: movl (%eax), %eax 2716; X87-NEXT: retl 2717; 2718; X87-CMOV-LABEL: test_f32_ugt_s: 2719; X87-CMOV: # %bb.0: 2720; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2721; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2722; X87-CMOV-NEXT: fcompi %st(1), %st 2723; X87-CMOV-NEXT: fstp %st(0) 2724; X87-CMOV-NEXT: wait 2725; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2726; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2727; X87-CMOV-NEXT: cmovbl %eax, %ecx 2728; X87-CMOV-NEXT: movl (%ecx), %eax 2729; X87-CMOV-NEXT: retl 2730 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2731 float %f1, float %f2, metadata !"ugt", 2732 metadata !"fpexcept.strict") #0 2733 %res = select i1 %cond, i32 %a, i32 %b 2734 ret i32 %res 2735} 2736 2737define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2738; SSE-32-LABEL: test_f32_uge_s: 2739; SSE-32: # %bb.0: 2740; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2741; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2742; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2743; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2744; SSE-32-NEXT: cmovbel %eax, %ecx 2745; SSE-32-NEXT: movl (%ecx), %eax 2746; SSE-32-NEXT: retl 2747; 2748; SSE-64-LABEL: test_f32_uge_s: 2749; SSE-64: # %bb.0: 2750; SSE-64-NEXT: movl %edi, %eax 2751; SSE-64-NEXT: comiss %xmm0, %xmm1 2752; SSE-64-NEXT: cmoval %esi, %eax 2753; SSE-64-NEXT: retq 2754; 2755; AVX-32-LABEL: test_f32_uge_s: 2756; AVX-32: # %bb.0: 2757; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2758; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2759; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2760; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2761; AVX-32-NEXT: cmovbel %eax, %ecx 2762; AVX-32-NEXT: movl (%ecx), %eax 2763; AVX-32-NEXT: retl 2764; 2765; AVX-64-LABEL: test_f32_uge_s: 2766; AVX-64: # %bb.0: 2767; AVX-64-NEXT: movl %edi, %eax 2768; AVX-64-NEXT: vcomiss %xmm0, %xmm1 2769; AVX-64-NEXT: cmoval %esi, %eax 2770; AVX-64-NEXT: retq 2771; 2772; X87-LABEL: test_f32_uge_s: 2773; X87: # %bb.0: 2774; X87-NEXT: flds {{[0-9]+}}(%esp) 2775; X87-NEXT: flds {{[0-9]+}}(%esp) 2776; X87-NEXT: fcompp 2777; X87-NEXT: wait 2778; X87-NEXT: fnstsw %ax 2779; X87-NEXT: # kill: def $ah killed $ah killed $ax 2780; X87-NEXT: sahf 2781; X87-NEXT: jbe .LBB37_1 2782; X87-NEXT: # %bb.2: 2783; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2784; X87-NEXT: movl (%eax), %eax 2785; X87-NEXT: retl 2786; X87-NEXT: .LBB37_1: 2787; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2788; X87-NEXT: movl (%eax), %eax 2789; X87-NEXT: retl 2790; 2791; X87-CMOV-LABEL: test_f32_uge_s: 2792; X87-CMOV: # %bb.0: 2793; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2794; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2795; X87-CMOV-NEXT: fcompi %st(1), %st 2796; X87-CMOV-NEXT: fstp %st(0) 2797; X87-CMOV-NEXT: wait 2798; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2799; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2800; X87-CMOV-NEXT: cmovbel %eax, %ecx 2801; X87-CMOV-NEXT: movl (%ecx), %eax 2802; X87-CMOV-NEXT: retl 2803 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2804 float %f1, float %f2, metadata !"uge", 2805 metadata !"fpexcept.strict") #0 2806 %res = select i1 %cond, i32 %a, i32 %b 2807 ret i32 %res 2808} 2809 2810define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2811; SSE-32-LABEL: test_f32_ult_s: 2812; SSE-32: # %bb.0: 2813; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2814; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2815; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2816; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2817; SSE-32-NEXT: cmovbl %eax, %ecx 2818; SSE-32-NEXT: movl (%ecx), %eax 2819; SSE-32-NEXT: retl 2820; 2821; SSE-64-LABEL: test_f32_ult_s: 2822; SSE-64: # %bb.0: 2823; SSE-64-NEXT: movl %edi, %eax 2824; SSE-64-NEXT: comiss %xmm1, %xmm0 2825; SSE-64-NEXT: cmovael %esi, %eax 2826; SSE-64-NEXT: retq 2827; 2828; AVX-32-LABEL: test_f32_ult_s: 2829; AVX-32: # %bb.0: 2830; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2831; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2832; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2833; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2834; AVX-32-NEXT: cmovbl %eax, %ecx 2835; AVX-32-NEXT: movl (%ecx), %eax 2836; AVX-32-NEXT: retl 2837; 2838; AVX-64-LABEL: test_f32_ult_s: 2839; AVX-64: # %bb.0: 2840; AVX-64-NEXT: movl %edi, %eax 2841; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2842; AVX-64-NEXT: cmovael %esi, %eax 2843; AVX-64-NEXT: retq 2844; 2845; X87-LABEL: test_f32_ult_s: 2846; X87: # %bb.0: 2847; X87-NEXT: flds {{[0-9]+}}(%esp) 2848; X87-NEXT: flds {{[0-9]+}}(%esp) 2849; X87-NEXT: fcompp 2850; X87-NEXT: wait 2851; X87-NEXT: fnstsw %ax 2852; X87-NEXT: # kill: def $ah killed $ah killed $ax 2853; X87-NEXT: sahf 2854; X87-NEXT: jb .LBB38_1 2855; X87-NEXT: # %bb.2: 2856; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2857; X87-NEXT: movl (%eax), %eax 2858; X87-NEXT: retl 2859; X87-NEXT: .LBB38_1: 2860; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2861; X87-NEXT: movl (%eax), %eax 2862; X87-NEXT: retl 2863; 2864; X87-CMOV-LABEL: test_f32_ult_s: 2865; X87-CMOV: # %bb.0: 2866; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2867; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2868; X87-CMOV-NEXT: fcompi %st(1), %st 2869; X87-CMOV-NEXT: fstp %st(0) 2870; X87-CMOV-NEXT: wait 2871; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2872; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2873; X87-CMOV-NEXT: cmovbl %eax, %ecx 2874; X87-CMOV-NEXT: movl (%ecx), %eax 2875; X87-CMOV-NEXT: retl 2876 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2877 float %f1, float %f2, metadata !"ult", 2878 metadata !"fpexcept.strict") #0 2879 %res = select i1 %cond, i32 %a, i32 %b 2880 ret i32 %res 2881} 2882 2883define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2884; SSE-32-LABEL: test_f32_ule_s: 2885; SSE-32: # %bb.0: 2886; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2887; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2888; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2889; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2890; SSE-32-NEXT: cmovbel %eax, %ecx 2891; SSE-32-NEXT: movl (%ecx), %eax 2892; SSE-32-NEXT: retl 2893; 2894; SSE-64-LABEL: test_f32_ule_s: 2895; SSE-64: # %bb.0: 2896; SSE-64-NEXT: movl %edi, %eax 2897; SSE-64-NEXT: comiss %xmm1, %xmm0 2898; SSE-64-NEXT: cmoval %esi, %eax 2899; SSE-64-NEXT: retq 2900; 2901; AVX-32-LABEL: test_f32_ule_s: 2902; AVX-32: # %bb.0: 2903; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2904; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2905; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2906; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2907; AVX-32-NEXT: cmovbel %eax, %ecx 2908; AVX-32-NEXT: movl (%ecx), %eax 2909; AVX-32-NEXT: retl 2910; 2911; AVX-64-LABEL: test_f32_ule_s: 2912; AVX-64: # %bb.0: 2913; AVX-64-NEXT: movl %edi, %eax 2914; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2915; AVX-64-NEXT: cmoval %esi, %eax 2916; AVX-64-NEXT: retq 2917; 2918; X87-LABEL: test_f32_ule_s: 2919; X87: # %bb.0: 2920; X87-NEXT: flds {{[0-9]+}}(%esp) 2921; X87-NEXT: flds {{[0-9]+}}(%esp) 2922; X87-NEXT: fcompp 2923; X87-NEXT: wait 2924; X87-NEXT: fnstsw %ax 2925; X87-NEXT: # kill: def $ah killed $ah killed $ax 2926; X87-NEXT: sahf 2927; X87-NEXT: jbe .LBB39_1 2928; X87-NEXT: # %bb.2: 2929; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2930; X87-NEXT: movl (%eax), %eax 2931; X87-NEXT: retl 2932; X87-NEXT: .LBB39_1: 2933; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 2934; X87-NEXT: movl (%eax), %eax 2935; X87-NEXT: retl 2936; 2937; X87-CMOV-LABEL: test_f32_ule_s: 2938; X87-CMOV: # %bb.0: 2939; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2940; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 2941; X87-CMOV-NEXT: fcompi %st(1), %st 2942; X87-CMOV-NEXT: fstp %st(0) 2943; X87-CMOV-NEXT: wait 2944; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 2945; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 2946; X87-CMOV-NEXT: cmovbel %eax, %ecx 2947; X87-CMOV-NEXT: movl (%ecx), %eax 2948; X87-CMOV-NEXT: retl 2949 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 2950 float %f1, float %f2, metadata !"ule", 2951 metadata !"fpexcept.strict") #0 2952 %res = select i1 %cond, i32 %a, i32 %b 2953 ret i32 %res 2954} 2955 2956define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 2957; SSE-32-LABEL: test_f32_une_s: 2958; SSE-32: # %bb.0: 2959; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2960; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 2961; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2962; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2963; SSE-32-NEXT: cmovnel %eax, %ecx 2964; SSE-32-NEXT: cmovpl %eax, %ecx 2965; SSE-32-NEXT: movl (%ecx), %eax 2966; SSE-32-NEXT: retl 2967; 2968; SSE-64-LABEL: test_f32_une_s: 2969; SSE-64: # %bb.0: 2970; SSE-64-NEXT: movl %esi, %eax 2971; SSE-64-NEXT: comiss %xmm1, %xmm0 2972; SSE-64-NEXT: cmovnel %edi, %eax 2973; SSE-64-NEXT: cmovpl %edi, %eax 2974; SSE-64-NEXT: retq 2975; 2976; AVX-32-LABEL: test_f32_une_s: 2977; AVX-32: # %bb.0: 2978; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 2979; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 2980; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 2981; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 2982; AVX-32-NEXT: cmovnel %eax, %ecx 2983; AVX-32-NEXT: cmovpl %eax, %ecx 2984; AVX-32-NEXT: movl (%ecx), %eax 2985; AVX-32-NEXT: retl 2986; 2987; AVX-64-LABEL: test_f32_une_s: 2988; AVX-64: # %bb.0: 2989; AVX-64-NEXT: movl %esi, %eax 2990; AVX-64-NEXT: vcomiss %xmm1, %xmm0 2991; AVX-64-NEXT: cmovnel %edi, %eax 2992; AVX-64-NEXT: cmovpl %edi, %eax 2993; AVX-64-NEXT: retq 2994; 2995; X87-LABEL: test_f32_une_s: 2996; X87: # %bb.0: 2997; X87-NEXT: flds {{[0-9]+}}(%esp) 2998; X87-NEXT: flds {{[0-9]+}}(%esp) 2999; X87-NEXT: fcompp 3000; X87-NEXT: wait 3001; X87-NEXT: fnstsw %ax 3002; X87-NEXT: # kill: def $ah killed $ah killed $ax 3003; X87-NEXT: sahf 3004; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3005; X87-NEXT: jne .LBB40_3 3006; X87-NEXT: # %bb.1: 3007; X87-NEXT: jp .LBB40_3 3008; X87-NEXT: # %bb.2: 3009; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3010; X87-NEXT: .LBB40_3: 3011; X87-NEXT: movl (%eax), %eax 3012; X87-NEXT: retl 3013; 3014; X87-CMOV-LABEL: test_f32_une_s: 3015; X87-CMOV: # %bb.0: 3016; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 3017; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 3018; X87-CMOV-NEXT: fcompi %st(1), %st 3019; X87-CMOV-NEXT: fstp %st(0) 3020; X87-CMOV-NEXT: wait 3021; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3022; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3023; X87-CMOV-NEXT: cmovnel %eax, %ecx 3024; X87-CMOV-NEXT: cmovpl %eax, %ecx 3025; X87-CMOV-NEXT: movl (%ecx), %eax 3026; X87-CMOV-NEXT: retl 3027 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 3028 float %f1, float %f2, metadata !"une", 3029 metadata !"fpexcept.strict") #0 3030 %res = select i1 %cond, i32 %a, i32 %b 3031 ret i32 %res 3032} 3033 3034define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 { 3035; SSE-32-LABEL: test_f32_uno_s: 3036; SSE-32: # %bb.0: 3037; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 3038; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0 3039; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3040; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3041; SSE-32-NEXT: cmovpl %eax, %ecx 3042; SSE-32-NEXT: movl (%ecx), %eax 3043; SSE-32-NEXT: retl 3044; 3045; SSE-64-LABEL: test_f32_uno_s: 3046; SSE-64: # %bb.0: 3047; SSE-64-NEXT: movl %edi, %eax 3048; SSE-64-NEXT: comiss %xmm1, %xmm0 3049; SSE-64-NEXT: cmovnpl %esi, %eax 3050; SSE-64-NEXT: retq 3051; 3052; AVX-32-LABEL: test_f32_uno_s: 3053; AVX-32: # %bb.0: 3054; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 3055; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0 3056; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3057; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3058; AVX-32-NEXT: cmovpl %eax, %ecx 3059; AVX-32-NEXT: movl (%ecx), %eax 3060; AVX-32-NEXT: retl 3061; 3062; AVX-64-LABEL: test_f32_uno_s: 3063; AVX-64: # %bb.0: 3064; AVX-64-NEXT: movl %edi, %eax 3065; AVX-64-NEXT: vcomiss %xmm1, %xmm0 3066; AVX-64-NEXT: cmovnpl %esi, %eax 3067; AVX-64-NEXT: retq 3068; 3069; X87-LABEL: test_f32_uno_s: 3070; X87: # %bb.0: 3071; X87-NEXT: flds {{[0-9]+}}(%esp) 3072; X87-NEXT: flds {{[0-9]+}}(%esp) 3073; X87-NEXT: fcompp 3074; X87-NEXT: wait 3075; X87-NEXT: fnstsw %ax 3076; X87-NEXT: # kill: def $ah killed $ah killed $ax 3077; X87-NEXT: sahf 3078; X87-NEXT: jp .LBB41_1 3079; X87-NEXT: # %bb.2: 3080; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3081; X87-NEXT: movl (%eax), %eax 3082; X87-NEXT: retl 3083; X87-NEXT: .LBB41_1: 3084; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3085; X87-NEXT: movl (%eax), %eax 3086; X87-NEXT: retl 3087; 3088; X87-CMOV-LABEL: test_f32_uno_s: 3089; X87-CMOV: # %bb.0: 3090; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 3091; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 3092; X87-CMOV-NEXT: fcompi %st(1), %st 3093; X87-CMOV-NEXT: fstp %st(0) 3094; X87-CMOV-NEXT: wait 3095; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3096; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3097; X87-CMOV-NEXT: cmovpl %eax, %ecx 3098; X87-CMOV-NEXT: movl (%ecx), %eax 3099; X87-CMOV-NEXT: retl 3100 %cond = call i1 @llvm.experimental.constrained.fcmps.f32( 3101 float %f1, float %f2, metadata !"uno", 3102 metadata !"fpexcept.strict") #0 3103 %res = select i1 %cond, i32 %a, i32 %b 3104 ret i32 %res 3105} 3106 3107define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3108; SSE-32-LABEL: test_f64_oeq_s: 3109; SSE-32: # %bb.0: 3110; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3111; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3112; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3113; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3114; SSE-32-NEXT: cmovnel %eax, %ecx 3115; SSE-32-NEXT: cmovpl %eax, %ecx 3116; SSE-32-NEXT: movl (%ecx), %eax 3117; SSE-32-NEXT: retl 3118; 3119; SSE-64-LABEL: test_f64_oeq_s: 3120; SSE-64: # %bb.0: 3121; SSE-64-NEXT: movl %edi, %eax 3122; SSE-64-NEXT: comisd %xmm1, %xmm0 3123; SSE-64-NEXT: cmovnel %esi, %eax 3124; SSE-64-NEXT: cmovpl %esi, %eax 3125; SSE-64-NEXT: retq 3126; 3127; AVX-32-LABEL: test_f64_oeq_s: 3128; AVX-32: # %bb.0: 3129; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3130; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3131; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3132; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3133; AVX-32-NEXT: cmovnel %eax, %ecx 3134; AVX-32-NEXT: cmovpl %eax, %ecx 3135; AVX-32-NEXT: movl (%ecx), %eax 3136; AVX-32-NEXT: retl 3137; 3138; AVX-64-LABEL: test_f64_oeq_s: 3139; AVX-64: # %bb.0: 3140; AVX-64-NEXT: movl %edi, %eax 3141; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3142; AVX-64-NEXT: cmovnel %esi, %eax 3143; AVX-64-NEXT: cmovpl %esi, %eax 3144; AVX-64-NEXT: retq 3145; 3146; X87-LABEL: test_f64_oeq_s: 3147; X87: # %bb.0: 3148; X87-NEXT: fldl {{[0-9]+}}(%esp) 3149; X87-NEXT: fldl {{[0-9]+}}(%esp) 3150; X87-NEXT: fcompp 3151; X87-NEXT: wait 3152; X87-NEXT: fnstsw %ax 3153; X87-NEXT: # kill: def $ah killed $ah killed $ax 3154; X87-NEXT: sahf 3155; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3156; X87-NEXT: jne .LBB42_3 3157; X87-NEXT: # %bb.1: 3158; X87-NEXT: jp .LBB42_3 3159; X87-NEXT: # %bb.2: 3160; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3161; X87-NEXT: .LBB42_3: 3162; X87-NEXT: movl (%eax), %eax 3163; X87-NEXT: retl 3164; 3165; X87-CMOV-LABEL: test_f64_oeq_s: 3166; X87-CMOV: # %bb.0: 3167; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3168; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3169; X87-CMOV-NEXT: fcompi %st(1), %st 3170; X87-CMOV-NEXT: fstp %st(0) 3171; X87-CMOV-NEXT: wait 3172; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3173; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3174; X87-CMOV-NEXT: cmovnel %eax, %ecx 3175; X87-CMOV-NEXT: cmovpl %eax, %ecx 3176; X87-CMOV-NEXT: movl (%ecx), %eax 3177; X87-CMOV-NEXT: retl 3178 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3179 double %f1, double %f2, metadata !"oeq", 3180 metadata !"fpexcept.strict") #0 3181 %res = select i1 %cond, i32 %a, i32 %b 3182 ret i32 %res 3183} 3184 3185define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3186; SSE-32-LABEL: test_f64_ogt_s: 3187; SSE-32: # %bb.0: 3188; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3189; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3190; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3191; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3192; SSE-32-NEXT: cmoval %eax, %ecx 3193; SSE-32-NEXT: movl (%ecx), %eax 3194; SSE-32-NEXT: retl 3195; 3196; SSE-64-LABEL: test_f64_ogt_s: 3197; SSE-64: # %bb.0: 3198; SSE-64-NEXT: movl %edi, %eax 3199; SSE-64-NEXT: comisd %xmm1, %xmm0 3200; SSE-64-NEXT: cmovbel %esi, %eax 3201; SSE-64-NEXT: retq 3202; 3203; AVX-32-LABEL: test_f64_ogt_s: 3204; AVX-32: # %bb.0: 3205; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3206; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3207; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3208; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3209; AVX-32-NEXT: cmoval %eax, %ecx 3210; AVX-32-NEXT: movl (%ecx), %eax 3211; AVX-32-NEXT: retl 3212; 3213; AVX-64-LABEL: test_f64_ogt_s: 3214; AVX-64: # %bb.0: 3215; AVX-64-NEXT: movl %edi, %eax 3216; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3217; AVX-64-NEXT: cmovbel %esi, %eax 3218; AVX-64-NEXT: retq 3219; 3220; X87-LABEL: test_f64_ogt_s: 3221; X87: # %bb.0: 3222; X87-NEXT: fldl {{[0-9]+}}(%esp) 3223; X87-NEXT: fldl {{[0-9]+}}(%esp) 3224; X87-NEXT: fcompp 3225; X87-NEXT: wait 3226; X87-NEXT: fnstsw %ax 3227; X87-NEXT: # kill: def $ah killed $ah killed $ax 3228; X87-NEXT: sahf 3229; X87-NEXT: ja .LBB43_1 3230; X87-NEXT: # %bb.2: 3231; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3232; X87-NEXT: movl (%eax), %eax 3233; X87-NEXT: retl 3234; X87-NEXT: .LBB43_1: 3235; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3236; X87-NEXT: movl (%eax), %eax 3237; X87-NEXT: retl 3238; 3239; X87-CMOV-LABEL: test_f64_ogt_s: 3240; X87-CMOV: # %bb.0: 3241; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3242; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3243; X87-CMOV-NEXT: fcompi %st(1), %st 3244; X87-CMOV-NEXT: fstp %st(0) 3245; X87-CMOV-NEXT: wait 3246; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3247; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3248; X87-CMOV-NEXT: cmoval %eax, %ecx 3249; X87-CMOV-NEXT: movl (%ecx), %eax 3250; X87-CMOV-NEXT: retl 3251 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3252 double %f1, double %f2, metadata !"ogt", 3253 metadata !"fpexcept.strict") #0 3254 %res = select i1 %cond, i32 %a, i32 %b 3255 ret i32 %res 3256} 3257 3258define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3259; SSE-32-LABEL: test_f64_oge_s: 3260; SSE-32: # %bb.0: 3261; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3262; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3263; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3264; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3265; SSE-32-NEXT: cmovael %eax, %ecx 3266; SSE-32-NEXT: movl (%ecx), %eax 3267; SSE-32-NEXT: retl 3268; 3269; SSE-64-LABEL: test_f64_oge_s: 3270; SSE-64: # %bb.0: 3271; SSE-64-NEXT: movl %edi, %eax 3272; SSE-64-NEXT: comisd %xmm1, %xmm0 3273; SSE-64-NEXT: cmovbl %esi, %eax 3274; SSE-64-NEXT: retq 3275; 3276; AVX-32-LABEL: test_f64_oge_s: 3277; AVX-32: # %bb.0: 3278; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3279; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3280; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3281; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3282; AVX-32-NEXT: cmovael %eax, %ecx 3283; AVX-32-NEXT: movl (%ecx), %eax 3284; AVX-32-NEXT: retl 3285; 3286; AVX-64-LABEL: test_f64_oge_s: 3287; AVX-64: # %bb.0: 3288; AVX-64-NEXT: movl %edi, %eax 3289; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3290; AVX-64-NEXT: cmovbl %esi, %eax 3291; AVX-64-NEXT: retq 3292; 3293; X87-LABEL: test_f64_oge_s: 3294; X87: # %bb.0: 3295; X87-NEXT: fldl {{[0-9]+}}(%esp) 3296; X87-NEXT: fldl {{[0-9]+}}(%esp) 3297; X87-NEXT: fcompp 3298; X87-NEXT: wait 3299; X87-NEXT: fnstsw %ax 3300; X87-NEXT: # kill: def $ah killed $ah killed $ax 3301; X87-NEXT: sahf 3302; X87-NEXT: jae .LBB44_1 3303; X87-NEXT: # %bb.2: 3304; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3305; X87-NEXT: movl (%eax), %eax 3306; X87-NEXT: retl 3307; X87-NEXT: .LBB44_1: 3308; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3309; X87-NEXT: movl (%eax), %eax 3310; X87-NEXT: retl 3311; 3312; X87-CMOV-LABEL: test_f64_oge_s: 3313; X87-CMOV: # %bb.0: 3314; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3315; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3316; X87-CMOV-NEXT: fcompi %st(1), %st 3317; X87-CMOV-NEXT: fstp %st(0) 3318; X87-CMOV-NEXT: wait 3319; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3320; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3321; X87-CMOV-NEXT: cmovael %eax, %ecx 3322; X87-CMOV-NEXT: movl (%ecx), %eax 3323; X87-CMOV-NEXT: retl 3324 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3325 double %f1, double %f2, metadata !"oge", 3326 metadata !"fpexcept.strict") #0 3327 %res = select i1 %cond, i32 %a, i32 %b 3328 ret i32 %res 3329} 3330 3331define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3332; SSE-32-LABEL: test_f64_olt_s: 3333; SSE-32: # %bb.0: 3334; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3335; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3336; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3337; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3338; SSE-32-NEXT: cmoval %eax, %ecx 3339; SSE-32-NEXT: movl (%ecx), %eax 3340; SSE-32-NEXT: retl 3341; 3342; SSE-64-LABEL: test_f64_olt_s: 3343; SSE-64: # %bb.0: 3344; SSE-64-NEXT: movl %edi, %eax 3345; SSE-64-NEXT: comisd %xmm0, %xmm1 3346; SSE-64-NEXT: cmovbel %esi, %eax 3347; SSE-64-NEXT: retq 3348; 3349; AVX-32-LABEL: test_f64_olt_s: 3350; AVX-32: # %bb.0: 3351; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3352; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3353; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3354; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3355; AVX-32-NEXT: cmoval %eax, %ecx 3356; AVX-32-NEXT: movl (%ecx), %eax 3357; AVX-32-NEXT: retl 3358; 3359; AVX-64-LABEL: test_f64_olt_s: 3360; AVX-64: # %bb.0: 3361; AVX-64-NEXT: movl %edi, %eax 3362; AVX-64-NEXT: vcomisd %xmm0, %xmm1 3363; AVX-64-NEXT: cmovbel %esi, %eax 3364; AVX-64-NEXT: retq 3365; 3366; X87-LABEL: test_f64_olt_s: 3367; X87: # %bb.0: 3368; X87-NEXT: fldl {{[0-9]+}}(%esp) 3369; X87-NEXT: fldl {{[0-9]+}}(%esp) 3370; X87-NEXT: fcompp 3371; X87-NEXT: wait 3372; X87-NEXT: fnstsw %ax 3373; X87-NEXT: # kill: def $ah killed $ah killed $ax 3374; X87-NEXT: sahf 3375; X87-NEXT: ja .LBB45_1 3376; X87-NEXT: # %bb.2: 3377; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3378; X87-NEXT: movl (%eax), %eax 3379; X87-NEXT: retl 3380; X87-NEXT: .LBB45_1: 3381; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3382; X87-NEXT: movl (%eax), %eax 3383; X87-NEXT: retl 3384; 3385; X87-CMOV-LABEL: test_f64_olt_s: 3386; X87-CMOV: # %bb.0: 3387; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3388; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3389; X87-CMOV-NEXT: fcompi %st(1), %st 3390; X87-CMOV-NEXT: fstp %st(0) 3391; X87-CMOV-NEXT: wait 3392; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3393; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3394; X87-CMOV-NEXT: cmoval %eax, %ecx 3395; X87-CMOV-NEXT: movl (%ecx), %eax 3396; X87-CMOV-NEXT: retl 3397 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3398 double %f1, double %f2, metadata !"olt", 3399 metadata !"fpexcept.strict") #0 3400 %res = select i1 %cond, i32 %a, i32 %b 3401 ret i32 %res 3402} 3403 3404define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3405; SSE-32-LABEL: test_f64_ole_s: 3406; SSE-32: # %bb.0: 3407; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3408; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3409; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3410; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3411; SSE-32-NEXT: cmovael %eax, %ecx 3412; SSE-32-NEXT: movl (%ecx), %eax 3413; SSE-32-NEXT: retl 3414; 3415; SSE-64-LABEL: test_f64_ole_s: 3416; SSE-64: # %bb.0: 3417; SSE-64-NEXT: movl %edi, %eax 3418; SSE-64-NEXT: comisd %xmm0, %xmm1 3419; SSE-64-NEXT: cmovbl %esi, %eax 3420; SSE-64-NEXT: retq 3421; 3422; AVX-32-LABEL: test_f64_ole_s: 3423; AVX-32: # %bb.0: 3424; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3425; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3426; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3427; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3428; AVX-32-NEXT: cmovael %eax, %ecx 3429; AVX-32-NEXT: movl (%ecx), %eax 3430; AVX-32-NEXT: retl 3431; 3432; AVX-64-LABEL: test_f64_ole_s: 3433; AVX-64: # %bb.0: 3434; AVX-64-NEXT: movl %edi, %eax 3435; AVX-64-NEXT: vcomisd %xmm0, %xmm1 3436; AVX-64-NEXT: cmovbl %esi, %eax 3437; AVX-64-NEXT: retq 3438; 3439; X87-LABEL: test_f64_ole_s: 3440; X87: # %bb.0: 3441; X87-NEXT: fldl {{[0-9]+}}(%esp) 3442; X87-NEXT: fldl {{[0-9]+}}(%esp) 3443; X87-NEXT: fcompp 3444; X87-NEXT: wait 3445; X87-NEXT: fnstsw %ax 3446; X87-NEXT: # kill: def $ah killed $ah killed $ax 3447; X87-NEXT: sahf 3448; X87-NEXT: jae .LBB46_1 3449; X87-NEXT: # %bb.2: 3450; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3451; X87-NEXT: movl (%eax), %eax 3452; X87-NEXT: retl 3453; X87-NEXT: .LBB46_1: 3454; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3455; X87-NEXT: movl (%eax), %eax 3456; X87-NEXT: retl 3457; 3458; X87-CMOV-LABEL: test_f64_ole_s: 3459; X87-CMOV: # %bb.0: 3460; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3461; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3462; X87-CMOV-NEXT: fcompi %st(1), %st 3463; X87-CMOV-NEXT: fstp %st(0) 3464; X87-CMOV-NEXT: wait 3465; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3466; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3467; X87-CMOV-NEXT: cmovael %eax, %ecx 3468; X87-CMOV-NEXT: movl (%ecx), %eax 3469; X87-CMOV-NEXT: retl 3470 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3471 double %f1, double %f2, metadata !"ole", 3472 metadata !"fpexcept.strict") #0 3473 %res = select i1 %cond, i32 %a, i32 %b 3474 ret i32 %res 3475} 3476 3477define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3478; SSE-32-LABEL: test_f64_one_s: 3479; SSE-32: # %bb.0: 3480; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3481; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3482; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3483; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3484; SSE-32-NEXT: cmovnel %eax, %ecx 3485; SSE-32-NEXT: movl (%ecx), %eax 3486; SSE-32-NEXT: retl 3487; 3488; SSE-64-LABEL: test_f64_one_s: 3489; SSE-64: # %bb.0: 3490; SSE-64-NEXT: movl %edi, %eax 3491; SSE-64-NEXT: comisd %xmm1, %xmm0 3492; SSE-64-NEXT: cmovel %esi, %eax 3493; SSE-64-NEXT: retq 3494; 3495; AVX-32-LABEL: test_f64_one_s: 3496; AVX-32: # %bb.0: 3497; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3498; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3499; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3500; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3501; AVX-32-NEXT: cmovnel %eax, %ecx 3502; AVX-32-NEXT: movl (%ecx), %eax 3503; AVX-32-NEXT: retl 3504; 3505; AVX-64-LABEL: test_f64_one_s: 3506; AVX-64: # %bb.0: 3507; AVX-64-NEXT: movl %edi, %eax 3508; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3509; AVX-64-NEXT: cmovel %esi, %eax 3510; AVX-64-NEXT: retq 3511; 3512; X87-LABEL: test_f64_one_s: 3513; X87: # %bb.0: 3514; X87-NEXT: fldl {{[0-9]+}}(%esp) 3515; X87-NEXT: fldl {{[0-9]+}}(%esp) 3516; X87-NEXT: fcompp 3517; X87-NEXT: wait 3518; X87-NEXT: fnstsw %ax 3519; X87-NEXT: # kill: def $ah killed $ah killed $ax 3520; X87-NEXT: sahf 3521; X87-NEXT: jne .LBB47_1 3522; X87-NEXT: # %bb.2: 3523; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3524; X87-NEXT: movl (%eax), %eax 3525; X87-NEXT: retl 3526; X87-NEXT: .LBB47_1: 3527; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3528; X87-NEXT: movl (%eax), %eax 3529; X87-NEXT: retl 3530; 3531; X87-CMOV-LABEL: test_f64_one_s: 3532; X87-CMOV: # %bb.0: 3533; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3534; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3535; X87-CMOV-NEXT: fcompi %st(1), %st 3536; X87-CMOV-NEXT: fstp %st(0) 3537; X87-CMOV-NEXT: wait 3538; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3539; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3540; X87-CMOV-NEXT: cmovnel %eax, %ecx 3541; X87-CMOV-NEXT: movl (%ecx), %eax 3542; X87-CMOV-NEXT: retl 3543 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3544 double %f1, double %f2, metadata !"one", 3545 metadata !"fpexcept.strict") #0 3546 %res = select i1 %cond, i32 %a, i32 %b 3547 ret i32 %res 3548} 3549 3550define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3551; SSE-32-LABEL: test_f64_ord_s: 3552; SSE-32: # %bb.0: 3553; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3554; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3555; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3556; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3557; SSE-32-NEXT: cmovnpl %eax, %ecx 3558; SSE-32-NEXT: movl (%ecx), %eax 3559; SSE-32-NEXT: retl 3560; 3561; SSE-64-LABEL: test_f64_ord_s: 3562; SSE-64: # %bb.0: 3563; SSE-64-NEXT: movl %edi, %eax 3564; SSE-64-NEXT: comisd %xmm1, %xmm0 3565; SSE-64-NEXT: cmovpl %esi, %eax 3566; SSE-64-NEXT: retq 3567; 3568; AVX-32-LABEL: test_f64_ord_s: 3569; AVX-32: # %bb.0: 3570; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3571; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3572; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3573; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3574; AVX-32-NEXT: cmovnpl %eax, %ecx 3575; AVX-32-NEXT: movl (%ecx), %eax 3576; AVX-32-NEXT: retl 3577; 3578; AVX-64-LABEL: test_f64_ord_s: 3579; AVX-64: # %bb.0: 3580; AVX-64-NEXT: movl %edi, %eax 3581; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3582; AVX-64-NEXT: cmovpl %esi, %eax 3583; AVX-64-NEXT: retq 3584; 3585; X87-LABEL: test_f64_ord_s: 3586; X87: # %bb.0: 3587; X87-NEXT: fldl {{[0-9]+}}(%esp) 3588; X87-NEXT: fldl {{[0-9]+}}(%esp) 3589; X87-NEXT: fcompp 3590; X87-NEXT: wait 3591; X87-NEXT: fnstsw %ax 3592; X87-NEXT: # kill: def $ah killed $ah killed $ax 3593; X87-NEXT: sahf 3594; X87-NEXT: jnp .LBB48_1 3595; X87-NEXT: # %bb.2: 3596; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3597; X87-NEXT: movl (%eax), %eax 3598; X87-NEXT: retl 3599; X87-NEXT: .LBB48_1: 3600; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3601; X87-NEXT: movl (%eax), %eax 3602; X87-NEXT: retl 3603; 3604; X87-CMOV-LABEL: test_f64_ord_s: 3605; X87-CMOV: # %bb.0: 3606; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3607; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3608; X87-CMOV-NEXT: fcompi %st(1), %st 3609; X87-CMOV-NEXT: fstp %st(0) 3610; X87-CMOV-NEXT: wait 3611; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3612; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3613; X87-CMOV-NEXT: cmovnpl %eax, %ecx 3614; X87-CMOV-NEXT: movl (%ecx), %eax 3615; X87-CMOV-NEXT: retl 3616 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3617 double %f1, double %f2, metadata !"ord", 3618 metadata !"fpexcept.strict") #0 3619 %res = select i1 %cond, i32 %a, i32 %b 3620 ret i32 %res 3621} 3622 3623define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3624; SSE-32-LABEL: test_f64_ueq_s: 3625; SSE-32: # %bb.0: 3626; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3627; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3628; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3629; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3630; SSE-32-NEXT: cmovel %eax, %ecx 3631; SSE-32-NEXT: movl (%ecx), %eax 3632; SSE-32-NEXT: retl 3633; 3634; SSE-64-LABEL: test_f64_ueq_s: 3635; SSE-64: # %bb.0: 3636; SSE-64-NEXT: movl %edi, %eax 3637; SSE-64-NEXT: comisd %xmm1, %xmm0 3638; SSE-64-NEXT: cmovnel %esi, %eax 3639; SSE-64-NEXT: retq 3640; 3641; AVX-32-LABEL: test_f64_ueq_s: 3642; AVX-32: # %bb.0: 3643; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3644; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3645; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3646; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3647; AVX-32-NEXT: cmovel %eax, %ecx 3648; AVX-32-NEXT: movl (%ecx), %eax 3649; AVX-32-NEXT: retl 3650; 3651; AVX-64-LABEL: test_f64_ueq_s: 3652; AVX-64: # %bb.0: 3653; AVX-64-NEXT: movl %edi, %eax 3654; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3655; AVX-64-NEXT: cmovnel %esi, %eax 3656; AVX-64-NEXT: retq 3657; 3658; X87-LABEL: test_f64_ueq_s: 3659; X87: # %bb.0: 3660; X87-NEXT: fldl {{[0-9]+}}(%esp) 3661; X87-NEXT: fldl {{[0-9]+}}(%esp) 3662; X87-NEXT: fcompp 3663; X87-NEXT: wait 3664; X87-NEXT: fnstsw %ax 3665; X87-NEXT: # kill: def $ah killed $ah killed $ax 3666; X87-NEXT: sahf 3667; X87-NEXT: je .LBB49_1 3668; X87-NEXT: # %bb.2: 3669; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3670; X87-NEXT: movl (%eax), %eax 3671; X87-NEXT: retl 3672; X87-NEXT: .LBB49_1: 3673; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3674; X87-NEXT: movl (%eax), %eax 3675; X87-NEXT: retl 3676; 3677; X87-CMOV-LABEL: test_f64_ueq_s: 3678; X87-CMOV: # %bb.0: 3679; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3680; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3681; X87-CMOV-NEXT: fcompi %st(1), %st 3682; X87-CMOV-NEXT: fstp %st(0) 3683; X87-CMOV-NEXT: wait 3684; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3685; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3686; X87-CMOV-NEXT: cmovel %eax, %ecx 3687; X87-CMOV-NEXT: movl (%ecx), %eax 3688; X87-CMOV-NEXT: retl 3689 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3690 double %f1, double %f2, metadata !"ueq", 3691 metadata !"fpexcept.strict") #0 3692 %res = select i1 %cond, i32 %a, i32 %b 3693 ret i32 %res 3694} 3695 3696define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3697; SSE-32-LABEL: test_f64_ugt_s: 3698; SSE-32: # %bb.0: 3699; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3700; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3701; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3702; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3703; SSE-32-NEXT: cmovbl %eax, %ecx 3704; SSE-32-NEXT: movl (%ecx), %eax 3705; SSE-32-NEXT: retl 3706; 3707; SSE-64-LABEL: test_f64_ugt_s: 3708; SSE-64: # %bb.0: 3709; SSE-64-NEXT: movl %edi, %eax 3710; SSE-64-NEXT: comisd %xmm0, %xmm1 3711; SSE-64-NEXT: cmovael %esi, %eax 3712; SSE-64-NEXT: retq 3713; 3714; AVX-32-LABEL: test_f64_ugt_s: 3715; AVX-32: # %bb.0: 3716; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3717; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3718; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3719; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3720; AVX-32-NEXT: cmovbl %eax, %ecx 3721; AVX-32-NEXT: movl (%ecx), %eax 3722; AVX-32-NEXT: retl 3723; 3724; AVX-64-LABEL: test_f64_ugt_s: 3725; AVX-64: # %bb.0: 3726; AVX-64-NEXT: movl %edi, %eax 3727; AVX-64-NEXT: vcomisd %xmm0, %xmm1 3728; AVX-64-NEXT: cmovael %esi, %eax 3729; AVX-64-NEXT: retq 3730; 3731; X87-LABEL: test_f64_ugt_s: 3732; X87: # %bb.0: 3733; X87-NEXT: fldl {{[0-9]+}}(%esp) 3734; X87-NEXT: fldl {{[0-9]+}}(%esp) 3735; X87-NEXT: fcompp 3736; X87-NEXT: wait 3737; X87-NEXT: fnstsw %ax 3738; X87-NEXT: # kill: def $ah killed $ah killed $ax 3739; X87-NEXT: sahf 3740; X87-NEXT: jb .LBB50_1 3741; X87-NEXT: # %bb.2: 3742; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3743; X87-NEXT: movl (%eax), %eax 3744; X87-NEXT: retl 3745; X87-NEXT: .LBB50_1: 3746; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3747; X87-NEXT: movl (%eax), %eax 3748; X87-NEXT: retl 3749; 3750; X87-CMOV-LABEL: test_f64_ugt_s: 3751; X87-CMOV: # %bb.0: 3752; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3753; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3754; X87-CMOV-NEXT: fcompi %st(1), %st 3755; X87-CMOV-NEXT: fstp %st(0) 3756; X87-CMOV-NEXT: wait 3757; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3758; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3759; X87-CMOV-NEXT: cmovbl %eax, %ecx 3760; X87-CMOV-NEXT: movl (%ecx), %eax 3761; X87-CMOV-NEXT: retl 3762 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3763 double %f1, double %f2, metadata !"ugt", 3764 metadata !"fpexcept.strict") #0 3765 %res = select i1 %cond, i32 %a, i32 %b 3766 ret i32 %res 3767} 3768 3769define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3770; SSE-32-LABEL: test_f64_uge_s: 3771; SSE-32: # %bb.0: 3772; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3773; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3774; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3775; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3776; SSE-32-NEXT: cmovbel %eax, %ecx 3777; SSE-32-NEXT: movl (%ecx), %eax 3778; SSE-32-NEXT: retl 3779; 3780; SSE-64-LABEL: test_f64_uge_s: 3781; SSE-64: # %bb.0: 3782; SSE-64-NEXT: movl %edi, %eax 3783; SSE-64-NEXT: comisd %xmm0, %xmm1 3784; SSE-64-NEXT: cmoval %esi, %eax 3785; SSE-64-NEXT: retq 3786; 3787; AVX-32-LABEL: test_f64_uge_s: 3788; AVX-32: # %bb.0: 3789; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3790; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3791; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3792; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3793; AVX-32-NEXT: cmovbel %eax, %ecx 3794; AVX-32-NEXT: movl (%ecx), %eax 3795; AVX-32-NEXT: retl 3796; 3797; AVX-64-LABEL: test_f64_uge_s: 3798; AVX-64: # %bb.0: 3799; AVX-64-NEXT: movl %edi, %eax 3800; AVX-64-NEXT: vcomisd %xmm0, %xmm1 3801; AVX-64-NEXT: cmoval %esi, %eax 3802; AVX-64-NEXT: retq 3803; 3804; X87-LABEL: test_f64_uge_s: 3805; X87: # %bb.0: 3806; X87-NEXT: fldl {{[0-9]+}}(%esp) 3807; X87-NEXT: fldl {{[0-9]+}}(%esp) 3808; X87-NEXT: fcompp 3809; X87-NEXT: wait 3810; X87-NEXT: fnstsw %ax 3811; X87-NEXT: # kill: def $ah killed $ah killed $ax 3812; X87-NEXT: sahf 3813; X87-NEXT: jbe .LBB51_1 3814; X87-NEXT: # %bb.2: 3815; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3816; X87-NEXT: movl (%eax), %eax 3817; X87-NEXT: retl 3818; X87-NEXT: .LBB51_1: 3819; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3820; X87-NEXT: movl (%eax), %eax 3821; X87-NEXT: retl 3822; 3823; X87-CMOV-LABEL: test_f64_uge_s: 3824; X87-CMOV: # %bb.0: 3825; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3826; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3827; X87-CMOV-NEXT: fcompi %st(1), %st 3828; X87-CMOV-NEXT: fstp %st(0) 3829; X87-CMOV-NEXT: wait 3830; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3831; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3832; X87-CMOV-NEXT: cmovbel %eax, %ecx 3833; X87-CMOV-NEXT: movl (%ecx), %eax 3834; X87-CMOV-NEXT: retl 3835 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3836 double %f1, double %f2, metadata !"uge", 3837 metadata !"fpexcept.strict") #0 3838 %res = select i1 %cond, i32 %a, i32 %b 3839 ret i32 %res 3840} 3841 3842define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3843; SSE-32-LABEL: test_f64_ult_s: 3844; SSE-32: # %bb.0: 3845; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3846; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3847; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3848; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3849; SSE-32-NEXT: cmovbl %eax, %ecx 3850; SSE-32-NEXT: movl (%ecx), %eax 3851; SSE-32-NEXT: retl 3852; 3853; SSE-64-LABEL: test_f64_ult_s: 3854; SSE-64: # %bb.0: 3855; SSE-64-NEXT: movl %edi, %eax 3856; SSE-64-NEXT: comisd %xmm1, %xmm0 3857; SSE-64-NEXT: cmovael %esi, %eax 3858; SSE-64-NEXT: retq 3859; 3860; AVX-32-LABEL: test_f64_ult_s: 3861; AVX-32: # %bb.0: 3862; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3863; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3864; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3865; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3866; AVX-32-NEXT: cmovbl %eax, %ecx 3867; AVX-32-NEXT: movl (%ecx), %eax 3868; AVX-32-NEXT: retl 3869; 3870; AVX-64-LABEL: test_f64_ult_s: 3871; AVX-64: # %bb.0: 3872; AVX-64-NEXT: movl %edi, %eax 3873; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3874; AVX-64-NEXT: cmovael %esi, %eax 3875; AVX-64-NEXT: retq 3876; 3877; X87-LABEL: test_f64_ult_s: 3878; X87: # %bb.0: 3879; X87-NEXT: fldl {{[0-9]+}}(%esp) 3880; X87-NEXT: fldl {{[0-9]+}}(%esp) 3881; X87-NEXT: fcompp 3882; X87-NEXT: wait 3883; X87-NEXT: fnstsw %ax 3884; X87-NEXT: # kill: def $ah killed $ah killed $ax 3885; X87-NEXT: sahf 3886; X87-NEXT: jb .LBB52_1 3887; X87-NEXT: # %bb.2: 3888; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3889; X87-NEXT: movl (%eax), %eax 3890; X87-NEXT: retl 3891; X87-NEXT: .LBB52_1: 3892; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3893; X87-NEXT: movl (%eax), %eax 3894; X87-NEXT: retl 3895; 3896; X87-CMOV-LABEL: test_f64_ult_s: 3897; X87-CMOV: # %bb.0: 3898; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3899; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3900; X87-CMOV-NEXT: fcompi %st(1), %st 3901; X87-CMOV-NEXT: fstp %st(0) 3902; X87-CMOV-NEXT: wait 3903; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3904; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3905; X87-CMOV-NEXT: cmovbl %eax, %ecx 3906; X87-CMOV-NEXT: movl (%ecx), %eax 3907; X87-CMOV-NEXT: retl 3908 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3909 double %f1, double %f2, metadata !"ult", 3910 metadata !"fpexcept.strict") #0 3911 %res = select i1 %cond, i32 %a, i32 %b 3912 ret i32 %res 3913} 3914 3915define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3916; SSE-32-LABEL: test_f64_ule_s: 3917; SSE-32: # %bb.0: 3918; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3919; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3920; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3921; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3922; SSE-32-NEXT: cmovbel %eax, %ecx 3923; SSE-32-NEXT: movl (%ecx), %eax 3924; SSE-32-NEXT: retl 3925; 3926; SSE-64-LABEL: test_f64_ule_s: 3927; SSE-64: # %bb.0: 3928; SSE-64-NEXT: movl %edi, %eax 3929; SSE-64-NEXT: comisd %xmm1, %xmm0 3930; SSE-64-NEXT: cmoval %esi, %eax 3931; SSE-64-NEXT: retq 3932; 3933; AVX-32-LABEL: test_f64_ule_s: 3934; AVX-32: # %bb.0: 3935; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 3936; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 3937; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3938; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3939; AVX-32-NEXT: cmovbel %eax, %ecx 3940; AVX-32-NEXT: movl (%ecx), %eax 3941; AVX-32-NEXT: retl 3942; 3943; AVX-64-LABEL: test_f64_ule_s: 3944; AVX-64: # %bb.0: 3945; AVX-64-NEXT: movl %edi, %eax 3946; AVX-64-NEXT: vcomisd %xmm1, %xmm0 3947; AVX-64-NEXT: cmoval %esi, %eax 3948; AVX-64-NEXT: retq 3949; 3950; X87-LABEL: test_f64_ule_s: 3951; X87: # %bb.0: 3952; X87-NEXT: fldl {{[0-9]+}}(%esp) 3953; X87-NEXT: fldl {{[0-9]+}}(%esp) 3954; X87-NEXT: fcompp 3955; X87-NEXT: wait 3956; X87-NEXT: fnstsw %ax 3957; X87-NEXT: # kill: def $ah killed $ah killed $ax 3958; X87-NEXT: sahf 3959; X87-NEXT: jbe .LBB53_1 3960; X87-NEXT: # %bb.2: 3961; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3962; X87-NEXT: movl (%eax), %eax 3963; X87-NEXT: retl 3964; X87-NEXT: .LBB53_1: 3965; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 3966; X87-NEXT: movl (%eax), %eax 3967; X87-NEXT: retl 3968; 3969; X87-CMOV-LABEL: test_f64_ule_s: 3970; X87-CMOV: # %bb.0: 3971; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3972; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 3973; X87-CMOV-NEXT: fcompi %st(1), %st 3974; X87-CMOV-NEXT: fstp %st(0) 3975; X87-CMOV-NEXT: wait 3976; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 3977; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 3978; X87-CMOV-NEXT: cmovbel %eax, %ecx 3979; X87-CMOV-NEXT: movl (%ecx), %eax 3980; X87-CMOV-NEXT: retl 3981 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 3982 double %f1, double %f2, metadata !"ule", 3983 metadata !"fpexcept.strict") #0 3984 %res = select i1 %cond, i32 %a, i32 %b 3985 ret i32 %res 3986} 3987 3988define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 3989; SSE-32-LABEL: test_f64_une_s: 3990; SSE-32: # %bb.0: 3991; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 3992; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 3993; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 3994; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 3995; SSE-32-NEXT: cmovnel %eax, %ecx 3996; SSE-32-NEXT: cmovpl %eax, %ecx 3997; SSE-32-NEXT: movl (%ecx), %eax 3998; SSE-32-NEXT: retl 3999; 4000; SSE-64-LABEL: test_f64_une_s: 4001; SSE-64: # %bb.0: 4002; SSE-64-NEXT: movl %esi, %eax 4003; SSE-64-NEXT: comisd %xmm1, %xmm0 4004; SSE-64-NEXT: cmovnel %edi, %eax 4005; SSE-64-NEXT: cmovpl %edi, %eax 4006; SSE-64-NEXT: retq 4007; 4008; AVX-32-LABEL: test_f64_une_s: 4009; AVX-32: # %bb.0: 4010; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 4011; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 4012; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 4013; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 4014; AVX-32-NEXT: cmovnel %eax, %ecx 4015; AVX-32-NEXT: cmovpl %eax, %ecx 4016; AVX-32-NEXT: movl (%ecx), %eax 4017; AVX-32-NEXT: retl 4018; 4019; AVX-64-LABEL: test_f64_une_s: 4020; AVX-64: # %bb.0: 4021; AVX-64-NEXT: movl %esi, %eax 4022; AVX-64-NEXT: vcomisd %xmm1, %xmm0 4023; AVX-64-NEXT: cmovnel %edi, %eax 4024; AVX-64-NEXT: cmovpl %edi, %eax 4025; AVX-64-NEXT: retq 4026; 4027; X87-LABEL: test_f64_une_s: 4028; X87: # %bb.0: 4029; X87-NEXT: fldl {{[0-9]+}}(%esp) 4030; X87-NEXT: fldl {{[0-9]+}}(%esp) 4031; X87-NEXT: fcompp 4032; X87-NEXT: wait 4033; X87-NEXT: fnstsw %ax 4034; X87-NEXT: # kill: def $ah killed $ah killed $ax 4035; X87-NEXT: sahf 4036; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 4037; X87-NEXT: jne .LBB54_3 4038; X87-NEXT: # %bb.1: 4039; X87-NEXT: jp .LBB54_3 4040; X87-NEXT: # %bb.2: 4041; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 4042; X87-NEXT: .LBB54_3: 4043; X87-NEXT: movl (%eax), %eax 4044; X87-NEXT: retl 4045; 4046; X87-CMOV-LABEL: test_f64_une_s: 4047; X87-CMOV: # %bb.0: 4048; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 4049; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 4050; X87-CMOV-NEXT: fcompi %st(1), %st 4051; X87-CMOV-NEXT: fstp %st(0) 4052; X87-CMOV-NEXT: wait 4053; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 4054; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 4055; X87-CMOV-NEXT: cmovnel %eax, %ecx 4056; X87-CMOV-NEXT: cmovpl %eax, %ecx 4057; X87-CMOV-NEXT: movl (%ecx), %eax 4058; X87-CMOV-NEXT: retl 4059 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 4060 double %f1, double %f2, metadata !"une", 4061 metadata !"fpexcept.strict") #0 4062 %res = select i1 %cond, i32 %a, i32 %b 4063 ret i32 %res 4064} 4065 4066define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 { 4067; SSE-32-LABEL: test_f64_uno_s: 4068; SSE-32: # %bb.0: 4069; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 4070; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0 4071; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax 4072; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 4073; SSE-32-NEXT: cmovpl %eax, %ecx 4074; SSE-32-NEXT: movl (%ecx), %eax 4075; SSE-32-NEXT: retl 4076; 4077; SSE-64-LABEL: test_f64_uno_s: 4078; SSE-64: # %bb.0: 4079; SSE-64-NEXT: movl %edi, %eax 4080; SSE-64-NEXT: comisd %xmm1, %xmm0 4081; SSE-64-NEXT: cmovnpl %esi, %eax 4082; SSE-64-NEXT: retq 4083; 4084; AVX-32-LABEL: test_f64_uno_s: 4085; AVX-32: # %bb.0: 4086; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 4087; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0 4088; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax 4089; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx 4090; AVX-32-NEXT: cmovpl %eax, %ecx 4091; AVX-32-NEXT: movl (%ecx), %eax 4092; AVX-32-NEXT: retl 4093; 4094; AVX-64-LABEL: test_f64_uno_s: 4095; AVX-64: # %bb.0: 4096; AVX-64-NEXT: movl %edi, %eax 4097; AVX-64-NEXT: vcomisd %xmm1, %xmm0 4098; AVX-64-NEXT: cmovnpl %esi, %eax 4099; AVX-64-NEXT: retq 4100; 4101; X87-LABEL: test_f64_uno_s: 4102; X87: # %bb.0: 4103; X87-NEXT: fldl {{[0-9]+}}(%esp) 4104; X87-NEXT: fldl {{[0-9]+}}(%esp) 4105; X87-NEXT: fcompp 4106; X87-NEXT: wait 4107; X87-NEXT: fnstsw %ax 4108; X87-NEXT: # kill: def $ah killed $ah killed $ax 4109; X87-NEXT: sahf 4110; X87-NEXT: jp .LBB55_1 4111; X87-NEXT: # %bb.2: 4112; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 4113; X87-NEXT: movl (%eax), %eax 4114; X87-NEXT: retl 4115; X87-NEXT: .LBB55_1: 4116; X87-NEXT: leal {{[0-9]+}}(%esp), %eax 4117; X87-NEXT: movl (%eax), %eax 4118; X87-NEXT: retl 4119; 4120; X87-CMOV-LABEL: test_f64_uno_s: 4121; X87-CMOV: # %bb.0: 4122; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 4123; X87-CMOV-NEXT: fldl {{[0-9]+}}(%esp) 4124; X87-CMOV-NEXT: fcompi %st(1), %st 4125; X87-CMOV-NEXT: fstp %st(0) 4126; X87-CMOV-NEXT: wait 4127; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax 4128; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx 4129; X87-CMOV-NEXT: cmovpl %eax, %ecx 4130; X87-CMOV-NEXT: movl (%ecx), %eax 4131; X87-CMOV-NEXT: retl 4132 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 4133 double %f1, double %f2, metadata !"uno", 4134 metadata !"fpexcept.strict") #0 4135 %res = select i1 %cond, i32 %a, i32 %b 4136 ret i32 %res 4137} 4138 4139define void @foo(float %0, float %1) #0 { 4140; SSE-32-LABEL: foo: 4141; SSE-32: # %bb.0: 4142; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 4143; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0 4144; SSE-32-NEXT: jbe .LBB56_1 4145; SSE-32-NEXT: # %bb.2: 4146; SSE-32-NEXT: jmp bar # TAILCALL 4147; SSE-32-NEXT: .LBB56_1: 4148; SSE-32-NEXT: retl 4149; 4150; SSE-64-LABEL: foo: 4151; SSE-64: # %bb.0: 4152; SSE-64-NEXT: ucomiss %xmm1, %xmm0 4153; SSE-64-NEXT: jbe .LBB56_1 4154; SSE-64-NEXT: # %bb.2: 4155; SSE-64-NEXT: jmp bar # TAILCALL 4156; SSE-64-NEXT: .LBB56_1: 4157; SSE-64-NEXT: retq 4158; 4159; AVX-32-LABEL: foo: 4160; AVX-32: # %bb.0: 4161; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 4162; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0 4163; AVX-32-NEXT: jbe .LBB56_1 4164; AVX-32-NEXT: # %bb.2: 4165; AVX-32-NEXT: jmp bar # TAILCALL 4166; AVX-32-NEXT: .LBB56_1: 4167; AVX-32-NEXT: retl 4168; 4169; AVX-64-LABEL: foo: 4170; AVX-64: # %bb.0: 4171; AVX-64-NEXT: vucomiss %xmm1, %xmm0 4172; AVX-64-NEXT: jbe .LBB56_1 4173; AVX-64-NEXT: # %bb.2: 4174; AVX-64-NEXT: jmp bar # TAILCALL 4175; AVX-64-NEXT: .LBB56_1: 4176; AVX-64-NEXT: retq 4177; 4178; X87-LABEL: foo: 4179; X87: # %bb.0: 4180; X87-NEXT: flds {{[0-9]+}}(%esp) 4181; X87-NEXT: flds {{[0-9]+}}(%esp) 4182; X87-NEXT: fucompp 4183; X87-NEXT: wait 4184; X87-NEXT: fnstsw %ax 4185; X87-NEXT: # kill: def $ah killed $ah killed $ax 4186; X87-NEXT: sahf 4187; X87-NEXT: jbe .LBB56_1 4188; X87-NEXT: # %bb.2: 4189; X87-NEXT: jmp bar # TAILCALL 4190; X87-NEXT: .LBB56_1: 4191; X87-NEXT: retl 4192; 4193; X87-CMOV-LABEL: foo: 4194; X87-CMOV: # %bb.0: 4195; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 4196; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp) 4197; X87-CMOV-NEXT: fucompi %st(1), %st 4198; X87-CMOV-NEXT: fstp %st(0) 4199; X87-CMOV-NEXT: wait 4200; X87-CMOV-NEXT: jbe .LBB56_1 4201; X87-CMOV-NEXT: # %bb.2: 4202; X87-CMOV-NEXT: jmp bar # TAILCALL 4203; X87-CMOV-NEXT: .LBB56_1: 4204; X87-CMOV-NEXT: retl 4205 %3 = call i1 @llvm.experimental.constrained.fcmp.f32( float %0, float %1, metadata !"ogt", metadata !"fpexcept.strict") #0 4206 br i1 %3, label %4, label %5 4207 42084: ; preds = %2 4209 tail call void @bar() #0 4210 br label %5 4211 42125: ; preds = %4, %2 4213 ret void 4214} 4215declare dso_local void @bar() 4216 4217attributes #0 = { strictfp } 4218 4219declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata) 4220declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata) 4221declare i1 @llvm.experimental.constrained.fcmps.f32(float, float, metadata, metadata) 4222declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata) 4223