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/external/llvm/test/CodeGen/WebAssembly/
Dcfg-stackify.ll2 …wasm-fallthrough-return-opt -verify-machineinstrs -fast-isel=false | FileCheck -check-prefix=OPT %s
30 ; OPT-LABEL: test0:
31 ; OPT: loop
32 ; OPT-NEXT: i32.const
33 ; OPT-NEXT: i32.add
34 ; OPT: i32.ge_s
35 ; OPT-NEXT: br_if
36 ; OPT-NOT: br
37 ; OPT: call
38 ; OPT: br 0{{$}}
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dlower-mem-intrinsics.ll2 …wer-intrinsics -amdgpu-mem-intrinsic-expand-size=1024 %s | FileCheck -check-prefixes=OPT,MAX1024 %s
3 …gpu-lower-intrinsics -amdgpu-mem-intrinsic-expand-size=-1 %s | FileCheck -check-prefixes=OPT,ALL %s
45 ; OPT-LABEL: @min_size_large_static_memcpy_caller0(
46 ; OPT-NEXT: [[TMP1:%.*]] = bitcast i8 addrspace(1)* [[SRC:%.*]] to <4 x i32> addrspace(1)*
47 ; OPT-NEXT: [[TMP2:%.*]] = bitcast i8 addrspace(1)* [[DST:%.*]] to <4 x i32> addrspace(1)*
48 ; OPT-NEXT: br label [[LOAD_STORE_LOOP:%.*]]
49 ; OPT: load-store-loop:
50 ; OPT-NEXT: [[LOOP_INDEX:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[LOAD_STORE_LOOP]…
51 ; OPT-NEXT: [[TMP3:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* [[TMP1]], i…
52 ; OPT-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32> addrspace(1)* [[TMP3]], align 1
[all …]
Dcgp-bitfield-extract.ll1 ; RUN: opt -S -mtriple=amdgcn-- -codegenprepare < %s | FileCheck -check-prefix=OPT %s
2 …=amdgcn-- -mcpu=tonga -mattr=-flat-for-global -codegenprepare < %s | FileCheck -check-prefix=OPT %s
9 ; OPT-LABEL: @sink_ubfe_i32(
10 ; OPT: entry:
11 ; OPT-NEXT: br i1
13 ; OPT: bb0:
14 ; OPT: %0 = lshr i32 %arg1, 8
15 ; OPT-NEXT: %val0 = and i32 %0, 255
16 ; OPT: br label
18 ; OPT: bb1:
[all …]
Dpropagate-attributes-clone.ll1 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 < %s | FileCheck -check-prefixes=OPT,OPT-EXT %s
2 …=amdgcn-amd-amdhsa -O1 --amdgpu-internalize-symbols < %s | FileCheck -check-prefixes=OPT,OPT-INT %s
5 ; OPT: declare void @foo4() local_unnamed_addr #0
6 ; OPT: define internal fastcc void @0() unnamed_addr #1
7 ; OPT-EXT: define void @foo3() local_unnamed_addr #1
8 ; OPT-INT: define internal fastcc void @foo3.2() unnamed_addr #1
9 ; OPT-EXT: define void @foo2() local_unnamed_addr #1
10 ; OPT-INT: define internal fastcc void @foo2.3() unnamed_addr #1
11 ; OPT-EXT: define void @foo1() local_unnamed_addr #1
12 ; OPT-EXT: tail call void @foo4()
[all …]
Dwiden_extending_scalar_loads.ll1 …pu-codegenprepare -amdgpu-codegenprepare-widen-constant-loads < %s | FileCheck -check-prefix=OPT %s
5 ; OPT-LABEL: @constant_load_i1
6 ; OPT: load i1
7 ; OPT-NEXT: store i1
14 ; OPT-LABEL: @constant_load_i1_align2
15 ; OPT: load i1
16 ; OPT-NEXT: store
23 ; OPT-LABEL: @constant_load_i1_align4
24 ; OPT: bitcast
25 ; OPT-NEXT: load i32
[all …]
Dmultilevel-break.ll3 …S -mtriple=amdgcn-- -structurizecfg -si-annotate-control-flow < %s | FileCheck -check-prefix=OPT %s
9 ; OPT-LABEL: @multi_else_break(
10 ; OPT-NEXT: main_body:
11 ; OPT-NEXT: br label [[LOOP_OUTER:%.*]]
12 ; OPT: LOOP.outer:
13 ; OPT-NEXT: [[PHI_BROKEN2:%.*]] = phi i64 [ [[TMP9:%.*]], [[FLOW1:%.*]] ], [ 0, [[MAIN_BODY:%.*]…
14 ; OPT-NEXT: [[TMP43:%.*]] = phi i32 [ 0, [[MAIN_BODY]] ], [ [[TMP4:%.*]], [[FLOW1]] ]
15 ; OPT-NEXT: br label [[LOOP:%.*]]
16 ; OPT: LOOP:
17 ; OPT-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ [[TMP7:%.*]], [[FLOW:%.*]] ], [ 0, [[LOOP_OUTER]] ]
[all …]
Dllvm.amdgcn.wavefrontsize.ll5 ; RUN: opt -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
6 ; RUN: opt -mtriple=amdgcn-- -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
7 …pt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize32 -S < %s | FileCheck -check-prefixes=OPT,OPT-W32 %s
8 …pt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
9 ; RUN: opt -mtriple=amdgcn-- -mcpu=tonga -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
10 …010 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W32 %s
11 …010 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
14 ; OPT-LABEL: define amdgpu_kernel void @fold_wavefrontsize(
20 ; OPT-W32: store i32 32, i32 addrspace(1)* %arg, align 4
21 ; OPT-W64: store i32 64, i32 addrspace(1)* %arg, align 4
[all …]
Dloop_break.ll3 … -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=OPT %s
9 ; OPT-LABEL: @break_loop(
10 ; OPT-NEXT: bb:
11 ; OPT-NEXT: [[ID:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
12 ; OPT-NEXT: [[MY_TMP:%.*]] = sub i32 [[ID]], [[ARG:%.*]]
13 ; OPT-NEXT: br label [[BB1:%.*]]
14 ; OPT: bb1:
15 ; OPT-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ [[TMP2:%.*]], [[FLOW:%.*]] ], [ 0, [[BB:%.*]] ]
16 ; OPT-NEXT: [[LSR_IV:%.*]] = phi i32 [ undef, [[BB]] ], [ [[LSR_IV_NEXT:%.*]], [[FLOW]] ]
17 ; OPT-NEXT: [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], 1
[all …]
Dsi-annotatecfg-multiple-backedges.ll2 … -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=OPT %s
9 ; OPT-LABEL: @multiple_backedges(
10 ; OPT-NEXT: entry:
11 ; OPT-NEXT: [[TMP:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
12 ; OPT-NEXT: [[TMP2:%.*]] = shl nsw i32 [[ARG:%.*]], 1
13 ; OPT-NEXT: br label [[LOOP:%.*]]
14 ; OPT: loop:
15 ; OPT-NEXT: [[PHI_BROKEN1:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOOP_END:%.*]] ], [ [[PHI_BROKEN1]],…
16 ; OPT-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ 0, [[LOOP_END]] ], [ [[TMP0:%.*]], [[LOOP]] ], [ 0, […
17 ; OPT-NEXT: [[TMP4:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP5:%.*]], [[LOOP]] ], [ 0, [[LOOP_END…
[all …]
Dcgp-addressing-modes-flat.ll1 …n-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI -check-prefix=OPT-…
2 …-mattr=-flat-for-global < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI -check-prefix=OPT-…
3 …n -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-GFX9 %s
8 ; OPT-LABEL: @test_no_sink_flat_small_offset_i32(
9 ; OPT-CIVI: getelementptr i32, i32* %in
10 ; OPT-CIVI: br i1
11 ; OPT-CIVI-NOT: ptrtoint
13 ; OPT-GFX9: br
14 ; OPT-GFX9: %sunkaddr = getelementptr i8, i8* %0, i64 28
15 ; OPT-GFX9: %1 = bitcast i8* %sunkaddr to i32*
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dcgp-bitfield-extract.ll1 ; RUN: opt -S -mtriple=amdgcn-- -codegenprepare < %s | FileCheck -check-prefix=OPT %s
2 ; RUN: opt -S -mtriple=amdgcn-- -mcpu=tonga -codegenprepare < %s | FileCheck -check-prefix=OPT %s
9 ; OPT-LABEL: @sink_ubfe_i32(
10 ; OPT: entry:
11 ; OPT-NEXT: br i1
13 ; OPT: bb0:
14 ; OPT: %0 = lshr i32 %arg1, 8
15 ; OPT-NEXT: %val0 = and i32 %0, 255
16 ; OPT: br label
18 ; OPT: bb1:
[all …]
Dcgp-addressing-modes-flat.ll1 …ple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI %s
2 …riple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI %s
6 ; OPT-LABEL: @test_no_sink_flat_small_offset_i32(
7 ; OPT: getelementptr i32, i32 addrspace(4)* %in
8 ; OPT: br i1
9 ; OPT-NOT: ptrtoint
34 ; OPT-LABEL: @test_sink_noop_addrspacecast_flat_to_global_i32(
35 ; OPT: getelementptr i32, i32 addrspace(4)* %out,
36 ; OPT-CI-NOT: getelementptr
37 ; OPT: br i1
[all …]
/external/llvm-project/llvm/test/CodeGen/Thumb/
Dconsthoist-few-dependents.ll1 ; RUN: opt -consthoist -S %s -o - | FileCheck %s --check-prefix=OPT
2 …t -S -consthoist-min-num-to-rebase=1 %s -o - | FileCheck %s --check-prefix=OPT --check-prefix=OPT-1
3 …t -S -consthoist-min-num-to-rebase=2 %s -o - | FileCheck %s --check-prefix=OPT --check-prefix=OPT-2
4 …t -S -consthoist-min-num-to-rebase=3 %s -o - | FileCheck %s --check-prefix=OPT --check-prefix=OPT-3
14 ; OPT-LABEL: avalon
15 ; OPT: bb1:
16 ; OPT: store i1 true
17 ; OPT: bb2:
18 ; OPT: store i1 false
19 ; OPT: bb3:
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Darm64-bitfield-extract.ll2 ; RUN: opt -codegenprepare -mtriple=arm64-apple=ios -S -o - %s | FileCheck --check-prefix=OPT %s
17 ; OPT-LABEL: @foo(
18 ; OPT-NEXT: [[TMP:%.*]] = bitcast %struct.X* [[X:%.*]] to i32*
19 ; OPT-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 4
20 ; OPT-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_Y:%.*]], %struct.Y* [[Y:%.*]], i64 0, i3…
21 ; OPT-NEXT: [[BF_CLEAR:%.*]] = lshr i32 [[TMP1]], 3
22 ; OPT-NEXT: [[BF_CLEAR_LOBIT:%.*]] = and i32 [[BF_CLEAR]], 1
23 ; OPT-NEXT: [[FROMBOOL:%.*]] = trunc i32 [[BF_CLEAR_LOBIT]] to i8
24 ; OPT-NEXT: store i8 [[FROMBOOL]], i8* [[B]], align 1
25 ; OPT-NEXT: ret void
[all …]
/external/llvm/test/Feature/
Doptnone-opt.ll1 ; RUN: opt -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O0
2 ; RUN: opt -O1 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1
3 ; RUN: opt -O2 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3
4 ; RUN: opt -O3 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3
5 ; RUN: opt -bb-vectorize -dce -die -loweratomic -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT…
6 …l -loop-rotate -loop-unroll -loop-unswitch -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-LOOP
37 ; OPT-O0-NOT: Skipping pass
40 ; OPT-O1-DAG: Skipping pass 'Aggressive Dead Code Elimination'
41 ; OPT-O1-DAG: Skipping pass 'Combine redundant instructions'
42 ; OPT-O1-DAG: Skipping pass 'Dead Store Elimination'
[all …]
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dp9-vinsert-vextract.ll3 ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,CHECK-OPT %s
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-BE,CHECK-BE-OPT
148 ; CHECK-OPT-LABEL: shuffle_vector_halfword_8_1:
149 ; CHECK-OPT: # %bb.0: # %entry
150 ; CHECK-OPT-NEXT: vsldoi 2, 2, 2, 6
151 ; CHECK-OPT-NEXT: vinserth 3, 2, 14
152 ; CHECK-OPT-NEXT: vmr 2, 3
153 ; CHECK-OPT-NEXT: blr
164 ; CHECK-BE-OPT-LABEL: shuffle_vector_halfword_8_1:
165 ; CHECK-BE-OPT: # %bb.0: # %entry
[all …]
/external/mesa3d/src/intel/compiler/
Dbrw_nir.c462 #define OPT(pass, ...) ({ \ macro
535 OPT(nir_split_array_vars, nir_var_function_temp); in brw_nir_optimize()
536 OPT(nir_shrink_vec_array_vars, nir_var_function_temp); in brw_nir_optimize()
537 OPT(nir_opt_deref); in brw_nir_optimize()
538 OPT(nir_lower_vars_to_ssa); in brw_nir_optimize()
544 OPT(nir_opt_find_array_copies); in brw_nir_optimize()
546 OPT(nir_opt_copy_prop_vars); in brw_nir_optimize()
547 OPT(nir_opt_dead_write_vars); in brw_nir_optimize()
548 OPT(nir_opt_combine_stores, nir_var_all); in brw_nir_optimize()
551 OPT(nir_lower_alu_to_scalar, NULL, NULL); in brw_nir_optimize()
[all …]
/external/erofs-utils/
Dmkerofsimage.sh75 OPT=""
77 OPT="$OPT --mount-point $MOUNT_POINT"
80 OPT="$OPT --product-out $PRODUCT_OUT"
83 OPT="$OPT --fs-config-file $FS_CONFIG"
86 OPT="$OPT --file-contexts $FILE_CONTEXTS"
89 OPT="$OPT -T $TIMESTAMP"
92 OPT="$OPT -U $UUID"
95 MAKE_EROFS_CMD="mkfs.erofs -z $COMPRESSOR $OPT $OUTPUT_FILE $SRC_DIR"
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dfp-sincos-01.ll3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s --check-prefix=CHECK-OPT
4 …N: llc < %s -mtriple=s390x-linux-gnu -enable-unsafe-fp-math | FileCheck %s --check-prefix=CHECK-OPT
7 ; CHECK-OPT-LABEL: f1:
8 ; CHECK-OPT: brasl %r14, sincosf@PLT
9 ; CHECK-OPT: le %f0, 164(%r15)
10 ; CHECK-OPT: aeb %f0, 160(%r15)
18 ; CHECK-OPT-LABEL: f1_errno:
19 ; CHECK-OPT: brasl %r14, sinf@PLT
20 ; CHECK-OPT: ler %f9, %f0
21 ; CHECK-OPT: brasl %r14, cosf@PLT
[all …]
/external/clang/test/CodeGenOpenCL/
Dshifts.cl1 … %clang_cc1 -x cl -O1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -check-prefix=OPT
8 // OPT: @gtest1 = local_unnamed_addr constant i64 2147483648
22 //OPT: @positiveShift32
24 //OPT: [[M32:%.+]] = and i32 %b, 31
25 //OPT-NEXT: [[C32:%.+]] = shl i32 %a, [[M32]]
28 //OPT-NEXT: [[E32:%.+]] = add nsw i32 [[C32]], 2
30 //OPT-NEXT: ret i32 [[E32]]
34 //OPT: @positiveShift64
36 //OPT: [[M64:%.+]] = and i64 %b, 63
37 //OPT-NEXT: [[C64:%.+]] = ashr i64 %a, [[M64]]
[all …]
/external/llvm-project/mlir/test/Examples/Toy/Ch5/
Daffine-lowering.mlir2 // RUN: toyc-ch5 %s -emit=mlir-affine -opt 2>&1 | FileCheck %s --check-prefix=OPT
43 // OPT-LABEL: func @main()
44 // OPT: [[VAL_0:%.*]] = constant 1.000000e+00 : f64
45 // OPT: [[VAL_1:%.*]] = constant 2.000000e+00 : f64
46 // OPT: [[VAL_2:%.*]] = constant 3.000000e+00 : f64
47 // OPT: [[VAL_3:%.*]] = constant 4.000000e+00 : f64
48 // OPT: [[VAL_4:%.*]] = constant 5.000000e+00 : f64
49 // OPT: [[VAL_5:%.*]] = constant 6.000000e+00 : f64
50 // OPT: [[VAL_6:%.*]] = alloc() : memref<3x2xf64>
51 // OPT: [[VAL_7:%.*]] = alloc() : memref<2x3xf64>
[all …]
/external/llvm-project/mlir/test/Examples/Toy/Ch7/
Daffine-lowering.mlir2 // RUN: toyc-ch7 %s -emit=mlir-affine -opt 2>&1 | FileCheck %s --check-prefix=OPT
43 // OPT-LABEL: func @main()
44 // OPT: [[VAL_0:%.*]] = constant 1.000000e+00 : f64
45 // OPT: [[VAL_1:%.*]] = constant 2.000000e+00 : f64
46 // OPT: [[VAL_2:%.*]] = constant 3.000000e+00 : f64
47 // OPT: [[VAL_3:%.*]] = constant 4.000000e+00 : f64
48 // OPT: [[VAL_4:%.*]] = constant 5.000000e+00 : f64
49 // OPT: [[VAL_5:%.*]] = constant 6.000000e+00 : f64
50 // OPT: [[VAL_6:%.*]] = alloc() : memref<3x2xf64>
51 // OPT: [[VAL_7:%.*]] = alloc() : memref<2x3xf64>
[all …]
/external/llvm-project/mlir/test/Examples/Toy/Ch6/
Daffine-lowering.mlir2 // RUN: toyc-ch6 %s -emit=mlir-affine -opt 2>&1 | FileCheck %s --check-prefix=OPT
43 // OPT-LABEL: func @main()
44 // OPT: [[VAL_0:%.*]] = constant 1.000000e+00 : f64
45 // OPT: [[VAL_1:%.*]] = constant 2.000000e+00 : f64
46 // OPT: [[VAL_2:%.*]] = constant 3.000000e+00 : f64
47 // OPT: [[VAL_3:%.*]] = constant 4.000000e+00 : f64
48 // OPT: [[VAL_4:%.*]] = constant 5.000000e+00 : f64
49 // OPT: [[VAL_5:%.*]] = constant 6.000000e+00 : f64
50 // OPT: [[VAL_6:%.*]] = alloc() : memref<3x2xf64>
51 // OPT: [[VAL_7:%.*]] = alloc() : memref<2x3xf64>
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dtailcall-extract.ll2 ; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix OPT
12 ; OPT-LABEL: test1
13 ; OPT: if.then.i:
14 ; OPT-NEXT: tail call { i8*, i64 } @bar
15 ; OPT-NEXT: extractvalue
16 ; OPT-NEXT: bitcast
17 ; OPT-NEXT: ret
19 ; OPT: if.end.i:
20 ; OPT-NEXT: tail call { i8*, i64 } @foo
21 ; OPT-NEXT: extractvalue
[all …]
/external/llvm-project/llvm/test/Analysis/TypeBasedAliasAnalysis/
Daggregates.ll4 ; RUN: opt < %s -tbaa -basic-aa -gvn -S | FileCheck %s --check-prefix=OPT
19 ; OPT-LABEL: f1
20 ; OPT: store i32 5,
21 ; OPT: store i32 7,
22 ; OPT: %[[RET:.*]] = load i32,
23 ; OPT: ret i32 %[[RET]]
36 ; OPT-LABEL: f2
37 ; OPT: store i32 5,
38 ; OPT: store i32 7,
39 ; OPT: %[[RET:.*]] = load i32,
[all …]

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