| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| D | armv4-mont.pl | 301 my @ACC=map("q$_",(6..13));
337 vmull.u32 @ACC[0],$Bi,${A0}[0]
338 vmull.u32 @ACC[1],$Bi,${A0}[1]
339 vmull.u32 @ACC[2],$Bi,${A1}[0]
340 vshl.i64 $Ni,@ACC[0]#hi,#16
341 vmull.u32 @ACC[3],$Bi,${A1}[1]
343 vadd.u64 $Ni,$Ni,@ACC[0]#lo
347 vmull.u32 @ACC[4],$Bi,${A2}[0]
349 vmull.u32 @ACC[5],$Bi,${A2}[1]
350 vmull.u32 @ACC[6],$Bi,${A3}[0]
[all …]
|
| /external/rust/crates/ring/crypto/fipsmodule/bn/asm/ |
| D | armv4-mont.pl | 303 my @ACC=map("q$_",(6..13));
339 vmull.u32 @ACC[0],$Bi,${A0}[0]
340 vmull.u32 @ACC[1],$Bi,${A0}[1]
341 vmull.u32 @ACC[2],$Bi,${A1}[0]
342 vshl.i64 $Ni,@ACC[0]#hi,#16
343 vmull.u32 @ACC[3],$Bi,${A1}[1]
345 vadd.u64 $Ni,$Ni,@ACC[0]#lo
349 vmull.u32 @ACC[4],$Bi,${A2}[0]
351 vmull.u32 @ACC[5],$Bi,${A2}[1]
352 vmull.u32 @ACC[6],$Bi,${A3}[0]
[all …]
|
| /external/libwebsockets/plugins/raw-proxy/ |
| D | protocol_lws_raw_proxy.c | 44 ACC, enumerator
100 if (conn->r[ACC]) in destroy_conn()
101 lws_ring_destroy(conn->r[ACC]); in destroy_conn()
122 i.context = lws_get_context(pss->conn->wsi[ACC]); in connect_client()
128 i.vhost = lws_get_vhost(pss->conn->wsi[ACC]); in connect_client()
263 conn->rx_enabled[ACC] = 1; in callback_raw_proxy()
267 flow_control(conn, ACC, 1); in callback_raw_proxy()
280 if (conn->closed[ACC]) in callback_raw_proxy()
291 if (!pss || !conn->wsi[ACC] || conn->closed[ACC]) { in callback_raw_proxy()
293 pss, conn->wsi[ACC], conn->closed[ACC]); in callback_raw_proxy()
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | mips64muldiv.ll | 1 ; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,ACC
2 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,ACC
3 ; RUN: llc -march=mips64el -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=ALL,ACC
8 ; ACC - Targets with accumulator based mul/div (i.e. pre-MIPS32r6)
14 ; ACC: dmult ${{[45]}}, ${{[45]}}
15 ; ACC: mflo $2
31 ; ACC: dmult $4, $[[T0]]
32 ; ACC: mfhi $[[T1:[0-9]+]]
44 ; ACC: ddivu $zero, $4, $5
45 ; ACC: mflo $2
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | mips64muldiv.ll | 1 ; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,ACC
2 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,ACC
3 ; RUN: llc -march=mips64el -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=ALL,ACC
8 ; ACC - Targets with accumulator based mul/div (i.e. pre-MIPS32r6)
14 ; ACC: dmult ${{[45]}}, ${{[45]}}
15 ; ACC: mflo $2
31 ; ACC: dmult $4, $[[T0]]
32 ; ACC: mfhi $[[T1:[0-9]+]]
44 ; ACC: ddivu $zero, $4, $5
45 ; ACC: mflo $2
[all …]
|
| /external/llvm-project/llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/ |
| D | BUILD.gn | 3 tablegen("ACC") {
6 output_name = "ACC.h.inc"
9 tablegen("ACC.cpp") {
12 output_name = "ACC.cpp.inc"
13 td_file = "ACC.td"
17 deps = [ ":ACC" ]
|
| /external/llvm-project/polly/test/DependenceInfo/ |
| D | fine_grain_dep_0.ll | 2 …based -polly-dependences-analysis-level=access-wise -analyze < %s | FileCheck %s --check-prefix=ACC
3 …based -polly-dependences-analysis-level=access-wise -analyze < %s | FileCheck %s --check-prefix=ACC
14 ; ACC: RAW dependences:
15 ; ACC-NEXT: [N] -> { Stmt_for_body[i0] -> Stmt_for_body[6 + i0] : 0 <= i0 <= -13 + N; Stmt_for_bo…
17 ; ACC-NEXT: WAR dependences:
18 ; ACC-NEXT: [N] -> { }
19 ; ACC-NEXT: WAW dependences:
20 ; ACC-NEXT: [N] -> { }
21 ; ACC-NEXT: Reduction dependences:
22 ; ACC-NEXT: [N] -> { }
|
| /external/llvm-project/llvm/include/llvm/Frontend/OpenACC/ |
| D | CMakeLists.txt | 1 set(LLVM_TARGET_DEFINITIONS ACC.td)
2 tablegen(LLVM ACC.h.inc --gen-directive-decl)
3 tablegen(LLVM ACC.cpp.inc --gen-directive-gen)
|
| /external/llvm-project/clang/tools/libclang/ |
| D | CXCompilationDatabase.cpp | 81 AllocatedCXCompileCommands *ACC = in clang_CompileCommands_getSize() local
84 return ACC->CCmd.size(); in clang_CompileCommands_getSize()
93 AllocatedCXCompileCommands *ACC = in clang_CompileCommands_getCommand() local
96 if (I >= ACC->CCmd.size()) in clang_CompileCommands_getCommand()
99 return &ACC->CCmd[I]; in clang_CompileCommands_getCommand()
|
| /external/llvm-project/llvm/lib/Frontend/OpenACC/ |
| D | CMakeLists.txt | 1 set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_INCLUDE_DIR}/llvm/Frontend/OpenACC/ACC.td)
2 tablegen(LLVM ACC.cpp --gen-directive-impl)
6 ACC.cpp # Generated by tablegen above
|
| /external/llvm-project/mlir/test/Dialect/Shape/ |
| D | shape-to-shape.mlir | 11 // CHECK: ^bb0({{.*}}: index, [[DIM:%.*]]: !shape.size, [[ACC:%.*]]: !shape.size
12 // CHECK: [[NEW_ACC:%.*]] = shape.mul [[DIM]], [[ACC]]
27 // CHECK: ^bb0({{.*}}: index, [[DIM:%.*]]: index, [[ACC:%.*]]: index
28 // CHECK: [[NEW_ACC:%.*]] = shape.mul [[DIM]], [[ACC]]
|
| /external/tpm2-tss/ |
| D | tpm2-tss.sln | 8 …C91BC942}") = "tss2-sys", "src\tss2-sys\tss2-sys.vcxproj", "{10D9862F-0E36-4ACC-AF19-930B00A88A98}"
21 {10D9862F-0E36-4ACC-AF19-930B00A88A98} = {10D9862F-0E36-4ACC-AF19-930B00A88A98}
53 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Debug|x64.ActiveCfg = Debug|x64
54 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Debug|x64.Build.0 = Debug|x64
55 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Debug|x86.ActiveCfg = Debug|Win32
56 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Debug|x86.Build.0 = Debug|Win32
57 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Release|x64.ActiveCfg = Release|x64
58 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Release|x64.Build.0 = Release|x64
59 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Release|x86.ActiveCfg = Release|Win32
60 {10D9862F-0E36-4ACC-AF19-930B00A88A98}.Release|x86.Build.0 = Release|Win32
|
| /external/clang/tools/libclang/ |
| D | CXCompilationDatabase.cpp | 83 AllocatedCXCompileCommands *ACC = in clang_CompileCommands_getSize() local
86 return ACC->CCmd.size(); in clang_CompileCommands_getSize()
95 AllocatedCXCompileCommands *ACC = in clang_CompileCommands_getCommand() local
98 if (I >= ACC->CCmd.size()) in clang_CompileCommands_getCommand()
101 return &ACC->CCmd[I]; in clang_CompileCommands_getCommand()
|
| /external/llvm-project/llvm/utils/gn/secondary/llvm/lib/Frontend/OpenACC/ |
| D | BUILD.gn | 6 td_file = "//llvm/include/llvm/Frontend/OpenACC/ACC.td"
7 output_name = "ACC.cpp"
|
| /external/tensorflow/tensorflow/compiler/mlir/hlo/tests/ |
| D | lhlo-legalize-to-parallel-loops.mlir | 32 // CHECK: ^bb0([[ELEM:%.*]]: f32, [[ACC:%.*]]: f32):
37 // CHECK: store [[ACC]], [[ACC_BUF]][] : memref<f32>
73 // CHECK: ^bb0([[ELEM:%.*]]: f32, [[ACC:%.*]]: f32):
78 // CHECK: store [[ACC]], [[ACC_BUF]][] : memref<f32>
118 // CHECK: ^bb0([[ELEM:%.*]]: f32, [[ACC:%.*]]: f32):
123 // CHECK: store [[ACC]], [[ACC_BUF]][] : memref<f32>
186 // CHECK: ^bb0([[ELEM:%.*]]: f32, [[ACC:%.*]]: f32):
191 // CHECK: store [[ACC]], [[ACC_BUF]][] : memref<f32>
|
| D | lhlo-legalize-to-gpu.mlir | 22 // CHECK: %[[ACC:.*]] = load %[[ARG1]][] : memref<f32>
23 // CHECK: store %[[ACC]], %[[ARG2]][%[[IDX:.*]]] : memref<100xf32>
|
| /external/llvm-project/polly/test/Isl/CodeGen/MemAccess/ |
| D | codegen_simple_md.ll | 63 ; WITHCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x i32…
64 ; WITHCONST: store i32 100, i32* %[[ACC]]
71 ; WITHOUTCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x …
72 ; WITHOUTCONST: store i32 100, i32* %[[ACC]]
|
| D | codegen_simple_md_float.ll | 60 ; WITHCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x…
61 ; WITHCONST: store float 1.000000e+02, float* %[[ACC]]
68 ; WITHOUTCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([104…
69 ; WITHOUTCONST: store float 1.000000e+02, float* %[[ACC]]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | sext-acc.ll | 8 ; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
9 ; CHECK: call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
41 ; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
42 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
93 ; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
94 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
145 ; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
146 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]])
|
| D | pr43073.ll | 18 ; CHECK: [[ACC:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[IN_MINUS_3]], i32 [[B_PLUS_2]], i32 [[ADD…
25 ; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[IN_MINUS_5]], i32 [[B_PLUS_4]], i32 [[ACC…
91 ; CHECK: [[ACC:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[IN_MINUS_3]], i32 [[B_PLUS_2]], i32 [[MUL…
98 ; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[IN_MINUS_5]], i32 [[B_PLUS_4]], i32 [[ACC…
160 ; CHECK: [[ACC:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN_MINUS_3]], i32 [[B_PLUS_2]], i64 [[AD…
167 …ECK: [[RES:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN_MINUS_5]], i32 [[B_PLUS_4]], i64 [[ACC]])
242 ; CHECK: [[ACC:%[^ ]+]] = add i64 [[SEXT]], [[ADD_1]]
248 ; CHECK: [[RES:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[Y_3]], i32 [[X_2]], i64 [[ACC]])
|
| /external/kotlinx.coroutines/ui/kotlinx-coroutines-android/animation-app/app/src/main/java/org/jetbrains/kotlinx/animation/ |
| D | Animation.kt | 92 private const val ACC = 1e-18f in norm() constant
114 sx -= dx / dn * ACC * dt in norm()
115 sy -= dy / dn * ACC * dt in norm()
|
| /external/harfbuzz_ng/src/ |
| D | hb-cff1-interp-cs.hh | 40 template <typename ACC>
41 void init (const byte_str_t &str, ACC &acc, unsigned int fd) in init()
|
| /external/llvm-project/polly/lib/ |
| D | CMakeLists.txt | 46 # Polly-ACC requires the NVPTX backend to work. Ask LLVM about its libraries.
128 # Additional dependencies for Polly-ACC.
134 # Polly-ACC requires the NVPTX target to be present in the executable it is linked to
155 # If Polly-ACC is enabled, the NVPTX target is also expected to reside in the
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.td | 101 // ACC - One of the 8 512-bit VSX accumulators.
102 class ACC<bits<3> num, string n, list<Register> subregs> : PPCReg<n> {
418 def ACC0 : ACC<0, "acc0", [VSRp0, VSRp1]>, DwarfRegNum<[0, 0]>;
419 def ACC1 : ACC<1, "acc1", [VSRp2, VSRp3]>, DwarfRegNum<[0, 0]>;
420 def ACC2 : ACC<2, "acc2", [VSRp4, VSRp5]>, DwarfRegNum<[0, 0]>;
421 def ACC3 : ACC<3, "acc3", [VSRp6, VSRp7]>, DwarfRegNum<[0, 0]>;
422 def ACC4 : ACC<4, "acc4", [VSRp8, VSRp9]>, DwarfRegNum<[0, 0]>;
423 def ACC5 : ACC<5, "acc5", [VSRp10, VSRp11]>, DwarfRegNum<[0, 0]>;
424 def ACC6 : ACC<6, "acc6", [VSRp12, VSRp13]>, DwarfRegNum<[0, 0]>;
425 def ACC7 : ACC<7, "acc7", [VSRp14, VSRp15]>, DwarfRegNum<[0, 0]>;
|
| /external/rust/crates/ring/src/arithmetic/ |
| D | bigint.rs | 944 const ACC: usize = 0; // `tmp` in OpenSSL in elem_exp_consttime() constant
945 const BASE: usize = ACC + 1; // `am` in OpenSSL in elem_exp_consttime()
957 entry(state, ACC, num_limbs).as_ptr(), in elem_exp_consttime()
971 entry_mut(state, ACC, num_limbs).as_mut_ptr(), in elem_exp_consttime()
981 assert_eq!(ACC, 0); in elem_exp_consttime()
1001 entry_mut(state, ACC, num_limbs).as_mut_ptr(), in elem_exp_consttime()
1026 entry_mut(state, ACC, num_limbs).as_mut_ptr(), in elem_exp_consttime()
1027 entry_mut(state, ACC, num_limbs).as_mut_ptr(), in elem_exp_consttime()
1039 let acc = entry_mut(state, ACC, num_limbs); in elem_exp_consttime()
1046 entry_mut(state, ACC, num_limbs).copy_from_slice(&base.limbs); in elem_exp_consttime()
[all …]
|