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Searched refs:ARM_INS_LDR (Results 1 – 7 of 7) sorted by relevance

/external/capstone/arch/ARM/
DARMMappingInsn.inc839 ARM_LDR_POST_IMM, ARM_INS_LDR,
845 ARM_LDR_POST_REG, ARM_INS_LDR,
851 ARM_LDR_PRE_IMM, ARM_INS_LDR,
857 ARM_LDR_PRE_REG, ARM_INS_LDR,
863 ARM_LDRcp, ARM_INS_LDR,
869 ARM_LDRi12, ARM_INS_LDR,
875 ARM_LDRrs, ARM_INS_LDR,
11351 ARM_t2LDR_POST, ARM_INS_LDR,
11357 ARM_t2LDR_PRE, ARM_INS_LDR,
11363 ARM_t2LDRi12, ARM_INS_LDR,
[all …]
DARMMappingInsnOp.inc421 { /* ARM_LDR_POST_IMM, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
424 { /* ARM_LDR_POST_REG, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
427 { /* ARM_LDR_PRE_IMM, ARM_INS_LDR: ldr${p} $rt, $addr! */
430 { /* ARM_LDR_PRE_REG, ARM_INS_LDR: ldr${p} $rt, $addr! */
433 { /* ARM_LDRcp, ARM_INS_LDR: ldr${p} $rt, $addr */
436 { /* ARM_LDRi12, ARM_INS_LDR: ldr${p} $rt, $addr */
439 { /* ARM_LDRrs, ARM_INS_LDR: ldr${p} $rt, $shift */
5677 { /* ARM_t2LDR_POST, ARM_INS_LDR: ldr${p} $rt, $rn$offset */
5680 { /* ARM_t2LDR_PRE, ARM_INS_LDR: ldr${p} $rt, $addr! */
5683 { /* ARM_t2LDRi12, ARM_INS_LDR: ldr${p}.w $rt, $addr */
[all …]
DARMMapping.c392 { ARM_INS_LDR, "ldr" },
/external/capstone/bindings/python/capstone/
Darm_const.py377 ARM_INS_LDR = 75 variable
/external/capstone/bindings/java/capstone/
DArm_const.java380 public static final int ARM_INS_LDR = 75; field in Arm_const
/external/capstone/include/capstone/
Darm.h520 ARM_INS_LDR, enumerator
/external/capstone/arch/AArch64/
DARMMappingInsnOp.inc421 { /* ARM_LDR_POST_IMM, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
424 { /* ARM_LDR_POST_REG, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
427 { /* ARM_LDR_PRE_IMM, ARM_INS_LDR: ldr${p} $rt, $addr! */
430 { /* ARM_LDR_PRE_REG, ARM_INS_LDR: ldr${p} $rt, $addr! */
433 { /* ARM_LDRcp, ARM_INS_LDR: ldr${p} $rt, $addr */
436 { /* ARM_LDRi12, ARM_INS_LDR: ldr${p} $rt, $addr */
439 { /* ARM_LDRrs, ARM_INS_LDR: ldr${p} $rt, $shift */
5677 { /* ARM_t2LDR_POST, ARM_INS_LDR: ldr${p} $rt, $rn$offset */
5680 { /* ARM_t2LDR_PRE, ARM_INS_LDR: ldr${p} $rt, $addr! */
5683 { /* ARM_t2LDRi12, ARM_INS_LDR: ldr${p}.w $rt, $addr */
[all …]