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Searched refs:COREx_PGC_PCR (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/
Dgpc.c57 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(0) + 0x4, 0x81); in imx_gpc_init()
58 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(1) + 0x4, 0x81); in imx_gpc_init()
59 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(2) + 0x4, 0x81); in imx_gpc_init()
60 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(3) + 0x4, 0x81); in imx_gpc_init()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mn/
Dgpc.c59 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(0) + 0x4, 0x401); in imx_gpc_init()
60 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(1) + 0x4, 0x401); in imx_gpc_init()
61 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(2) + 0x4, 0x401); in imx_gpc_init()
62 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(3) + 0x4, 0x401); in imx_gpc_init()
/external/arm-trusted-firmware/plat/imx/imx8m/
Dgpc_common.c52 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_pwr_off()
67 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_pwr_on()
76 mmio_clrbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_pwr_on()
90 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_lpm()
96 mmio_clrbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_lpm()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/
Dgpc.c31 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_pwr_off()
44 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_lpm()
50 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1); in imx_set_cpu_lpm()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mp/
Dgpc.c338 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(0) + 0x4, 0x401); in imx_gpc_init()
339 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(1) + 0x4, 0x401); in imx_gpc_init()
340 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(2) + 0x4, 0x401); in imx_gpc_init()
341 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(3) + 0x4, 0x401); in imx_gpc_init()
/external/arm-trusted-firmware/plat/imx/imx8m/include/
Dgpc.h21 #define COREx_PGC_PCR(core_id) (0x800 + (core_id) * 0x40) macro