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Searched refs:CR6 (Results 1 – 25 of 50) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …IZ ES FPSW FS GS IP RIP RIZ SS BND0 BND1 BND2 BND3 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR…
/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.h48 Reg = PPC::CR6; in getCRFromCRBit()
DPPCInstrAltivec.td780 let Defs = [CR6];
1228 let Defs = [CR6];
1344 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set.
1349 let Defs = [CR6];
1357 let Defs = [CR6];
1370 let Defs = [CR6] in
1375 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set.
1380 let Defs = [CR6];
1387 let Defs = [CR6];
DPPCRegisterInfo.td200 def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
344 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6,
DPPCInstr64Bit.td979 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
988 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1011 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1020 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.h48 Reg = PPC::CR6; in getCRFromCRBit()
DPPCRegisterInfo.td213 def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
368 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6,
DPPCInstrAltivec.td791 let Defs = [CR6];
1520 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set.
1525 let Defs = [CR6];
1533 let Defs = [CR6];
1546 let Defs = [CR6] in
1551 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set.
1556 let Defs = [CR6];
1563 let Defs = [CR6];
DPPCInstr64Bit.td1139 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1148 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1171 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1180 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.h48 Reg = PPC::CR6; in getCRFromCRBit()
DPPCInstrAltivec.td791 let Defs = [CR6];
1556 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set.
1561 let Defs = [CR6];
1569 let Defs = [CR6];
1582 let Defs = [CR6] in
1587 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set.
1592 let Defs = [CR6];
1599 let Defs = [CR6];
DPPCRegisterInfo.td242 def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
394 (add CR0, CR1, CR5, CR6,
DPPCInstr64Bit.td1288 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1290 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1295 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1297 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1304 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1327 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.h187 PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7}
DPPCInstPrinter.cpp437 case PPC::CR6: RegNo = 6; break; in printcrbitm()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenRegisterInfo.inc38 CR6 = 18,
1396 PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, PPC::CR2, PPC::CR3, PPC::CR4,
1818 { 74U, PPC::CR6 },
1963 { 74U, PPC::CR6 },
2106 { 74U, PPC::CR6 },
2251 { 74U, PPC::CR6 },
2335 { PPC::CR6, 74U },
2610 { PPC::CR6, 74U },
2888 { PPC::CR6, 74U },
3163 { PPC::CR6, 74U },
[all …]
/external/clang/lib/CodeGen/
DCGExprScalar.cpp2846 enum { CR6_EQ=0, CR6_EQ_REV, CR6_LT, CR6_LT_REV } CR6; in EmitCompare() local
2861 CR6 = CR6_LT; in EmitCompare()
2865 CR6 = CR6_EQ; in EmitCompare()
2869 CR6 = CR6_LT; in EmitCompare()
2874 CR6 = CR6_LT; in EmitCompare()
2879 CR6 = CR6_LT; in EmitCompare()
2884 CR6 = CR6_EQ; in EmitCompare()
2890 CR6 = CR6_LT; in EmitCompare()
2894 CR6 = CR6_EQ; in EmitCompare()
2901 Value *CR6Param = Builder.getInt32(CR6); in EmitCompare()
/external/llvm/lib/Target/PowerPC/InstPrinter/
DPPCInstPrinter.cpp367 case PPC::CR6: RegNo = 6; break; in printcrbitm()
/external/llvm-project/clang/lib/CodeGen/
DCGExprScalar.cpp3924 enum { CR6_EQ=0, CR6_EQ_REV, CR6_LT, CR6_LT_REV } CR6; in EmitCompare() local
3938 CR6 = CR6_LT; in EmitCompare()
3942 CR6 = CR6_EQ; in EmitCompare()
3946 CR6 = CR6_LT; in EmitCompare()
3951 CR6 = CR6_LT; in EmitCompare()
3956 CR6 = CR6_LT; in EmitCompare()
3961 CR6 = CR6_EQ; in EmitCompare()
3967 CR6 = CR6_LT; in EmitCompare()
3971 CR6 = CR6_EQ; in EmitCompare()
3978 Value *CR6Param = Builder.getInt32(CR6); in EmitCompare()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h369 ENTRY(CR6) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h372 ENTRY(CR6) \
/external/llvm-project/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h366 ENTRY(CR6) \
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h361 ENTRY(CR6) \
/external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCInstPrinter.cpp480 case PPC::CR6: RegNo = 6; break; in printcrbitm()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp67 PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7

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