/external/deqp-deps/SPIRV-Tools/source/opt/ |
D | folding_rules.cpp | 79 uint32_t ElementWidth(const analysis::Type* type) { in ElementWidth() function 81 return ElementWidth(vec_type->element_type()); in ElementWidth() 251 uint32_t width = ElementWidth(type); in ReciprocalFDiv() 336 uint32_t width = ElementWidth(type); in MergeNegateMulDivArithmetic() 394 uint32_t width = ElementWidth(type); in MergeNegateAddSubArithmetic() 619 uint32_t width = ElementWidth(type); in MergeMulMulArithmetic() 672 uint32_t width = ElementWidth(type); in MergeMulDivArithmetic() 745 uint32_t width = ElementWidth(type); in MergeMulNegateArithmetic() 784 uint32_t width = ElementWidth(type); in MergeDivDivArithmetic() 857 uint32_t width = ElementWidth(type); in MergeDivMulArithmetic() [all …]
|
/external/swiftshader/third_party/SPIRV-Tools/source/opt/ |
D | folding_rules.cpp | 79 uint32_t ElementWidth(const analysis::Type* type) { in ElementWidth() function 81 return ElementWidth(vec_type->element_type()); in ElementWidth() 251 uint32_t width = ElementWidth(type); in ReciprocalFDiv() 336 uint32_t width = ElementWidth(type); in MergeNegateMulDivArithmetic() 394 uint32_t width = ElementWidth(type); in MergeNegateAddSubArithmetic() 619 uint32_t width = ElementWidth(type); in MergeMulMulArithmetic() 672 uint32_t width = ElementWidth(type); in MergeMulDivArithmetic() 745 uint32_t width = ElementWidth(type); in MergeMulNegateArithmetic() 784 uint32_t width = ElementWidth(type); in MergeDivDivArithmetic() 857 uint32_t width = ElementWidth(type); in MergeDivMulArithmetic() [all …]
|
/external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 347 int ElementWidth; member 374 unsigned ElementWidth; member 1106 template <int ElementWidth, unsigned Class> 1111 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth() 1117 template <int ElementWidth, unsigned Class> 1122 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth() 1128 template <int ElementWidth, unsigned Class, 1132 auto VectorMatch = isSVEDataVectorRegOfWidth<ElementWidth, Class>(); in isSVEDataVectorRegWithShiftExtend() 1212 unsigned ElementWidth> 1220 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList() [all …]
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 313 int ElementWidth; member 340 unsigned ElementWidth; member 1065 template <int ElementWidth, unsigned Class> 1070 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth() 1076 template <int ElementWidth, unsigned Class> 1081 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth() 1087 template <int ElementWidth, unsigned Class, 1091 auto VectorMatch = isSVEDataVectorRegOfWidth<ElementWidth, Class>(); in isSVEDataVectorRegWithShiftExtend() 1171 unsigned ElementWidth> 1179 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList() [all …]
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | MVETailPredication.cpp | 308 unsigned ElementWidth = VecTy->getScalarSizeInBits(); in IsPredicatedVectorLoop() local 312 if (Lanes * ElementWidth > MaxWidth || Lanes == MaxWidth) in IsPredicatedVectorLoop()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 217 template <int ElementWidth> 1839 template <int ElementWidth> 1844 if (ElementWidth == 8 && Shift) in DecodeImm8OptLsl()
|
/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 977 class ZPRVectorList<int ElementWidth, int NumRegs> : AsmOperandClass { 978 let Name = "SVEVectorList" # NumRegs # ElementWidth; 981 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
|
D | SVEInstrFormats.td | 158 class SVEShiftedImmOperand<int ElementWidth, string Infix, string Predicate> 160 let Name = "SVE" # Infix # "Imm" # ElementWidth; 177 class imm8_opt_lsl<int ElementWidth, string printType, 181 let DecoderMethod = "DecodeImm8OptLsl<" # ElementWidth # ">";
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 956 class ZPRVectorList<int ElementWidth, int NumRegs> : AsmOperandClass { 957 let Name = "SVEVectorList" # NumRegs # ElementWidth; 960 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
|
D | SVEInstrFormats.td | 150 class SVEShiftedImmOperand<int ElementWidth, string Infix, string Predicate> 152 let Name = "SVE" # Infix # "Imm" # ElementWidth; 169 class imm8_opt_lsl<int ElementWidth, string printType, 173 let DecoderMethod = "DecodeImm8OptLsl<" # ElementWidth # ">";
|
/external/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 220 template <int ElementWidth> 1875 template <int ElementWidth> 1880 if (ElementWidth == 8 && Shift) in DecodeImm8OptLsl()
|
/external/angle/src/libANGLE/renderer/d3d/d3d11/ |
D | Buffer11.cpp | 1395 bufferSRVDesc.Buffer.ElementWidth = static_cast<UINT>(mBufferSize) / dxgiFormatInfo.pixelBytes; in getSRVForFormat()
|
/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.cpp | 1933 RISCVVSEW ElementWidth = static_cast<RISCVVSEW>(Log2_32(SEW / 8)); in addVSetVL() local 1954 MIB.addImm(RISCVVType::encodeVTYPE(Multiplier, ElementWidth, in addVSetVL()
|
/external/llvm-project/clang/lib/AST/ |
D | ExprConstant.cpp | 7098 CharUnits ElementWidth = Info.Ctx.getTypeSizeInChars(Ty->getElementType()); in visit() local 7103 visitType(Ty->getElementType(), Offset + I * ElementWidth); in visit()
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 6205 unsigned ElementWidth = VT.getScalarType().getSizeInBits(); in visitSIGN_EXTEND() local 6208 DAG.getConstant(APInt::getAllOnesValue(ElementWidth), DL, VT); in visitSIGN_EXTEND()
|