/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonPseudo.td | 37 A2_combineii.Itinerary, TypeALU32_2op>, OpcodeHexagon; 47 rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 74 [(set I1:$dst, 1)], "", C2_orn.Itinerary, TypeCR>; 79 [(set I1:$dst, 0)], "", C2_andn.Itinerary, TypeCR>; 116 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 136 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 166 "call " # ExtStr # "$dst", [], "", J2_call.Itinerary, TypeJ>, 188 "callr $Rs", [], "", J2_callr.Itinerary, TypeJ>, OpcodeHexagon { 210 let Itinerary = itin; 213 def PS_call_nr : Call_nr<24, 0, 0, (ins s32_0Imm:$Ii), J2_call.Itinerary>; [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonPseudo.td | 37 A2_combineii.Itinerary, TypeALU32_2op>, OpcodeHexagon; 47 rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 74 [(set I1:$dst, 1)], "", C2_orn.Itinerary, TypeCR>; 79 [(set I1:$dst, 0)], "", C2_andn.Itinerary, TypeCR>; 116 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 136 [], "", rootInst.Itinerary, rootInst.Type>, OpcodeHexagon { 166 "call " # ExtStr # "$dst", [], "", J2_call.Itinerary, TypeJ>, 188 "callr $Rs", [], "", J2_callr.Itinerary, TypeJ>, OpcodeHexagon { 210 let Itinerary = itin; 213 def PS_call_nr : Call_nr<24, 0, 0, (ins s32_0Imm:$Ii), J2_call.Itinerary>; [all …]
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/external/llvm-project/llvm/utils/TableGen/ |
D | DFAPacketizerEmitter.cpp | 83 ResourceVector getResourcesForItinerary(Record *Itinerary); 178 DFAPacketizerEmitter::getResourcesForItinerary(Record *Itinerary) { in getResourcesForItinerary() argument 180 assert(Itinerary); in getResourcesForItinerary() 181 for (Record *StageDef : Itinerary->getValueAsListOfDefs("Stages")) { in getResourcesForItinerary() 195 for (Record *Itinerary : Itineraries) { in createScheduleClasses() 196 if (!Itinerary) { in createScheduleClasses() 200 ResourceVector Resources = getResourcesForItinerary(Itinerary); in createScheduleClasses()
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/external/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 63 InstrItinClass Itinerary = itin; 81 InstrItinClass Itinerary = itin; 98 InstrItinClass Itinerary = itin; 111 InstrItinClass Itinerary = itin; 126 InstrItinClass Itinerary = itin; 140 InstrItinClass Itinerary = itin; 150 InstrItinClass Itinerary = itin; 163 InstrItinClass Itinerary = itin;
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D | Mips32r6InstrInfo.td | 282 InstrItinClass Itinerary = itin; 297 InstrItinClass Itinerary = itin; 309 InstrItinClass Itinerary = itin; 322 InstrItinClass Itinerary = itin; 340 InstrItinClass Itinerary = II_BC; 351 InstrItinClass Itinerary = II_BCCC; 363 InstrItinClass Itinerary = II_BCCZC; 375 InstrItinClass Itinerary = II_BCCZC; 390 InstrItinClass Itinerary = II_BALC; 417 InstrItinClass Itinerary = II_BC1CCZ; [all …]
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D | MicroMips64r6InstrInfo.td | 103 InstrItinClass Itinerary = II_EXT; 137 InstrItinClass Itinerary = II_CLO; 147 InstrItinClass Itinerary = II_CLZ; 181 InstrItinClass Itinerary = Itin; 199 InstrItinClass Itinerary = Itin; 216 InstrItinClass Itinerary = NoItinerary; 232 InstrItinClass Itinerary = itin; 245 InstrItinClass Itinerary = itin; 274 InstrItinClass Itinerary = itin; 294 InstrItinClass Itinerary = II_LLD; [all …]
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D | MicroMipsDSPInstrInfo.td | 187 InstrItinClass Itinerary = itin; 223 InstrItinClass Itinerary = itin; 259 InstrItinClass Itinerary = itin; 290 InstrItinClass Itinerary = itin; 297 InstrItinClass Itinerary = itin; 343 InstrItinClass Itinerary = itin; 356 InstrItinClass Itinerary = NoItinerary; 365 InstrItinClass Itinerary = NoItinerary; 373 InstrItinClass Itinerary = NoItinerary; 388 InstrItinClass Itinerary = NoItinerary; [all …]
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D | MipsDSPInstrInfo.td | 266 InstrItinClass Itinerary = itin; 277 InstrItinClass Itinerary = itin; 288 InstrItinClass Itinerary = itin; 299 InstrItinClass Itinerary = itin; 310 InstrItinClass Itinerary = itin; 322 InstrItinClass Itinerary = itin; 333 InstrItinClass Itinerary = itin; 343 InstrItinClass Itinerary = itin; 354 InstrItinClass Itinerary = itin; 365 InstrItinClass Itinerary = itin; [all …]
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D | MicroMips32r6InstrInfo.td | 603 InstrItinClass Itinerary = II_RDHWR; 686 InstrItinClass Itinerary = Itin; 697 InstrItinClass Itinerary = Itin; 742 InstrItinClass Itinerary = Itin; 771 InstrItinClass Itinerary = II_LDC1; 783 InstrItinClass Itinerary = II_SDC1; 795 InstrItinClass Itinerary = NoItinerary; 809 InstrItinClass Itinerary = NoItinerary; 825 InstrItinClass Itinerary = Itin; 857 InstrItinClass Itinerary = Itin; [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 63 InstrItinClass Itinerary = itin; 82 InstrItinClass Itinerary = itin; 100 InstrItinClass Itinerary = itin; 116 InstrItinClass Itinerary = itin; 134 InstrItinClass Itinerary = itin; 149 InstrItinClass Itinerary = itin; 159 InstrItinClass Itinerary = itin; 173 InstrItinClass Itinerary = itin;
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D | Mips32r6InstrInfo.td | 218 InstrItinClass Itinerary = Itin; 321 InstrItinClass Itinerary = itin; 335 InstrItinClass Itinerary = itin; 347 InstrItinClass Itinerary = itin; 360 InstrItinClass Itinerary = itin; 378 InstrItinClass Itinerary = II_BC; 389 InstrItinClass Itinerary = II_BCCC; 401 InstrItinClass Itinerary = II_BCCZC; 413 InstrItinClass Itinerary = II_BCCZC; 428 InstrItinClass Itinerary = II_BALC; [all …]
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D | MicroMips32r6InstrInfo.td | 279 InstrItinClass Itinerary = II_BCCZC; 327 InstrItinClass Itinerary = II_BCCC; 358 InstrItinClass Itinerary = Itin; 401 InstrItinClass Itinerary = II_BITSWAP; 416 InstrItinClass Itinerary = Itin; 432 InstrItinClass Itinerary = Itin; 443 InstrItinClass Itinerary = Itin; 477 InstrItinClass Itinerary = Itin; 520 InstrItinClass Itinerary = Itin; 532 InstrItinClass Itinerary = Itin; [all …]
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D | MipsMTInstrInfo.td | 49 InstrItinClass Itinerary = Itin; 57 InstrItinClass Itinerary = II_MFTR; 65 InstrItinClass Itinerary = II_MTTR; 73 InstrItinClass Itinerary = II_FORK; 81 InstrItinClass Itinerary = II_YIELD;
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D | MipsDSPInstrInfo.td | 273 InstrItinClass Itinerary = itin; 284 InstrItinClass Itinerary = itin; 295 InstrItinClass Itinerary = itin; 306 InstrItinClass Itinerary = itin; 317 InstrItinClass Itinerary = itin; 329 InstrItinClass Itinerary = itin; 340 InstrItinClass Itinerary = itin; 350 InstrItinClass Itinerary = itin; 361 InstrItinClass Itinerary = itin; 372 InstrItinClass Itinerary = itin; [all …]
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D | MicroMipsDSPInstrInfo.td | 186 InstrItinClass Itinerary = itin; 222 InstrItinClass Itinerary = itin; 258 InstrItinClass Itinerary = itin; 289 InstrItinClass Itinerary = itin; 296 InstrItinClass Itinerary = itin; 342 InstrItinClass Itinerary = itin; 355 InstrItinClass Itinerary = NoItinerary; 364 InstrItinClass Itinerary = NoItinerary; 372 InstrItinClass Itinerary = NoItinerary; 387 InstrItinClass Itinerary = NoItinerary; [all …]
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/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 63 InstrItinClass Itinerary = itin; 82 InstrItinClass Itinerary = itin; 100 InstrItinClass Itinerary = itin; 116 InstrItinClass Itinerary = itin; 134 InstrItinClass Itinerary = itin; 149 InstrItinClass Itinerary = itin; 159 InstrItinClass Itinerary = itin; 173 InstrItinClass Itinerary = itin;
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D | Mips32r6InstrInfo.td | 218 InstrItinClass Itinerary = Itin; 321 InstrItinClass Itinerary = itin; 335 InstrItinClass Itinerary = itin; 347 InstrItinClass Itinerary = itin; 360 InstrItinClass Itinerary = itin; 378 InstrItinClass Itinerary = II_BC; 389 InstrItinClass Itinerary = II_BCCC; 401 InstrItinClass Itinerary = II_BCCZC; 413 InstrItinClass Itinerary = II_BCCZC; 428 InstrItinClass Itinerary = II_BALC; [all …]
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D | MicroMips32r6InstrInfo.td | 279 InstrItinClass Itinerary = II_BCCZC; 327 InstrItinClass Itinerary = II_BCCC; 358 InstrItinClass Itinerary = Itin; 401 InstrItinClass Itinerary = II_BITSWAP; 416 InstrItinClass Itinerary = Itin; 432 InstrItinClass Itinerary = Itin; 443 InstrItinClass Itinerary = Itin; 477 InstrItinClass Itinerary = Itin; 520 InstrItinClass Itinerary = Itin; 532 InstrItinClass Itinerary = Itin; [all …]
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D | MipsMTInstrInfo.td | 49 InstrItinClass Itinerary = Itin; 57 InstrItinClass Itinerary = II_MFTR; 65 InstrItinClass Itinerary = II_MTTR; 73 InstrItinClass Itinerary = II_FORK; 81 InstrItinClass Itinerary = II_YIELD;
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D | MipsDSPInstrInfo.td | 273 InstrItinClass Itinerary = itin; 284 InstrItinClass Itinerary = itin; 295 InstrItinClass Itinerary = itin; 306 InstrItinClass Itinerary = itin; 317 InstrItinClass Itinerary = itin; 329 InstrItinClass Itinerary = itin; 340 InstrItinClass Itinerary = itin; 350 InstrItinClass Itinerary = itin; 361 InstrItinClass Itinerary = itin; 372 InstrItinClass Itinerary = itin; [all …]
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D | MicroMipsDSPInstrInfo.td | 186 InstrItinClass Itinerary = itin; 222 InstrItinClass Itinerary = itin; 258 InstrItinClass Itinerary = itin; 289 InstrItinClass Itinerary = itin; 296 InstrItinClass Itinerary = itin; 342 InstrItinClass Itinerary = itin; 355 InstrItinClass Itinerary = NoItinerary; 364 InstrItinClass Itinerary = NoItinerary; 372 InstrItinClass Itinerary = NoItinerary; 387 InstrItinClass Itinerary = NoItinerary; [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfoV60.td | 80 let Itinerary = CVI_VM_VP_LDU, Type = TypeCVI_VM_VP_LDU, hasNewValue = 1 in { 87 let Itinerary = CVI_VM_LD, Type = TypeCVI_VM_LD, isCVLoad = 1, 103 let Itinerary = CVI_VM_TMP_LD, Type = TypeCVI_VM_TMP_LD, hasNewValue = 1 in { 150 let Itinerary = CVI_VM_STU, Type = TypeCVI_VM_STU in { 160 isPredicable = 1, Itinerary = CVI_VM_NEW_ST, Type = TypeCVI_VM_NEW_ST in 236 let Itinerary = CVI_VM_STU, Type = TypeCVI_VM_STU in { 290 isNVStore = 1, Type = TypeCVI_VM_NEW_ST, Itinerary = CVI_VM_NEW_ST in 363 let Itinerary = CVI_VM_VP_LDU, Type = TypeCVI_VM_VP_LDU in { 371 let isCVLoad = 1, Itinerary = CVI_VM_LD, Type = TypeCVI_VM_LD in { 385 let Itinerary = CVI_VM_TMP_LD, Type = TypeCVI_VM_TMP_LD in { [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 957 let Itinerary = VecALU; 964 let Itinerary = VecALU; 1035 let Itinerary = TransALU; 1041 let Itinerary = TransALU; 1047 let Itinerary = TransALU; 1053 let Itinerary = TransALU; 1059 let Itinerary = TransALU; 1069 let Itinerary = TransALU; 1078 let Itinerary = TransALU; 1083 let Itinerary = TransALU; [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 1029 let Itinerary = VecALU; 1036 let Itinerary = VecALU; 1107 let Itinerary = TransALU; 1113 let Itinerary = TransALU; 1119 let Itinerary = TransALU; 1125 let Itinerary = TransALU; 1131 let Itinerary = TransALU; 1141 let Itinerary = TransALU; 1149 let Itinerary = TransALU; 1154 let Itinerary = VecALU; [all …]
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 1029 let Itinerary = VecALU; 1036 let Itinerary = VecALU; 1107 let Itinerary = TransALU; 1113 let Itinerary = TransALU; 1119 let Itinerary = TransALU; 1125 let Itinerary = TransALU; 1131 let Itinerary = TransALU; 1141 let Itinerary = TransALU; 1149 let Itinerary = TransALU; 1154 let Itinerary = VecALU; [all …]
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