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/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td58 def : AT<"S1E1R", 0b000, 0b0111, 0b1000, 0b000>;
59 def : AT<"S1E2R", 0b100, 0b0111, 0b1000, 0b000>;
60 def : AT<"S1E3R", 0b110, 0b0111, 0b1000, 0b000>;
61 def : AT<"S1E1W", 0b000, 0b0111, 0b1000, 0b001>;
62 def : AT<"S1E2W", 0b100, 0b0111, 0b1000, 0b001>;
63 def : AT<"S1E3W", 0b110, 0b0111, 0b1000, 0b001>;
64 def : AT<"S1E0R", 0b000, 0b0111, 0b1000, 0b010>;
65 def : AT<"S1E0W", 0b000, 0b0111, 0b1000, 0b011>;
66 def : AT<"S12E1R", 0b100, 0b0111, 0b1000, 0b100>;
67 def : AT<"S12E1W", 0b100, 0b0111, 0b1000, 0b101>;
[all …]
DAArch64SVEInstrInfo.td417 …defm FABD_ZPmZ : sve_fp_2op_p_zds<0b1000, "fabd", "FABD_ZPZZ", int_aarch64_sve_fabd, Destructive…
648 defm ORR_PPzPP : sve_int_pred_log<0b1000, "orr", int_aarch64_sve_orr_z, or>;
690 defm LD1SH_D_IMM : sve_mem_cld_si<0b1000, "ld1sh", Z_d, ZPR64>;
736 defm LD1SH_D : sve_mem_cld_ss<0b1000, "ld1sh", Z_d, ZPR64, GPR64NoXZRshifted16>;
754 defm LDNF1SH_D_IMM : sve_mem_cldnf_si<0b1000, "ldnf1sh", Z_d, ZPR64>;
772 defm LDFF1SH_D : sve_mem_cldff_ss<0b1000, "ldff1sh", Z_d, ZPR64, GPR64shifted16>;
854 …defm GLD1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1000, "ld1sw", uimm5s4, AArch64ld1s_gather_imm_z,…
871 …defm GLD1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1000, "ld1sw", AArch64ld1s_gather_z, nxv2i…
884 …defm GLD1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1000, "ld1sw", AArch64ld1s_gather_scaled_z, …
901 …defm GLD1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1000, "ld1sw", AArch64ld1s_gather_sxtw_z, A…
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td53 def : AT<"S1E1R", 0b000, 0b0111, 0b1000, 0b000>;
54 def : AT<"S1E2R", 0b100, 0b0111, 0b1000, 0b000>;
55 def : AT<"S1E3R", 0b110, 0b0111, 0b1000, 0b000>;
56 def : AT<"S1E1W", 0b000, 0b0111, 0b1000, 0b001>;
57 def : AT<"S1E2W", 0b100, 0b0111, 0b1000, 0b001>;
58 def : AT<"S1E3W", 0b110, 0b0111, 0b1000, 0b001>;
59 def : AT<"S1E0R", 0b000, 0b0111, 0b1000, 0b010>;
60 def : AT<"S1E0W", 0b000, 0b0111, 0b1000, 0b011>;
61 def : AT<"S12E1R", 0b100, 0b0111, 0b1000, 0b100>;
62 def : AT<"S12E1W", 0b100, 0b0111, 0b1000, 0b101>;
[all …]
DAArch64SVEInstrInfo.td201 defm FABD_ZPmZ : sve_fp_2op_p_zds<0b1000, "fabd", int_aarch64_sve_fabd>;
320 defm ORR_PPzPP : sve_int_pred_log<0b1000, "orr", int_aarch64_sve_orr_z>;
350 defm LD1SH_D_IMM : sve_mem_cld_si<0b1000, "ld1sh", Z_d, ZPR64>;
396 defm LD1SH_D : sve_mem_cld_ss<0b1000, "ld1sh", Z_d, ZPR64, GPR64NoXZRshifted16>;
414 defm LDNF1SH_D_IMM : sve_mem_cldnf_si<0b1000, "ldnf1sh", Z_d, ZPR64>;
432 defm LDFF1SH_D : sve_mem_cldff_ss<0b1000, "ldff1sh", Z_d, ZPR64, GPR64shifted16>;
514 …defm GLD1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1000, "ld1sw", uimm5s4, AArch64ld1s_gather_imm, …
531 …defm GLD1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1000, "ld1sw", AArch64ld1s_gather, nxv2i32>;
544 …defm GLD1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1000, "ld1sw", AArch64ld1s_gather_scaled, ZP…
561 …defm GLD1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1000, "ld1sw", AArch64ld1s_gather_sxtw, AAr…
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td35 def : AT<"S1E1R", 0b01, 0b000, 0b0111, 0b1000, 0b000>;
36 def : AT<"S1E2R", 0b01, 0b100, 0b0111, 0b1000, 0b000>;
37 def : AT<"S1E3R", 0b01, 0b110, 0b0111, 0b1000, 0b000>;
38 def : AT<"S1E1W", 0b01, 0b000, 0b0111, 0b1000, 0b001>;
39 def : AT<"S1E2W", 0b01, 0b100, 0b0111, 0b1000, 0b001>;
40 def : AT<"S1E3W", 0b01, 0b110, 0b0111, 0b1000, 0b001>;
41 def : AT<"S1E0R", 0b01, 0b000, 0b0111, 0b1000, 0b010>;
42 def : AT<"S1E0W", 0b01, 0b000, 0b0111, 0b1000, 0b011>;
43 def : AT<"S12E1R", 0b01, 0b100, 0b0111, 0b1000, 0b100>;
44 def : AT<"S12E1W", 0b01, 0b100, 0b0111, 0b1000, 0b101>;
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonInstrEnc.td315 class V6_vL32b_nt_ai_enc : Enc_COPROC_VMEM_vL32_b_ai<0b1000>;
334 class V6_vL32b_nt_ai_128B_enc : Enc_COPROC_VMEM_vL32_b_ai_128B<0b1000>;
362 class V6_vS32b_nt_ai_enc : Enc_COPROC_VMEM_vS32_b_ai_64B<0b1000>;
366 class V6_vS32b_nt_ai_128B_enc : Enc_COPROC_VMEM_vS32_b_ai_128B<0b1000>;
493 class V6_vL32b_nt_pi_enc : Enc_COPROC_VMEM_vL32_b_pi<0b1000>;
512 class V6_vL32b_nt_pi_128B_enc : Enc_COPROC_VMEM_vL32_b_pi_128B<0b1000>;
532 class V6_vS32b_nt_pi_enc : Enc_COPROC_VMEM_vS32_b_pi<0b1000>;
547 class V6_vS32b_nt_pi_128B_enc : Enc_COPROC_VMEM_vS32_b_pi_128B<0b1000>;
691 class V6_vS32b_nt_ppu_enc : Enc_COPROC_VMEM_vS32_b_ppu<0b1000>;
827 class V6_vasrhbrndsat_enc : Enc_COPROC_VX_4op_r<0b1000>;
[all …]
DHexagonInstrInfoV5.td134 let IClass = 0b1000;
539 let IClass = 0b1000;
558 let IClass = 0b1000;
577 let IClass = 0b1000;
579 let Inst{27-24} = 0b1000;
597 let IClass = 0b1000;
677 let IClass = 0b1000;
813 let IClass = 0b1000;
842 let IClass = 0b1000;
870 let IClass = 0b1000;
DHexagonInstrInfo.td637 let Inst{27-24} = 0b1000;
1402 let IClass = 0b1000;
1416 let IClass = 0b1000;
1728 defm loadrb: LD_Idxd <"memb", "LDrib", IntRegs, s11_0Ext, u6_0Ext, 0b1000>;
1922 defm loadrb : LD_PostInc <"memb", "LDrib", IntRegs, s4_0Imm, 0b1000>;
2013 def L2_loadrb_pr : T_load_pr <"memb", IntRegs, 0b1000, ByteAccess>;
2074 def L2_loadrb_pcr : T_load_pcr <"memb", IntRegs, 0b1000>;
2158 def L2_loadrb_pci : T_load_pci <"memb", IntRegs, s4_0Imm, 0b1000>;
2265 def L2_loadrb_pbr : T_load_pbr <"memb", IntRegs, ByteAccess, 0b1000>;
2571 let Inst{27-24} = 0b1000;
[all …]
DHexagonInstrInfoV3.td209 let Inst{27-24} = 0b1000;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrAliases.td268 defm : int_cond_alias<"a", 0b1000>;
286 defm : int_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
293 defm : fp_cond_alias<"a", 0b1000>;
311 defm : fp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
316 defm : cp_cond_alias<"a", 0b1000>;
332 let EmitPriority = 0 in defm : cp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
/external/llvm/lib/Target/Sparc/
DSparcInstrAliases.td269 defm : int_cond_alias<"a", 0b1000>;
287 defm : int_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
294 defm : fp_cond_alias<"a", 0b1000>;
312 defm : fp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
317 defm : cp_cond_alias<"a", 0b1000>;
333 let EmitPriority = 0 in defm : cp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcInstrAliases.td268 defm : int_cond_alias<"a", 0b1000>;
286 defm : int_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
293 defm : fp_cond_alias<"a", 0b1000>;
311 defm : fp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
316 defm : cp_cond_alias<"a", 0b1000>;
332 let EmitPriority = 0 in defm : cp_cond_alias<"", 0b1000>; // same as a; gnu asm, not in manual
/external/deqp/external/vulkancts/modules/vulkan/conditional_rendering/
DvktConditionalDrawAndClearTests.cpp135 b1000 = 0x8, enumerator
147 { false, false, false, b0001, b1000, b1111, false, NONE },
148 { true, false, false, b0001, b1000, b0000, false, NONE },
154 { true, true, true, b0010, b1000, b0001, false, NONE },
156 { true, true, true, b0010, b1000, b1111, true, FILL },
159 { true, true, true, b0010, b1000, b1111, true, COPY },
/external/mesa3d/src/gallium/drivers/panfrost/
Dpan_blending.c253 mask |= 0b1000; /* A */ in panfrost_blend_factor_constant_mask()
/external/llvm-project/llvm/lib/Target/ARM/Utils/
DARMBaseInfo.h106 T = 0b1000,
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h60 OneInput = 0b1000,
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td910 def H : AHuInp<0b11101, 0b11, 0b1000, 0b01, 0,
917 def S : ASuInp<0b11101, 0b11, 0b1000, 0b01, 0,
924 def D : ADuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1254 def VSITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1269 def VSITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1286 def VSITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
1293 def VUITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1308 def VUITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1325 def VUITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
2084 def VMRS_FPEXC : MovFromVFP<0b1000 /* fpexc */, (outs GPR:$Rt), (ins),
[all …]
DARMInstrNEON.td831 def VLD2d8 : VLD2<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VLD2,
833 def VLD2d16 : VLD2<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VLD2,
835 def VLD2d32 : VLD2<0b1000, {1,0,?,?}, "32", VecListDPair, IIC_VLD2,
869 defm VLD2d8wb : VLD2WB<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VLD2u,
871 defm VLD2d16wb : VLD2WB<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VLD2u,
873 defm VLD2d32wb : VLD2WB<0b1000, {1,0,?,?}, "32", VecListDPair, IIC_VLD2u,
1088 def VLD1LNd32 : VLD1LN32<0b1000, {?,0,?,?}, "32", v2i32, load> {
1123 def VLD1LNd32_UPD : VLD1LNWB<0b1000, {?,0,?,?}, "32"> {
1818 def VST2d8 : VST2<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VST2,
1820 def VST2d16 : VST2<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VST2,
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td1056 def H : AHuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1063 def S : ASuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1070 def D : ADuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1435 def VSITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1451 def VSITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1469 def VSITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
1481 def VUITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1497 def VUITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1515 def VUITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
2448 def VMRS_FPEXC : MovFromVFP<0b1000 /* fpexc */, (outs GPRnopc:$Rt), (ins),
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td987 def H : AHuInp<0b11101, 0b11, 0b1000, 0b01, 0,
994 def S : ASuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1001 def D : ADuInp<0b11101, 0b11, 0b1000, 0b01, 0,
1357 def VSITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1373 def VSITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1391 def VSITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
1403 def VUITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011,
1419 def VUITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010,
1437 def VUITOH : AVConv1IHs_Encode<0b11101, 0b11, 0b1000, 0b1001,
2352 def VMRS_FPEXC : MovFromVFP<0b1000 /* fpexc */, (outs GPRnopc:$Rt), (ins),
[all …]
DARMInstrNEON.td812 def VLD2d8 : VLD2<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VLD2,
814 def VLD2d16 : VLD2<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VLD2,
816 def VLD2d32 : VLD2<0b1000, {1,0,?,?}, "32", VecListDPair, IIC_VLD2,
850 defm VLD2d8wb : VLD2WB<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VLD2u,
852 defm VLD2d16wb : VLD2WB<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VLD2u,
854 defm VLD2d32wb : VLD2WB<0b1000, {1,0,?,?}, "32", VecListDPair, IIC_VLD2u,
1071 def VLD1LNd32 : VLD1LN32<0b1000, {?,0,?,?}, "32", v2i32, load> {
1130 def VLD1LNd32_UPD : VLD1LNWB<0b1000, {?,0,?,?}, "32"> {
1877 def VST2d8 : VST2<0b1000, {0,0,?,?}, "8", VecListDPair, IIC_VST2,
1879 def VST2d16 : VST2<0b1000, {0,1,?,?}, "16", VecListDPair, IIC_VST2,
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td517 def C_JR : RVInst16CR<0b1000, 0b10, (outs), (ins GPRNoX0:$rs1),
528 def C_MV : RVInst16CR<0b1000, 0b10, (outs GPRNoX0:$rs1), (ins GPRNoX0:$rs2),
637 def C_MV_HINT : RVInst16CR<0b1000, 0b10, (outs GPRX0:$rs1), (ins GPRNoX0:$rs2),
DRISCVInstrFormatsV.td65 def LSWidth128 : RISCVWidth<0b1000>;
DRISCVInstrFormats.td59 def OneInput : RISCVVConstraint<0b1000>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td513 def C_JR : RVInst16CR<0b1000, 0b10, (outs), (ins GPRNoX0:$rs1),
523 def C_MV : RVInst16CR<0b1000, 0b10, (outs GPRNoX0:$rs1), (ins GPRNoX0:$rs2),
632 def C_MV_HINT : RVInst16CR<0b1000, 0b10, (outs GPRX0:$rs1), (ins GPRNoX0:$rs2),

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