/external/llvm-project/llvm/test/MC/Mips/mips32/ |
D | invalid-mips64.s | 10 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not c… 11 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not c…
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/external/llvm/test/MC/Mips/mips32/ |
D | invalid-mips64.s | 10 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not c… 11 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not c…
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/external/compiler-rt/lib/builtins/ |
D | negdf2.c | 17 ARM_EABI_FNALIAS(dneg, negdf2) in ARM_EABI_FNALIAS() argument
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 80 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 81 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/ |
D | macro-ddiv.s | 99 # CHECK-NOTRAP: dneg $4, $4 # encoding: [0x00,0x04,0x20,0x2e] 100 # CHECK-TRAP: dneg $4, $4 # encoding: [0x00,0x04,0x20,0x2e] 255 # CHECK-NOTRAP: dneg $4, $5 # encoding: [0x00,0x05,0x20,0x2e] 256 # CHECK-TRAP: dneg $4, $5 # encoding: [0x00,0x05,0x20,0x2e]
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 84 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 85 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 91 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 92 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 84 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 85 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 93 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 94 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 93 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 94 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 93 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 94 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips2/ |
D | invalid-mips3.s | 25 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea… 26 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips3.s | 25 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea… 26 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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/external/llvm-project/llvm/test/MC/Mips/mips3/ |
D | valid.s | 92 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 93 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips1/ |
D | invalid-mips3.s | 29 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 30 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | valid.s | 258 dneg $7, $15 # CHECK: dneg $7, $15 # encoding: [0x59,0xe0,0x39,0x90] 259 dneg $10 # CHECK: dneg $10, $10 # encoding: [0x59,0x40,0x51,0x90]
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips3.s | 29 …dneg $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 30 …dneg $2,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm-project/llvm/test/MC/Mips/mips4/ |
D | valid.s | 124 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 125 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips5/ |
D | valid.s | 124 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 125 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips64/ |
D | valid.s | 131 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 132 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 139 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 140 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 146 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 147 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm-project/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 139 …dneg $2 # CHECK: dneg $2, $2 # encoding: [0x00,0x02,0x10,0x… 140 …dneg $2,$3 # CHECK: dneg $2, $3 # encoding: [0x00,0x03,0x10,0x…
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/external/llvm/test/CodeGen/Mips/msa/ |
D | basic_operations.ll | 752 ; N64-DAG: dneg [[NIDX:\$[0-9]+]], [[IDX]] 785 ; N64-DAG: dneg [[NIDX:\$[0-9]+]], [[BIDX]] 815 ; N64-DAG: dneg [[NIDX:\$[0-9]+]], [[BIDX]] 861 ; N64-DAG: dneg [[NIDX:\$[0-9]+]], [[BIDX]]
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/external/llvm/lib/Target/Mips/ |
D | MicroMips64r6InstrInfo.td | 502 def : MipsInstAlias<"dneg $rt, $rs", 505 def : MipsInstAlias<"dneg $rt",
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