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Searched refs:enable_sgpr_private_segment_size (Results 1 – 13 of 13) sorted by relevance

/external/llvm/test/MC/AMDGPU/
Dhsa.s78 enable_sgpr_private_segment_size = 1 define
/external/llvm-project/llvm/test/MC/AMDGPU/
Dhsa.s97 enable_sgpr_private_segment_size = 1 define
Dhsa-gfx10.s100 enable_sgpr_private_segment_size = 1 define
/external/llvm/test/CodeGen/AMDGPU/
Dlarge-alloca-compute.ll35 ; GCNHSA: enable_sgpr_private_segment_size = 0
Dllvm.amdgcn.workgroup.id.ll83 ; HSA: enable_sgpr_private_segment_size = 0
/external/llvm/lib/Target/AMDGPU/Utils/
DAMDKernelCodeTInfo.h130 CODEPROP(enable_sgpr_private_segment_size,
/external/llvm-project/llvm/lib/Target/AMDGPU/Utils/
DAMDKernelCodeTInfo.h108 CODEPROP(enable_sgpr_private_segment_size, ENABLE_SGPR_PRIVATE_SEGMENT_SIZE),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDKernelCodeTInfo.h108 CODEPROP(enable_sgpr_private_segment_size, ENABLE_SGPR_PRIVATE_SEGMENT_SIZE),
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dlarge-alloca-compute.ll38 ; GCNHSA: enable_sgpr_private_segment_size = 0
Dllvm.amdgcn.workgroup.id.ll83 ; CO-V2: enable_sgpr_private_segment_size = 0
Dindirect-call.ll46 ; GCN-NEXT: enable_sgpr_private_segment_size = 0
142 ; GCN-NEXT: enable_sgpr_private_segment_size = 0
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dllvm.amdgcn.workgroup.id.ll83 ; CO-V2: enable_sgpr_private_segment_size = 0
Dextractelement.ll1665 ; GPRIDX-NEXT: enable_sgpr_private_segment_size = 0
1756 ; MOVREL-NEXT: enable_sgpr_private_segment_size = 0
2179 ; GPRIDX-NEXT: enable_sgpr_private_segment_size = 0
2263 ; MOVREL-NEXT: enable_sgpr_private_segment_size = 0
2354 ; GPRIDX-NEXT: enable_sgpr_private_segment_size = 0
2441 ; MOVREL-NEXT: enable_sgpr_private_segment_size = 0