Searched refs:mss_pm_crtl (Results 1 – 2 of 2) sorted by relevance
46 static int mss_check_image_ready(volatile struct mss_pm_ctrl_block *mss_pm_crtl) in mss_check_image_ready() argument51 while ((mss_pm_crtl->handshake != MSS_ACKNOWLEDGMENT) && in mss_check_image_ready()55 if (mss_pm_crtl->handshake != MSS_ACKNOWLEDGMENT) in mss_check_image_ready()58 mss_pm_crtl->handshake = HOST_ACKNOWLEDGMENT; in mss_check_image_ready()131 volatile struct mss_pm_ctrl_block *mss_pm_crtl; in mss_ap_load_image() local135 mss_pm_crtl = (struct mss_pm_ctrl_block *)MSS_SRAM_PM_CONTROL_BASE; in mss_ap_load_image()136 mss_pm_crtl->ipc_version = MV_PM_FW_IPC_VERSION; in mss_ap_load_image()137 mss_pm_crtl->num_of_clusters = PLAT_MARVELL_CLUSTER_COUNT; in mss_ap_load_image()138 mss_pm_crtl->num_of_cores_per_cluster = in mss_ap_load_image()140 mss_pm_crtl->num_of_cores = PLAT_MARVELL_CLUSTER_COUNT * in mss_ap_load_image()[all …]
56 struct mss_pm_ctrl_block *mss_pm_crtl = in marvell_bl31_mss_init() local60 if (mss_pm_crtl->handshake != HOST_ACKNOWLEDGMENT) { in marvell_bl31_mss_init()70 if (mss_pm_crtl->ipc_state == IPC_INITIALIZED) in marvell_bl31_mss_init()71 mv_pm_ipc_init(mss_pm_crtl->ipc_base_address | MVEBU_REGS_BASE); in marvell_bl31_mss_init()