/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | shift-i128.ll | 194 ; GCN-NEXT: s_lshr_b64 s[10:11], s[4:5], s9 230 ; GCN-NEXT: s_lshr_b64 s[0:1], s[4:5], s8 233 ; GCN-NEXT: s_lshr_b64 s[2:3], s[6:7], s2 246 ; GCN-NEXT: s_lshr_b64 s[0:1], s[6:7], s8 272 ; GCN-NEXT: s_lshr_b64 s[6:7], s[4:5], s8 459 ; GCN-NEXT: s_lshr_b64 s[6:7], s[8:9], s6 480 ; GCN-NEXT: s_lshr_b64 s[6:7], s[12:13], s6 530 ; GCN-NEXT: s_lshr_b64 s[24:25], s[8:9], s16 534 ; GCN-NEXT: s_lshr_b64 s[4:5], s[10:11], s4 551 ; GCN-NEXT: s_lshr_b64 s[8:9], s[12:13], s20 [all …]
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D | llvm.round.f64.ll | 16 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s5 154 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s14 176 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s7 249 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s19 272 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s17 293 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s10 315 ; SI-NEXT: s_lshr_b64 s[0:1], s[2:3], s8 407 ; SI-NEXT: s_lshr_b64 s[2:3], s[4:5], s26 430 ; SI-NEXT: s_lshr_b64 s[2:3], s[4:5], s25 453 ; SI-NEXT: s_lshr_b64 s[2:3], s[4:5], s10 [all …]
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D | rotl.i64.ll | 7 ; BOTH-DAG: s_lshr_b64
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D | rotr.i64.ll | 6 ; BOTH-DAG: s_lshr_b64
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D | select64.ll | 7 ; GCN-NOT: s_lshr_b64
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D | fceil64.ll | 19 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP0]]
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D | ftrunc.f64.ll | 29 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
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D | extract_vector_elt-i16.ll | 115 ; GCN: s_lshr_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s
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D | extract_vector_elt-f16.ll | 87 ; GCN: s_lshr_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}
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D | extract_vector_dynelt.ll | 74 ; GCN: s_lshr_b64 s{{\[}}[[RL:[0-9]+]]:{{[0-9]+}}], s{{\[}}[[SL]]:[[SH]]], [[SEL]] 322 ; GCN: s_lshr_b64 s{{\[}}[[RL:[0-9]+]]:{{[0-9]+}}], s{{\[}}[[SL]]:[[SH]]], [[SEL]]
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D | extract_vector_elt-i8.ll | 186 ; VI: s_lshr_b64 s{{\[}}[[EXTRACT_LO:[0-9]+]]:{{[0-9]+\]}}, [[VEC8]], [[SCALED_IDX]]
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D | udiv64.ll | 717 ; GCN-NEXT: s_lshr_b64 s[2:3], s[2:3], 24 841 ; GCN-IR-NEXT: s_lshr_b64 s[2:3], s[2:3], 24 843 ; GCN-IR-NEXT: s_lshr_b64 s[6:7], s[0:1], 24
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/external/llvm/test/CodeGen/AMDGPU/ |
D | rotl.i64.ll | 7 ; BOTH-DAG: s_lshr_b64
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D | rotr.i64.ll | 6 ; BOTH-DAG: s_lshr_b64
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D | select64.ll | 7 ; CHECK-NOT: s_lshr_b64
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D | cgp-bitfield-extract.ll | 175 ; GCN: s_lshr_b64 s{{\[}}[[LO:[0-9]+]]:{{[0-9]+}}], s{{\[[0-9]+:[0-9]+\]}}, 30 179 ; GCN: s_lshr_b64 s{{\[}}[[LO:[0-9]+]]:{{[0-9]+}}], s{{\[[0-9]+:[0-9]+\]}}, 30
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D | fceil64.ll | 17 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
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D | ftrunc.f64.ll | 29 ; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP1]]
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/external/llvm/test/MC/AMDGPU/ |
D | sop2.s | 119 s_lshr_b64 s[2:3], s[4:5], s6 label
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | sop2.s | 161 s_lshr_b64 s[2:3], s[4:5], s6 label
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 60 # VI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 60 # VI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | lshr.ll | 1046 ; GCN-NEXT: s_lshr_b64 s[0:1], s[0:1], s2 1085 ; GCN-NEXT: s_lshr_b64 s[0:1], s[0:1], 31 1184 ; GCN-NEXT: s_lshr_b64 s[0:1], s[0:1], s4 1185 ; GCN-NEXT: s_lshr_b64 s[2:3], s[2:3], s6
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D | ssubsat.ll | 5295 ; GFX6-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5388 ; GFX8-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5481 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5571 ; GFX10-NEXT: s_lshr_b64 s[0:1], s[8:9], s12 6590 ; GFX6-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 6667 ; GFX6-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 6766 ; GFX8-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 6849 ; GFX8-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 6946 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 7029 ; GFX9-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 [all …]
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D | saddsat.ll | 5309 ; GFX6-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5402 ; GFX8-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5495 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[8:9], s2 5585 ; GFX10-NEXT: s_lshr_b64 s[0:1], s[8:9], s12 6604 ; GFX6-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 6681 ; GFX6-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 6780 ; GFX8-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 6863 ; GFX8-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 6960 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[16:17], s20 7043 ; GFX9-NEXT: s_lshr_b64 s[6:7], s[0:1], s20 [all …]
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