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Searched refs:v_mad_mix_f32 (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/llvm/test/MC/AMDGPU/
Dmad-mix.s5 v_mad_mix_f32 v0, v1, v2, v3 label
21 v_mad_mix_f32 v0, abs(v1), v2, v3 label
27 v_mad_mix_f32 v0, v1, abs(v2), v3 label
31 v_mad_mix_f32 v0, v1, v2, abs(v3) label
35 v_mad_mix_f32 v0, -v1, v2, v3 label
39 v_mad_mix_f32 v0, v1, -v2, v3 label
43 v_mad_mix_f32 v0, v1, v2, -v3 label
47 v_mad_mix_f32 v0, -abs(v1), v2, v3 label
51 v_mad_mix_f32 v0, v1, -abs(v2), v3 label
55 v_mad_mix_f32 v0, v1, v2, -abs(v3) label
[all …]
Dgfx10_unsupported.s755 v_mad_mix_f32 v0, -abs(v1), v2, v3 label
Dgfx8_unsupported.s1354 v_mad_mix_f32 v0, -abs(v1), v2, v3 label
Dgfx7_unsupported.s1915 v_mad_mix_f32 v0, -abs(v1), v2, v3 label
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dmad-mix.ll7 ; GFX900: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] ; encoding: [0x00,0x40,0xa0,0xd3,0x00,0x03…
20 ; GFX900: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] ; encoding
41 ; GFX900: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] ; encoding
57 ; GFX900: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
58 ; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]
76 ; GFX900: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,0,1] op_sel_hi:[1,1,1]
77 ; GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[0,1,1] op_sel_hi:[1,1,1]
100 ; GFX900-NEXT: v_mad_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1] ; encoding
118 ; GFX900: v_mad_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]
133 ; GFX900-NEXT: v_mad_mix_f32 v0, -|v0|, v1, v2 op_sel_hi:[1,1,1]
[all …]
Dfdot2.ll50 ; GFX900: v_mad_mix_f32
51 ; GFX900: v_mad_mix_f32
91 ; GFX900: v_mad_mix_f32
92 ; GFX900: v_mad_mix_f32
130 ; GFX900: v_mad_mix_f32
166 ; GFX900: v_mad_mix_f32
167 ; GFX900: v_mad_mix_f32
203 ; GFX900: v_mad_mix_f32
204 ; GFX900: v_mad_mix_f32
Dfpext-free.ll10 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}}
54 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}}
74 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v2, v2, v3, v4 op_sel_hi:[1,1,0]
97 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v2, v2, v3, v4 op_sel_hi:[1,1,0]
118 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v2, v2, v3, v4 op_sel_hi:[1,1,0]
219 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]{{$}}
239 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, -v1, v2, v0 op_sel_hi:[1,1,0]
259 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, -v1, -v2 op_sel_hi:[1,1,0]{{$}}
280 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, -v1, -v2 op_sel_hi:[1,1,0]{{$}}
300 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v2, v3, v4, -v2 op_sel_hi:[1,1,0]{{$}}
[all …]
Dmad-mix-lo.ll63 ; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp{{$}}
226 ; GFX9: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp
227 ; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp
247 ; GFX9-NEXT: v_mad_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp
248 ; GFX9-NEXT: v_mad_mix_f32 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp
249 ; GFX9-NEXT: v_mad_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp
268 ; GFX9: v_mad_mix_f32 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp
269 ; GFX9: v_mad_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp
270 ; GFX9: v_mad_mix_f32 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp
271 ; GFX9: v_mad_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp
Dmad-mix-hi.ll87 ; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp{{$}}
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dvop3_gfx9.txt192 # GFX9: v_mad_mix_f32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
195 # GFX9: v_mad_mix_f32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
198 # GFX9: v_mad_mix_f32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0xff,0x05,0x0e,0x04]
201 # GFX9: v_mad_mix_f32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x01,0x04,0x0e,0x04]
204 # GFX9: v_mad_mix_f32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x65,0x04,0x0e,0x04]
207 # GFX9: v_mad_mix_f32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x66,0x04,0x0…
210 # GFX9: v_mad_mix_f32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x67,0x04,0x0…
213 # GFX9: v_mad_mix_f32 v5, xnack_mask_hi, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x69,0x04,0x0e,0x0…
216 # GFX9: v_mad_mix_f32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x6a,0x04,0x0e,0x04]
219 # GFX9: v_mad_mix_f32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x6b,0x04,0x0e,0x04]
[all …]
Dmad_mix.txt4 # GFX900: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
Dgfx9_dasm_all.txt51753 # CHECK: v_mad_mix_f32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x…
51756 # CHECK: v_mad_mix_f32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x…
51759 # CHECK: v_mad_mix_f32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0xff,0x05,0x0e,0x…
51762 # CHECK: v_mad_mix_f32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x01,0x04,0x0e,0x…
51765 # CHECK: v_mad_mix_f32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x65,0x04,0x0e,0x…
51768 # CHECK: v_mad_mix_f32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x66,0x04,0x0e,…
51771 # CHECK: v_mad_mix_f32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x67,0x04,0x0e,…
51774 # CHECK: v_mad_mix_f32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x6a,0x04,0x0e,0x…
51777 # CHECK: v_mad_mix_f32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x6b,0x04,0x0e,0x…
51780 # CHECK: v_mad_mix_f32 v5, m0, v2, v3 ; encoding: [0x05,0x00,0xa0,0xd3,0x7c,0x04,0x0e,0x…
[all …]
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX900.rst43v_mad_mix_f32 :ref:`vdst<amdgpu_synid900_vdst32_0>`, :ref:`src0<amdgpu_synid9…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP3PInstructions.td149 def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile<VOP_F32_F16_F16_F16, VOP3_OPSEL>>;
DAMDGPU.td111 "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
/external/llvm-project/llvm/lib/Target/AMDGPU/
DVOP3PInstructions.td172 def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile<VOP_F32_F16_F16_F16, VOP3_OPSEL>>;
DAMDGPU.td123 "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"