Home
last modified time | relevance | path

Searched refs:vector_extract (Results 1 – 25 of 36) sorted by relevance

12

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td1234 def : Pat<(f64 (PPCfcfid (PPCmtvsra (i64 (vector_extract v2i64:$S, 0))))),
1236 def : Pat<(f64 (PPCfcfid (PPCmtvsra (i64 (vector_extract v2i64:$S, 1))))),
1238 def : Pat<(f64 (PPCfcfidu (PPCmtvsra (i64 (vector_extract v2i64:$S, 0))))),
1240 def : Pat<(f64 (PPCfcfidu (PPCmtvsra (i64 (vector_extract v2i64:$S, 1))))),
1245 def : Pat<(f64 (PPCfcfid (PPCmtvsra (i64 (vector_extract v2i64:$S, 0))))),
1247 def : Pat<(f64 (PPCfcfid (PPCmtvsra (i64 (vector_extract v2i64:$S, 1))))),
1249 def : Pat<(f64 (PPCfcfidu (PPCmtvsra (i64 (vector_extract v2i64:$S, 0))))),
1251 def : Pat<(f64 (PPCfcfidu (PPCmtvsra (i64 (vector_extract v2i64:$S, 1))))),
1325 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 0))))));
1327 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 1))))));
[all …]
DREADME_P9.txt416 - It is useful for (uint_to_fp (vector_extract v4i32, N))
417 - Unfortunately, it can't be used for (sint_to_fp (vector_extract v4i32, N))
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td1840 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 0))))));
1842 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 1))))));
1844 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S2, 0))))));
1846 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S2, 1))))));
1848 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 0))))));
1850 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S1, 1))))));
1852 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S2, 0))))));
1854 (f64 (PPCmtvsra (i64 (vector_extract v2i64:$S2, 1))))));
2222 dag LE_A0 = (i32 (sext_inreg (i32 (vector_extract v16i8:$A, 0)), i8));
2223 dag LE_A1 = (i32 (sext_inreg (i32 (vector_extract v16i8:$A, 4)), i8));
[all …]
DREADME_P9.txt416 - It is useful for (uint_to_fp (vector_extract v4i32, N))
417 - Unfortunately, it can't be used for (sint_to_fp (vector_extract v4i32, N))
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td1590 def : Pat<(f32 (vector_extract v4f32:$S, 0)),
1592 def : Pat<(f32 (vector_extract v4f32:$S, 1)),
1594 def : Pat<(f32 (vector_extract v4f32:$S, 2)),
1596 def : Pat<(f32 (vector_extract v4f32:$S, 3)),
1598 def : Pat<(f32 (vector_extract v4f32:$S, i64:$Idx)),
1602 // Variable index vector_extract for v2f64 does not require P8Vector
1604 def : Pat<(f64 (vector_extract v2f64:$S, i64:$Idx)),
1617 def : Pat<(i32 (vector_extract v16i8:$S, 0)),
1619 def : Pat<(i32 (vector_extract v16i8:$S, 1)),
1621 def : Pat<(i32 (vector_extract v16i8:$S, 2)),
[all …]
DREADME_P9.txt416 - It is useful for (uint_to_fp (vector_extract v4i32, N))
417 - Unfortunately, it can't be used for (sint_to_fp (vector_extract v4i32, N))
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td335 string suffix = "", SDNode extract = vector_extract> {
347 (i32 (vector_extract
355 (i32 (vector_extract
383 def : Pat<(i32 (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx))),
385 def : Pat<(i32 (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx))),
389 def : Pat<(and (i32 (vector_extract (v16i8 V128:$vec), undef)), (i32 0xff)),
391 def : Pat<(and (i32 (vector_extract (v8i16 V128:$vec), undef)), (i32 0xffff)),
393 def : Pat<(i32 (vector_extract (v16i8 V128:$vec), undef)),
395 def : Pat<(i32 (vector_extract (v8i16 V128:$vec), undef)),
397 def : Pat<(sext_inreg (i32 (vector_extract (v16i8 V128:$vec), undef)), i8),
[all …]
/external/llvm-project/mlir/include/mlir/Dialect/Vector/EDSC/
DIntrinsics.h19 using vector_extract = ValueBuilder<vector::ExtractOp>; variable
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrGISel.td168 def : Pat<(f32 (fadd (vector_extract (v2f32 FPR64:$Rn), (i64 0)),
169 (vector_extract (v2f32 FPR64:$Rn), (i64 1)))),
DAArch64SVEInstrInfo.td2268 def : Pat<(i32 (vector_extract (nxv16i8 ZPR:$vec), GPR64:$index)),
2270 def : Pat<(i32 (vector_extract (nxv8i16 ZPR:$vec), GPR64:$index)),
2272 def : Pat<(i32 (vector_extract (nxv4i32 ZPR:$vec), GPR64:$index)),
2274 def : Pat<(i64 (vector_extract (nxv2i64 ZPR:$vec), GPR64:$index)),
2276 def : Pat<(f16 (vector_extract (nxv8f16 ZPR:$vec), GPR64:$index)),
2278 def : Pat<(f16 (vector_extract (nxv4f16 ZPR:$vec), GPR64:$index)),
2280 def : Pat<(f16 (vector_extract (nxv2f16 ZPR:$vec), GPR64:$index)),
2282 def : Pat<(f32 (vector_extract (nxv4f32 ZPR:$vec), GPR64:$index)),
2284 def : Pat<(f32 (vector_extract (nxv2f32 ZPR:$vec), GPR64:$index)),
2286 def : Pat<(f64 (vector_extract (nxv2f64 ZPR:$vec), GPR64:$index)),
[all …]
DAArch64InstrInfo.td3014 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
3019 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
3152 def : Pat<(storeop (STy (vector_extract (VTy VecListOne128:$Vt), 0)),
5013 // If there's an (AArch64dup (vector_extract ...) ...), we can use a duplane
5029 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src128VT V128:$Rn),
5033 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src64VT V64:$Rn),
5069 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
5071 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
5073 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
5075 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc82 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 7:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
99 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 8:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
120 …// Src: (st (vector_extract:{ *:[i32] } v8i16:{ *:[v8i16] }:$S, 3:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
137 …// Src: (st (vector_extract:{ *:[i32] } v8i16:{ *:[v8i16] }:$S, 4:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
344 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 1:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
358 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 1:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
380 …// Src: (st (vector_extract:{ *:[i32] } v8i16:{ *:[v8i16] }:$S, 1:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
394 …// Src: (st (vector_extract:{ *:[i32] } v8i16:{ *:[v8i16] }:$S, 1:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
637 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 0:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
651 …// Src: (st (vector_extract:{ *:[i32] } v16i8:{ *:[v16i8] }:$S, 0:{ *:[iPTR] }), xoaddr:{ *:[iPTR]…
[all …]
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td511 def : Pat<(vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)),
513 def : Pat<(vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)),
515 def : Pat<(vector_extract (v4i32 V128:$vec), (i32 LaneIdx4:$idx)),
517 def : Pat<(vector_extract (v4f32 V128:$vec), (i32 LaneIdx4:$idx)),
519 def : Pat<(vector_extract (v2i64 V128:$vec), (i32 LaneIdx2:$idx)),
521 def : Pat<(vector_extract (v2f64 V128:$vec), (i32 LaneIdx2:$idx)),
525 (sext_inreg (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)), i8),
528 (and (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)), (i32 0xff)),
531 (sext_inreg (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)), i16),
534 (and (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)), (i32 0xffff)),
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2080 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
2085 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
3849 // If there's an (AArch64dup (vector_extract ...) ...), we can use a duplane
3865 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src128VT V128:$Rn),
3869 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src64VT V64:$Rn),
3905 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
3907 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
3909 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
3911 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
3913 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
[all …]
DAArch64InstrFormats.td6175 [(set regtype:$Rd, (vector_extract (vectype V128:$Rn), idxtype:$idx))]>;
6262 (elttype (vector_extract (vectype V128:$Rn), idxtype:$idx2)),
6540 def : Pat<(v1i64 (scalar_to_vector (i64 (vector_extract (v2i64 V128:$src),
6859 (f16 (vector_extract (v8f16 V128_lo:$Rm),
6873 (f32 (vector_extract (v4f32 V128:$Rm),
6885 (f64 (vector_extract (v2f64 V128:$Rm),
6930 (vector_extract (v4f32 V128:$Rm), VectorIndexS:$idx))),
6934 (vector_extract (v2f32 V64:$Rm), VectorIndexS:$idx))),
6940 (vector_extract (v2f64 V128:$Rm), VectorIndexD:$idx))),
7086 (i32 (vector_extract (v4i32 V128:$Rm),
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2825 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
2830 def : Pat<(storeop (STy (vector_extract (VecTy VecListOne128:$Vt), 0)),
2952 def : Pat<(storeop (STy (vector_extract (VTy VecListOne128:$Vt), 0)),
4817 // If there's an (AArch64dup (vector_extract ...) ...), we can use a duplane
4833 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src128VT V128:$Rn),
4837 def : Pat<(ResVT (AArch64dup (ScalVT (vector_extract (Src64VT V64:$Rn),
4873 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
4875 def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
4877 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
4879 def : Pat<(sext_inreg (vector_extract (v8i16 V128:$Rn), VectorIndexH:$idx),i16),
[all …]
DAArch64InstrFormats.td7042 [(set regtype:$Rd, (vector_extract (vectype V128:$Rn), idxtype:$idx))]>;
7129 (elttype (vector_extract (vectype V128:$Rn), idxtype:$idx2)),
7407 def : Pat<(v1i64 (scalar_to_vector (i64 (vector_extract (v2i64 V128:$src),
7781 (f16 (vector_extract (v8f16 V128_lo:$Rm),
7795 (f32 (vector_extract (v4f32 V128:$Rm),
7807 (f64 (vector_extract (v2f64 V128:$Rm),
7852 (vector_extract (v4f32 V128:$Rm), VectorIndexS:$idx))),
7856 (vector_extract (v2f32 V64:$Rm), VectorIndexS:$idx))),
7862 (vector_extract (v2f64 V128:$Rm), VectorIndexD:$idx))),
8008 (i32 (vector_extract (v4i32 V128:$Rm),
[all …]
/external/mesa3d/docs/relnotes/
D10.0.3.rst132 - glsl: Rename "expr" to "lhs_expr" in vector_extract munging code.
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/GlobalISel/
DSelectionDAGCompat.td101 def : GINodeEquiv<G_EXTRACT_VECTOR_ELT, vector_extract>;
/external/llvm-project/llvm/include/llvm/Target/GlobalISel/
DSelectionDAGCompat.td119 def : GINodeEquiv<G_EXTRACT_VECTOR_ELT, vector_extract>;
/external/llvm-project/llvm/test/Transforms/GVN/
Dnon-integral-pointers.ll412 define i64 addrspace(4)* @vector_extract(i8* %p) {
413 ; CHECK-LABEL: @vector_extract(
/external/llvm-project/mlir/lib/Conversion/VectorToSCF/
DVectorToSCF.cpp378 result = vector_extract(xferOp.vector(), majorIvs); in doReplace()
/external/llvm-project/llvm/lib/Target/X86/
DREADME.txt1204 def : Pat<(v2i32 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1207 def : Pat<(v4i16 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1210 def : Pat<(v8i8 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DREADME.txt1204 def : Pat<(v2i32 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1207 def : Pat<(v4i16 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1210 def : Pat<(v8i8 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
/external/llvm/lib/Target/X86/
DREADME.txt1204 def : Pat<(v2i32 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1207 def : Pat<(v4i16 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1210 def : Pat<(v8i8 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),

12