/external/llvm/lib/Target/PowerPC/ |
D | p9-instrs.txt | 18 [PO VRT EO VRB 1 PS XO] bcdcfn. VRT,VRB,PS 21 [PO VRT EO VRB 1 PS XO] bcdcfz. VRT,VRB,PS 24 [PO VRT EO VRB 1 / XO] bcdctn. VRT,VRB 27 [PO VRT EO VRB 1 PS XO] bcdctz. VRT,VRB,PS 30 [PO VRT EO VRB 1 PS XO] bcdcfsq. VRT,VRB,PS 33 [PO VRT EO VRB 1 / XO] bcdctsq. VRT,VRB 38 [PO VRT VRA VRB XO] bcdcpsgn. VRT,VRA,VRB 41 [PO VRT EO VRB 1 PS XO] bcdsetsgn. VRT,VRB,PS 44 [PO VRT VRA VRB 1 PS XO] bcds. VRT,VRA,VRB,PS 47 [PO VRT VRA VRB 1 / XO] bcdus. VRT,VRA,VRB [all …]
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D | README_P9.txt | 57 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].byte[3]) 65 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].hword[1]) 73 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].byte[7]) 81 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].hword[3]) 89 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].word[1]) 123 VR[VRT].byte[i] ← src.byte[i:i+1].bit[sh:sh+7] 126 VR[VRT].byte[i] is composed of 2 bytes from src.byte[i:i+1]
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D | PPCInstrFormats.td | 803 // e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO] 1779 // e.g. [PO VRT EO VRB XO] 1794 /// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX" 1812 /// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox" 1845 // VX-Form: [PO VRT EO VRB 1 PS XO] 1864 // VX-Form: [PO VRT VRA VRB 1 PS XO] or [PO VRT VRA VRB 1 / XO]
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D | PPCInstrAltivec.td | 1250 // VX-Form: [PO VRT / UIM VRB XO]. 1344 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set. 1352 // [PO VRT EO VRB 1 / XO] 1375 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set. 1383 // [PO VRT VRA VRB 1 / XO]
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D | PPCInstrVSX.td | 1833 // [PO VRT XO VRB XO /] 1839 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /] 1844 // [PO VRT XO VRB XO /], but the VRB is only used the left 64 bits (or less), 1870 // [PO VRT VRA VRB XO /] 1876 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /]
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | README_P9.txt | 57 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].byte[3]) 65 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].hword[1]) 73 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].byte[7]) 81 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].hword[3]) 89 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].word[1]) 123 VR[VRT].byte[i] ← src.byte[i:i+1].bit[sh:sh+7] 126 VR[VRT].byte[i] is composed of 2 bytes from src.byte[i:i+1]
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D | PPCInstrFormats.td | 969 // e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO] 1990 // e.g. [PO VRT EO VRB XO] 2005 /// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX" 2023 /// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox" 2056 // VX-Form: [PO VRT EO VRB 1 PS XO] 2075 // VX-Form: [PO VRT VRA VRB 1 PS XO] or [PO VRT VRA VRB 1 / XO] 2097 bits<5> VRT; 2106 let Inst{6-10} = VRT;
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D | PPCInstrPrefix.td | 315 // VX-Form: [PO VRT RA VRB XO]. 322 // VX-Form: [PO VRT RA RB XO]. 346 // VN-Form: [PO VRT VRA VRB PS SD XO] 351 bits<5> VRT; 358 let Inst{6-10} = VRT; 880 8LS_DForm_R_SI34_RTA5_p<43, (outs vfrc:$VRT), (ins memri34:$D_RA), 881 (ins memri34_pcrel:$D_RA), "plxssp $VRT, $D_RA", 884 8LS_DForm_R_SI34_RTA5_p<42, (outs vfrc:$VRT), (ins memri34:$D_RA), 885 (ins memri34_pcrel:$D_RA), "plxsd $VRT, $D_RA", 1907 def VSLDBI : VNForm_VTAB5_SD3<22, 0, (outs vrrc:$VRT), [all …]
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D | PPCInstrAltivec.td | 1394 // VX-Form: [PO VRT / UIM VRB XO]. 1556 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set. 1564 // [PO VRT EO VRB 1 / XO] 1587 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set. 1595 // [PO VRT VRA VRB 1 / XO]
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D | PPCInstrVSX.td | 197 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /] 202 // [PO VRT XO VRB XO /], but the VRB is only used the left 64 bits (or less), 209 // [PO VRT XO VRB XO /] 215 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /] 239 // [PO VRT VRA VRB XO /] 245 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /] 250 // [PO VRT VRA VRB XO /] 257 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | README_P9.txt | 57 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].byte[3]) 65 VR[VRT].word[i] ← EXTS32(VR[VRB].word[i].hword[1]) 73 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].byte[7]) 81 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].hword[3]) 89 VR[VRT].dword[i] ← EXTS64(VR[VRB].dword[i].word[1]) 123 VR[VRT].byte[i] ← src.byte[i:i+1].bit[sh:sh+7] 126 VR[VRT].byte[i] is composed of 2 bytes from src.byte[i:i+1]
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D | PPCInstrFormats.td | 965 // e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO] 1994 // e.g. [PO VRT EO VRB XO] 2009 /// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX" 2027 /// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox" 2060 // VX-Form: [PO VRT EO VRB 1 PS XO] 2079 // VX-Form: [PO VRT VRA VRB 1 PS XO] or [PO VRT VRA VRB 1 / XO] 2144 bits<5> VRT; 2153 let Inst{6-10} = VRT;
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D | PPCInstrAltivec.td | 1363 // VX-Form: [PO VRT / UIM VRB XO]. 1520 // [PO VRT EO VRB 1 PS XO], "_o" means CR6 is set. 1528 // [PO VRT EO VRB 1 / XO] 1551 // [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is set. 1559 // [PO VRT VRA VRB 1 / XO]
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D | PPCInstrVSX.td | 2582 // [PO VRT XO VRB XO /] 2588 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /] 2593 // [PO VRT XO VRB XO /], but the VRB is only used the left 64 bits (or less), 2600 // [PO VRT XO VRB XO /] 2606 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /] 2630 // [PO VRT VRA VRB XO /] 2636 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /] 2641 // [PO VRT VRA VRB XO /] 2648 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/TableGen/ |
D | Record.cpp | 2125 if (TypedInit *VRT = dyn_cast<TypedInit>(VR)) in resolveReferences() local 2127 (Twine("of type '") + VRT->getType()->getAsString() + "' ").str(); in resolveReferences()
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/external/llvm-project/llvm/lib/TableGen/ |
D | Record.cpp | 2277 if (TypedInit *VRT = dyn_cast<TypedInit>(VR)) in resolveReferences() local 2279 (Twine("of type '") + VRT->getType()->getAsString() + "' ").str(); in resolveReferences()
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 5838 // op: VRT
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/external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
D | 2013-1_UNLOCODE_CodeListPart2.csv | 15416 ,"IT","VRT","Vertova","Vertova","BG","--3-----","RQ","0907",,"4548N 00950E",
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D | 2013-1_UNLOCODE_CodeListPart1.csv | 32079 ,"FI","VRT","Vartius","Vartius","OL","-23----B","AC","9910",,, 43480 ,"FR","VRT","Viriat","Viriat","01","--3-----","RL","9806",,,
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D | 2013-1_UNLOCODE_CodeListPart3.csv | 25919 ,"US","VRT","Vernon","Vernon","TX","--3-----","RQ","9307",,,
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