Searched refs:fmulx (Results 1 – 25 of 72) sorted by relevance
123
26 fmulx h6, h2, v8.h[5]27 fmulx s6, s2, v8.s[0]28 fmulx s7, s3, v13.s[1]29 fmulx s9, s7, v9.s[2]30 fmulx s13, s21, v10.s[3]31 fmulx d15, d9, v7.d[0]32 fmulx d13, d12, v11.d[1]
34 fmulx v0.4h, v1.4h, v16.h[3]35 fmulx v2.8h, v3.8h, v17.h[6]74 fmulx h0, h1, v16.h[3]75 fmulx h2, h3, v17.h[6]
29 fmulx h20, h22, h1530 fmulx s20, s22, s1531 fmulx d23, d11, d1
201 fmulx v0.4h, v1.4h, v2.h[2]202 fmulx v0.8h, v1.8h, v2.h[2]203 fmulx v0.2s, v1.2s, v2.s[2]204 fmulx v0.2s, v1.2s, v22.s[2]205 fmulx v0.4s, v1.4s, v2.s[2]206 fmulx v0.4s, v1.4s, v22.s[2]207 fmulx v0.2d, v1.2d, v2.d[1]208 fmulx v0.2d, v1.2d, v22.d[1]
79 fmulx v21.2s, v5.2s, v13.2s80 fmulx v1.4s, v25.4s, v3.4s81 fmulx v31.2d, v22.2d, v2.2d
66 fmulx v0.4h, v1.4h, v2.h[2]68 fmulx v0.8h, v1.8h, v2.h[2]224 fmulx h6, h2, v8.h[5]280 fmulx h20, h22, h15
64 declare float @llvm.aarch64.neon.fmulx.f32(float, float)68 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]70 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)76 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]78 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)84 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]86 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %tmp1, float %a)90 declare double @llvm.aarch64.neon.fmulx.f64(double, double)94 ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0]|d[0-9]+}}96 %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %a, double %tmp1)[all …]
4 declare half @llvm.aarch64.neon.fmulx.f16(half, half)5 declare <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half>, <4 x half>)6 declare <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half>, <8 x half>)278 ; CHECK-NEXT: fmulx h0, h0, h1281 %fmulx.i = tail call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b)282 ret half %fmulx.i290 ; CHECK-NEXT: fmulx h0, h0, v1.h[3]294 %fmulx.i = tail call half @llvm.aarch64.neon.fmulx.f16(half %a, half %extract)295 ret half %fmulx.i303 ; CHECK-NEXT: fmulx v0.4h, v0.4h, v1.h[0][all …]
3 declare <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half>, <4 x half>)4 declare <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half>, <8 x half>)34 ; CHECK: fmulx v0.4h, v0.4h, v1.4h37 %vmulx2.i = tail call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> %a, <4 x half> %b)43 ; CHECK: fmulx v0.8h, v0.8h, v1.8h46 %vmulx2.i = tail call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> %a, <8 x half> %b)
770 declare <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float>, <2 x float>)771 declare <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float>, <4 x float>)772 declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>)777 ; CHECK: fmulx v0.2s, v0.2s, v1.2s778 %val = call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %lhs, <2 x float> %rhs)785 ; CHECK: fmulx v0.4s, v0.4s, v1.4s786 %val = call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %lhs, <4 x float> %rhs)793 ; CHECK: fmulx v0.2d, v0.2d, v1.2d794 … %val = call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %lhs, <2 x double> %rhs)
225 ;CHECK: fmulx.2s228 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)234 ;CHECK: fmulx.4s237 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)243 ;CHECK: fmulx.2d246 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)250 declare <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float>, <2 x float>) nounwind readnone251 declare <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float>, <4 x float>) nounwind readnone252 declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>) nounwind readnone716 ;CHECK: fmulx.2s[all …]
8 0x46,0x90,0x88,0x7f = fmulx s6, s2, v8.s[0]9 0x67,0x90,0xad,0x7f = fmulx s7, s3, v13.s[1]10 0xe9,0x98,0x89,0x7f = fmulx s9, s7, v9.s[2]11 0xad,0x9a,0xaa,0x7f = fmulx s13, s21, v10.s[3]12 0x2f,0x91,0xc7,0x7f = fmulx d15, d9, v7.d[0]13 0x8d,0x99,0xcb,0x7f = fmulx d13, d12, v11.d[1]
22 0xb5,0xdc,0x2d,0x0e = fmulx v21.2s, v5.2s, v13.2s23 0x21,0xdf,0x23,0x4e = fmulx v1.4s, v25.4s, v3.4s24 0xdf,0xde,0x62,0x4e = fmulx v31.2d, v22.2d, v2.2d
6 0xd4,0xde,0x2f,0x5e = fmulx s20, s22, s157 0x77,0xdd,0x61,0x5e = fmulx d23, d11, d1
78 0x20,0x98,0x82,0x2f = fmulx v0.2s, v1.2s, v2.s[2]79 0x20,0x98,0x96,0x2f = fmulx v0.2s, v1.2s, v22.s[2]80 0x20,0x98,0x82,0x6f = fmulx v0.4s, v1.4s, v2.s[2]81 0x20,0x98,0x96,0x6f = fmulx v0.4s, v1.4s, v22.s[2]82 0x20,0x98,0xc2,0x6f = fmulx v0.2d, v1.2d, v2.d[1]83 0x20,0x98,0xd6,0x6f = fmulx v0.2d, v1.2d, v22.d[1]
10 fmulx z0.h, p7/m, z0.h, z31.h label16 fmulx z0.s, p7/m, z0.s, z31.s label22 fmulx z0.d, p7/m, z0.d, z31.d label38 fmulx z0.d, p7/m, z0.d, z31.d label50 fmulx z0.d, p7/m, z0.d, z31.d label
7 fmulx z0.h, p7/m, z1.h, z31.h label16 fmulx z0.b, p7/m, z0.b, z31.b label21 fmulx z0.h, p7/m, z0.h, z31.s label30 fmulx z0.h, p8/m, z0.h, z31.h label