1; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16 | FileCheck %s 2 3declare <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half>, <4 x half>) 4declare <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half>, <8 x half>) 5declare <4 x half> @llvm.aarch64.neon.fminnmp.v4f16(<4 x half>, <4 x half>) 6declare <8 x half> @llvm.aarch64.neon.fminnmp.v8f16(<8 x half>, <8 x half>) 7declare <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half>, <4 x half>) 8declare <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half>, <8 x half>) 9declare <4 x half> @llvm.aarch64.neon.fabd.v4f16(<4 x half>, <4 x half>) 10declare <8 x half> @llvm.aarch64.neon.fabd.v8f16(<8 x half>, <8 x half>) 11declare <4 x half> @llvm.fabs.v4f16(<4 x half>) 12declare <8 x half> @llvm.fabs.v8f16(<8 x half>) 13 14define dso_local <4 x half> @t_vdiv_f16(<4 x half> %a, <4 x half> %b) { 15; CHECK-LABEL: t_vdiv_f16: 16; CHECK: fdiv v0.4h, v0.4h, v1.4h 17; CHECK-NEXT: ret 18entry: 19 %div.i = fdiv <4 x half> %a, %b 20 ret <4 x half> %div.i 21} 22 23define dso_local <8 x half> @t_vdivq_f16(<8 x half> %a, <8 x half> %b) { 24; CHECK-LABEL: t_vdivq_f16: 25; CHECK: fdiv v0.8h, v0.8h, v1.8h 26; CHECK-NEXT: ret 27entry: 28 %div.i = fdiv <8 x half> %a, %b 29 ret <8 x half> %div.i 30} 31 32define dso_local <4 x half> @t_vmulx_f16(<4 x half> %a, <4 x half> %b) { 33; CHECK-LABEL: t_vmulx_f16: 34; CHECK: fmulx v0.4h, v0.4h, v1.4h 35; CHECK-NEXT: ret 36entry: 37 %vmulx2.i = tail call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> %a, <4 x half> %b) 38 ret <4 x half> %vmulx2.i 39} 40 41define dso_local <8 x half> @t_vmulxq_f16(<8 x half> %a, <8 x half> %b) { 42; CHECK-LABEL: t_vmulxq_f16: 43; CHECK: fmulx v0.8h, v0.8h, v1.8h 44; CHECK-NEXT: ret 45entry: 46 %vmulx2.i = tail call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> %a, <8 x half> %b) 47 ret <8 x half> %vmulx2.i 48} 49 50define dso_local <4 x half> @t_vpminnm_f16(<4 x half> %a, <4 x half> %b) { 51; CHECK-LABEL: t_vpminnm_f16: 52; CHECK: fminnmp v0.4h, v0.4h, v1.4h 53; CHECK-NEXT: ret 54entry: 55 %vpminnm2.i = tail call <4 x half> @llvm.aarch64.neon.fminnmp.v4f16(<4 x half> %a, <4 x half> %b) 56 ret <4 x half> %vpminnm2.i 57} 58 59define dso_local <8 x half> @t_vpminnmq_f16(<8 x half> %a, <8 x half> %b) { 60; CHECK-LABEL: t_vpminnmq_f16: 61; CHECK: fminnmp v0.8h, v0.8h, v1.8h 62; CHECK-NEXT: ret 63entry: 64 %vpminnm2.i = tail call <8 x half> @llvm.aarch64.neon.fminnmp.v8f16(<8 x half> %a, <8 x half> %b) 65 ret <8 x half> %vpminnm2.i 66} 67 68define dso_local <4 x half> @t_vpmaxnm_f16(<4 x half> %a, <4 x half> %b) { 69; CHECK-LABEL: t_vpmaxnm_f16: 70; CHECK: fmaxnmp v0.4h, v0.4h, v1.4h 71; CHECK-NEXT: ret 72entry: 73 %vpmaxnm2.i = tail call <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half> %a, <4 x half> %b) 74 ret <4 x half> %vpmaxnm2.i 75} 76 77define dso_local <8 x half> @t_vpmaxnmq_f16(<8 x half> %a, <8 x half> %b) { 78; CHECK-LABEL: t_vpmaxnmq_f16: 79; CHECK: fmaxnmp v0.8h, v0.8h, v1.8h 80; CHECK-NEXT: ret 81entry: 82 %vpmaxnm2.i = tail call <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half> %a, <8 x half> %b) 83 ret <8 x half> %vpmaxnm2.i 84} 85 86define dso_local <4 x half> @t_vabd_f16(<4 x half> %a, <4 x half> %b) { 87; CHECK-LABEL: t_vabd_f16: 88; CHECK: fabd v0.4h, v0.4h, v1.4h 89; CHECK-NEXT: ret 90entry: 91 %vabdh_f16 = tail call <4 x half> @llvm.aarch64.neon.fabd.v4f16(<4 x half> %a, <4 x half> %b) 92 ret <4 x half> %vabdh_f16 93} 94 95define dso_local <8 x half> @t_vabdq_f16(<8 x half> %a, <8 x half> %b) { 96; CHECK-LABEL: t_vabdq_f16: 97; CHECK: fabd v0.8h, v0.8h, v1.8h 98; CHECK-NEXT: ret 99entry: 100 %vabdh_f16 = tail call <8 x half> @llvm.aarch64.neon.fabd.v8f16(<8 x half> %a, <8 x half> %b) 101 ret <8 x half> %vabdh_f16 102} 103 104define dso_local <4 x half> @t_vabd_f16_from_fsub_fabs(<4 x half> %a, <4 x half> %b) { 105; CHECK-LABEL: t_vabd_f16_from_fsub_fabs: 106; CHECK: fabd v0.4h, v0.4h, v1.4h 107; CHECK-NEXT: ret 108entry: 109 %sub = fsub <4 x half> %a, %b 110 %abs = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %sub) 111 ret <4 x half> %abs 112} 113 114define dso_local <8 x half> @t_vabdq_f16_from_fsub_fabs(<8 x half> %a, <8 x half> %b) { 115; CHECK-LABEL: t_vabdq_f16_from_fsub_fabs: 116; CHECK: fabd v0.8h, v0.8h, v1.8h 117; CHECK-NEXT: ret 118entry: 119 %sub = fsub <8 x half> %a, %b 120 %abs = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %sub) 121 ret <8 x half> %abs 122} 123