/external/llvm/test/CodeGen/AMDGPU/ |
D | sdivrem64.ll | 39 ; GCN: s_bfe_u32 40 ; GCN: s_bfe_u32 41 ; GCN: s_bfe_u32 42 ; GCN: s_bfe_u32 43 ; GCN: s_bfe_u32 44 ; GCN: s_bfe_u32 45 ; GCN: s_bfe_u32 46 ; GCN: s_bfe_u32 47 ; GCN: s_bfe_u32 48 ; GCN: s_bfe_u32 [all …]
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D | udivrem64.ll | 39 ;GCN: s_bfe_u32 40 ;GCN: s_bfe_u32 41 ;GCN: s_bfe_u32 42 ;GCN: s_bfe_u32 43 ;GCN: s_bfe_u32 44 ;GCN: s_bfe_u32 45 ;GCN: s_bfe_u32 46 ;GCN: s_bfe_u32 47 ;GCN: s_bfe_u32 48 ;GCN: s_bfe_u32 [all …]
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D | cgp-bitfield-extract.ll | 32 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80008 34 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70008 124 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80004 126 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70004 226 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x8000f 229 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7000f 273 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80003 276 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70003
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D | fceil64.ll | 14 ; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
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D | ftrunc.f64.ll | 26 ; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
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D | llvm.AMDGPU.bfe.u32.ll | 580 ; SI: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006 600 ; SI: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006 610 ; SI: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006 620 ; SI: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x150002
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D | load-constant-i8.ll | 153 ; GCN-DAG: s_bfe_u32 154 ; GCN-DAG: s_bfe_u32
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | idot8u.ll | 26 ; GFX7-NEXT: s_bfe_u32 s14, s6, 0x40018 27 ; GFX7-NEXT: s_bfe_u32 s15, s6, 0x40014 28 ; GFX7-NEXT: s_bfe_u32 s16, s6, 0x40010 29 ; GFX7-NEXT: s_bfe_u32 s17, s6, 0x4000c 30 ; GFX7-NEXT: s_bfe_u32 s18, s6, 0x40008 31 ; GFX7-NEXT: s_bfe_u32 s19, s6, 0x40004 34 ; GFX7-NEXT: s_bfe_u32 s8, s4, 0x40018 35 ; GFX7-NEXT: s_bfe_u32 s9, s4, 0x40014 36 ; GFX7-NEXT: s_bfe_u32 s10, s4, 0x40010 37 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x4000c [all …]
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D | idot4u.ll | 24 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008 27 ; GFX7-NEXT: s_bfe_u32 s11, s5, 0x80010 29 ; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008 31 ; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80010 54 ; GFX8-NEXT: s_bfe_u32 s7, s4, 0x80008 57 ; GFX8-NEXT: s_bfe_u32 s9, s4, 0x80010 59 ; GFX8-NEXT: s_bfe_u32 s6, s3, 0x80008 61 ; GFX8-NEXT: s_bfe_u32 s8, s3, 0x80010 87 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s4, 0x80008 90 ; GFX9-NODL-NEXT: s_bfe_u32 s9, s4, 0x80010 [all …]
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D | cgp-bitfield-extract.ll | 32 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70008 34 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80008 123 ; VI: s_bfe_u32 [[BFE:s[0-9]+]], [[ARG]], 0xc0004 126 ; SI: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70004 130 ; SI: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80004 228 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7000f 231 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x8000f 274 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x70003 277 ; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80003
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D | llvm.amdgcn.init.exec.ll | 25 ; GCN: s_bfe_u32 s0, s3, 0x70008 38 ; GCN: s_bfe_u32 s0, s0, 0x70013 51 ; GCN: s_bfe_u32 s1, s0, 0x70013 65 ; GCN: s_bfe_u32 s1, s0, 0x70013
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D | llvm.round.f64.ll | 14 ; SI-NEXT: s_bfe_u32 s0, s11, 0xb0014 152 ; SI-NEXT: s_bfe_u32 s0, s11, 0xb0014 170 ; SI-NEXT: s_bfe_u32 s0, s9, 0xb0014 246 ; SI-NEXT: s_bfe_u32 s0, s11, 0xb0014 265 ; SI-NEXT: s_bfe_u32 s0, s9, 0xb0014 290 ; SI-NEXT: s_bfe_u32 s0, s15, 0xb0014 311 ; SI-NEXT: s_bfe_u32 s0, s13, 0xb0014 405 ; SI-NEXT: s_bfe_u32 s2, s11, 0xb0014 423 ; SI-NEXT: s_bfe_u32 s2, s9, 0xb0014 448 ; SI-NEXT: s_bfe_u32 s2, s15, 0xb0014 [all …]
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D | llvm.amdgcn.init.exec.wave32.ll | 15 ; GCN: s_bfe_u32 s0, s3, 0x70008
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D | idot8s.ll | 1720 ; GFX9-NEXT: s_bfe_u32 s3, s2, 0x40018 1722 ; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40010 1723 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014 1724 ; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40008 1725 ; GFX9-NEXT: s_bfe_u32 s10, s2, 0x4000c 1727 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40004 1735 ; GFX9-NEXT: s_bfe_u32 s7, s6, 0x40018 1737 ; GFX9-NEXT: s_bfe_u32 s13, s6, 0x40010 1738 ; GFX9-NEXT: s_bfe_u32 s14, s6, 0x40014 1739 ; GFX9-NEXT: s_bfe_u32 s15, s6, 0x40008 [all …]
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D | idot4s.ll | 359 ; GFX7-NEXT: s_bfe_u32 s8, s5, 0x80008 361 ; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80010 362 ; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008 364 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 389 ; GFX8-NEXT: s_bfe_u32 s5, s1, 0x80008 391 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x80008 394 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x80010 396 ; GFX8-NEXT: s_bfe_u32 s7, s1, 0x80010 420 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s3, 0x80008 422 ; GFX9-NODL-NEXT: s_bfe_u32 s6, s4, 0x80008 [all …]
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D | fceil64.ll | 14 ; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
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D | ftrunc.f64.ll | 26 ; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
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D | llvm.amdgcn.ubfe.ll | 1596 ; SI-NEXT: s_bfe_u32 s0, s2, 0x30006 1609 ; VI-NEXT: s_bfe_u32 s0, s0, 0x30006 1658 ; SI-NEXT: s_bfe_u32 s0, s2, 0x30006 1671 ; VI-NEXT: s_bfe_u32 s0, s0, 0x30006 1688 ; SI-NEXT: s_bfe_u32 s0, s2, 0x30006 1701 ; VI-NEXT: s_bfe_u32 s0, s0, 0x30006 1718 ; SI-NEXT: s_bfe_u32 s0, s2, 0x150002 1731 ; VI-NEXT: s_bfe_u32 s0, s0, 0x150002
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D | widen-smrd-loads.ll | 139 ; SI-NEXT: s_bfe_u32 s8, s7, 0x10010 160 ; VI-NEXT: s_bfe_u32 s0, s0, 0x10010
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | llvm.amdgcn.ubfe.ll | 20 ; GFX6-NEXT: s_bfe_u32 s0, s0, s1 56 ; GFX6-NEXT: s_bfe_u32 s0, s2, s0 76 ; GFX6-NEXT: s_bfe_u32 s0, s2, s0 96 ; GFX6-NEXT: s_bfe_u32 s0, s2, s0 117 ; GFX6-NEXT: s_bfe_u32 s0, 0x7b, s0 136 ; GFX6-NEXT: s_bfe_u32 s0, s2, s0 153 ; GFX6-NEXT: s_bfe_u32 s0, s0, 8 196 ; GFX6-NEXT: s_bfe_u32 s0, s0, 0x80000 220 ; GFX6-NEXT: s_bfe_u32 s0, s0, 0x100000 244 ; GFX6-NEXT: s_bfe_u32 s0, s0, 0x80001 [all …]
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D | shl-ext-reduce.ll | 407 ; GFX8-NEXT: s_bfe_u32 s1, 2, 0x100000 409 ; GFX8-NEXT: s_bfe_u32 s0, s0, 0x100000 416 ; GFX9-NEXT: s_bfe_u32 s1, 2, 0x100000 418 ; GFX9-NEXT: s_bfe_u32 s0, s0, 0x100000
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/external/llvm/test/MC/AMDGPU/ |
D | sop2.s | 143 s_bfe_u32 s2, s4, s6 label
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | sop2.s | 196 s_bfe_u32 s2, s4, s6 label
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 78 # VI: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x92]
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 78 # VI: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x92]
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