1; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
2
3; GCN-LABEL: {{^}}test_init_exec:
4; GFX1032: s_mov_b32 exec_lo, 0x12345
5; GFX1064: s_mov_b64 exec, 0x12345
6; GCN: v_add_f32_e32 v0,
7define amdgpu_ps float @test_init_exec(float %a, float %b) {
8main_body:
9  %s = fadd float %a, %b
10  call void @llvm.amdgcn.init.exec(i64 74565)
11  ret float %s
12}
13
14; GCN-LABEL: {{^}}test_init_exec_from_input:
15; GCN: s_bfe_u32 s0, s3, 0x70008
16; GFX1032: s_bfm_b32 exec_lo, s0, 0
17; GFX1032: s_cmp_eq_u32 s0, 32
18; GFX1032: s_cmov_b32 exec_lo, -1
19; GFX1064: s_bfm_b64 exec, s0, 0
20; GFX1064: s_cmp_eq_u32 s0, 64
21; GFX1064: s_cmov_b64 exec, -1
22; GCN: v_add_f32_e32 v0,
23define amdgpu_ps float @test_init_exec_from_input(i32 inreg, i32 inreg, i32 inreg, i32 inreg %count, float %a, float %b) {
24main_body:
25  %s = fadd float %a, %b
26  call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
27  ret float %s
28}
29
30declare void @llvm.amdgcn.init.exec(i64)
31declare void @llvm.amdgcn.init.exec.from.input(i32, i32)
32