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Searched refs:s_subb_u32 (Results 1 – 25 of 33) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dusubsat.ll2542 ; GFX6-NEXT: s_subb_u32 s5, s1, s3
2560 ; GFX8-NEXT: s_subb_u32 s5, s1, s3
2578 ; GFX9-NEXT: s_subb_u32 s5, s1, s3
2595 ; GFX10-NEXT: s_subb_u32 s1, s1, s3
2770 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
2781 ; GFX6-NEXT: s_subb_u32 s1, s3, s7
2802 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
2813 ; GFX8-NEXT: s_subb_u32 s1, s3, s7
2834 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
2845 ; GFX9-NEXT: s_subb_u32 s1, s3, s7
[all …]
Dssubsat.ll4698 ; GFX6-NEXT: s_subb_u32 s5, s1, s3
4726 ; GFX8-NEXT: s_subb_u32 s5, s1, s3
4754 ; GFX9-NEXT: s_subb_u32 s5, s1, s3
4782 ; GFX10-NEXT: s_subb_u32 s5, s1, s3
5056 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
5077 ; GFX6-NEXT: s_subb_u32 s1, s3, s7
5109 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
5130 ; GFX8-NEXT: s_subb_u32 s1, s3, s7
5162 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
5183 ; GFX9-NEXT: s_subb_u32 s1, s3, s7
[all …]
Durem.i64.ll201 ; CHECK-NEXT: s_subb_u32 s7, 0, s3
1098 ; GISEL-NEXT: s_subb_u32 s9, 0, 0
1114 ; GISEL-NEXT: s_subb_u32 s6, 0, 0
1749 ; GISEL-NEXT: s_subb_u32 s9, 0, 0
1765 ; GISEL-NEXT: s_subb_u32 s6, 0, 0
Dudiv.i64.ll204 ; CHECK-NEXT: s_subb_u32 s7, 0, s3
1114 ; GISEL-NEXT: s_subb_u32 s9, 0, 0
1130 ; GISEL-NEXT: s_subb_u32 s6, 0, 0
1775 ; GISEL-NEXT: s_subb_u32 s9, 0, 0
1791 ; GISEL-NEXT: s_subb_u32 s6, 0, 0
Dsrem.i64.ll234 ; CHECK-NEXT: s_subb_u32 s5, 0, s11
1200 ; GISEL-NEXT: s_subb_u32 s12, 0, s9
1341 ; GISEL-NEXT: s_subb_u32 s9, 0, s7
1915 ; GISEL-NEXT: s_subb_u32 s12, 0, s9
2056 ; GISEL-NEXT: s_subb_u32 s9, 0, s7
Dsdiv.i64.ll238 ; CHECK-NEXT: s_subb_u32 s5, 0, s11
1222 ; GISEL-NEXT: s_subb_u32 s12, 0, s9
1364 ; GISEL-NEXT: s_subb_u32 s9, 0, s7
1945 ; GISEL-NEXT: s_subb_u32 s12, 0, s9
2087 ; GISEL-NEXT: s_subb_u32 s9, 0, s7
/external/llvm/test/MC/AMDGPU/
Dsop2.s22 s_subb_u32 s1, s2, s3 label
/external/llvm-project/llvm/test/MC/AMDGPU/
Dsop2.s30 s_subb_u32 s1, s2, s3 label
/external/llvm/test/CodeGen/AMDGPU/
Dssubo.ll43 ; SI: s_subb_u32
Dusubo.ll54 ; SI: s_subb_u32
Dsub.ll59 ; SI: s_subb_u32
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dcarryout-selection.ll200 ; GCN: s_subb_u32
215 ; GCN: s_subb_u32 s{{[0-9]+}}, 0x1234, s{{[0-9]+}}
332 ; GCN: s_subb_u32
Dbranch-relaxation.ll198 ; GCN-NEXT: s_subb_u32 s[[PC_HI]], s[[PC_HI]], 0
290 ; GCN-NEXT: s_subb_u32 s[[PC_HI]], s[[PC_HI]], 0{{$}}
445 ; GCN-NEXT: s_subb_u32 s[[PC_HI]], s[[PC_HI]], 0
Dusubo.ll8 ; GCN: s_subb_u32
94 ; GCN: s_subb_u32
Dssubo.ll45 ; GCN: s_subb_u32
Dsub.ll133 ; GCN: s_subb_u32
Dsrem64.ll17 ; GCN-NEXT: s_subb_u32 s3, 0, s13
903 ; GCN-NEXT: s_subb_u32 s5, 0, s13
1037 ; GCN-IR-NEXT: s_subb_u32 s9, s7, s2
1040 ; GCN-IR-NEXT: s_subb_u32 s11, s11, s0
1207 ; GCN-IR-NEXT: s_subb_u32 s7, s1, s2
1210 ; GCN-IR-NEXT: s_subb_u32 s9, s9, s10
1335 ; GCN-NEXT: s_subb_u32 s3, 0, s9
1448 ; GCN-IR-NEXT: s_subb_u32 s3, s3, s0
Dsdiv64.ll22 ; GCN-NEXT: s_subb_u32 s5, 0, s3
155 ; GCN-IR-NEXT: s_subb_u32 s11, s7, s2
159 ; GCN-IR-NEXT: s_subb_u32 s7, s1, s8
1026 ; GCN-IR-NEXT: s_subb_u32 s11, s1, s2
1030 ; GCN-IR-NEXT: s_subb_u32 s9, s1, s6
1147 ; GCN-NEXT: s_subb_u32 s10, 0, s9
1266 ; GCN-IR-NEXT: s_subb_u32 s7, s1, s2
Dllvm.mulo.ll270 ; GFX9-NEXT: s_subb_u32 s10, s6, 0
Dudiv64.ll17 ; GCN-NEXT: s_subb_u32 s5, 0, s3
731 ; GCN-NEXT: s_subb_u32 s9, 0, s3
951 ; GCN-NEXT: s_subb_u32 s3, 0, s7
Damdgpu-codegenprepare-idiv.ll5752 ; GCN-NEXT: s_subb_u32 s5, 0, s3
6098 ; GCN-NEXT: s_subb_u32 s7, 0, s15
6232 ; GCN-NEXT: s_subb_u32 s15, 0, s13
6499 ; GCN-NEXT: s_subb_u32 s5, s7, s5
6533 ; GCN-NEXT: s_subb_u32 s3, 0, s13
6685 ; GCN-NEXT: s_subb_u32 s1, s1, s10
6692 ; GCN-NEXT: s_subb_u32 s3, s3, s10
6740 ; GCN-NEXT: s_subb_u32 s7, 0, s17
6872 ; GCN-NEXT: s_subb_u32 s3, 0, s9
Durem64.ll17 ; GCN-NEXT: s_subb_u32 s3, 0, s13
761 ; GCN-NEXT: s_subb_u32 s3, 0, s7
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td426 def S_SUBB_U32 : SOP2_32 <"s_subb_u32",
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSOPInstructions.td463 def S_SUBB_U32 : SOP2_32 <"s_subb_u32",
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp1259 …Temp dst1 = bld.sop2(aco_opcode::s_subb_u32, bld.def(s1), bld.def(s1, scc), Operand(0u), src1, car… in visit_alu_instr()
1675 … Temp dst1 = bld.sop2(aco_opcode::s_subb_u32, bld.def(s1), bld.def(s1, scc), src01, src11, carry); in visit_alu_instr()
1708 …borrow = bld.sop2(aco_opcode::s_subb_u32, bld.def(s1), bld.scc(bld.def(s1)), src01, src11, bld.scc… in visit_alu_instr()
2433 … upper = bld.sop2(aco_opcode::s_subb_u32, bld.def(s1), bld.def(s1, scc), upper, sign, borrow); in visit_alu_instr()

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