1; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,SI,FUNC %s
2; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,VI,FUNC %s
3; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
4
5
6declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
7declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
8declare { <2 x i32>, <2 x i1> } @llvm.ssub.with.overflow.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
9
10; FUNC-LABEL: {{^}}ssubo_i64_zext:
11define amdgpu_kernel void @ssubo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
12  %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
13  %val = extractvalue { i64, i1 } %ssub, 0
14  %carry = extractvalue { i64, i1 } %ssub, 1
15  %ext = zext i1 %carry to i64
16  %add2 = add i64 %val, %ext
17  store i64 %add2, i64 addrspace(1)* %out, align 8
18  ret void
19}
20
21; FUNC-LABEL: {{^}}s_ssubo_i32:
22define amdgpu_kernel void @s_ssubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 %a, i32 %b) nounwind {
23  %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind
24  %val = extractvalue { i32, i1 } %ssub, 0
25  %carry = extractvalue { i32, i1 } %ssub, 1
26  store i32 %val, i32 addrspace(1)* %out, align 4
27  store i1 %carry, i1 addrspace(1)* %carryout
28  ret void
29}
30
31; FUNC-LABEL: {{^}}v_ssubo_i32:
32define amdgpu_kernel void @v_ssubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
33  %a = load i32, i32 addrspace(1)* %aptr, align 4
34  %b = load i32, i32 addrspace(1)* %bptr, align 4
35  %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind
36  %val = extractvalue { i32, i1 } %ssub, 0
37  %carry = extractvalue { i32, i1 } %ssub, 1
38  store i32 %val, i32 addrspace(1)* %out, align 4
39  store i1 %carry, i1 addrspace(1)* %carryout
40  ret void
41}
42
43; FUNC-LABEL: {{^}}s_ssubo_i64:
44; GCN: s_sub_u32
45; GCN: s_subb_u32
46define amdgpu_kernel void @s_ssubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
47  %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
48  %val = extractvalue { i64, i1 } %ssub, 0
49  %carry = extractvalue { i64, i1 } %ssub, 1
50  store i64 %val, i64 addrspace(1)* %out, align 8
51  store i1 %carry, i1 addrspace(1)* %carryout
52  ret void
53}
54
55; FUNC-LABEL: {{^}}v_ssubo_i64:
56; SI: v_sub_i32_e32 v{{[0-9]+}}, vcc,
57; SI: v_subb_u32_e32 v{{[0-9]+}}, vcc,
58
59; VI: v_sub_u32_e32 v{{[0-9]+}}, vcc,
60; VI: v_subb_u32_e32 v{{[0-9]+}}, vcc,
61
62; GFX9: v_sub_co_u32_e32 v{{[0-9]+}}, vcc,
63; GFX9: v_subb_co_u32_e32 v{{[0-9]+}}, vcc,
64define amdgpu_kernel void @v_ssubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
65  %a = load i64, i64 addrspace(1)* %aptr, align 4
66  %b = load i64, i64 addrspace(1)* %bptr, align 4
67  %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
68  %val = extractvalue { i64, i1 } %ssub, 0
69  %carry = extractvalue { i64, i1 } %ssub, 1
70  store i64 %val, i64 addrspace(1)* %out, align 8
71  store i1 %carry, i1 addrspace(1)* %carryout
72  ret void
73}
74
75; FUNC-LABEL: {{^}}v_ssubo_v2i32:
76; SICIVI: v_cmp_lt_i32
77; SICIVI: v_cmp_lt_i32
78; SICIVI: v_sub_{{[iu]}}32
79; SICIVI: v_cmp_lt_i32
80; SICIVI: v_cmp_lt_i32
81; SICIVI: v_sub_{{[iu]}}32
82define amdgpu_kernel void @v_ssubo_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %carryout, <2 x i32> addrspace(1)* %aptr, <2 x i32> addrspace(1)* %bptr) nounwind {
83  %a = load <2 x i32>, <2 x i32> addrspace(1)* %aptr, align 4
84  %b = load <2 x i32>, <2 x i32> addrspace(1)* %bptr, align 4
85  %sadd = call { <2 x i32>, <2 x i1> } @llvm.ssub.with.overflow.v2i32(<2 x i32> %a, <2 x i32> %b) nounwind
86  %val = extractvalue { <2 x i32>, <2 x i1> } %sadd, 0
87  %carry = extractvalue { <2 x i32>, <2 x i1> } %sadd, 1
88  store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
89  %carry.ext = zext <2 x i1> %carry to <2 x i32>
90  store <2 x i32> %carry.ext, <2 x i32> addrspace(1)* %carryout
91  ret void
92}
93