/external/llvm-project/llvm/test/CodeGen/PowerPC/ |
D | ppc64-r2-alloc.ll | 7 %div = sdiv i32 %a, %d 8 %div1 = sdiv i32 %div, %d 9 %div2 = sdiv i32 %div1, %d 10 %div3 = sdiv i32 %div2, %d 11 %div4 = sdiv i32 %div3, %d 12 %div5 = sdiv i32 %div4, %d 13 %div6 = sdiv i32 %div5, %d 14 %div7 = sdiv i32 %div6, %d 15 %div8 = sdiv i32 %div7, %d 16 %div9 = sdiv i32 %div8, %d [all …]
|
/external/llvm/test/CodeGen/PowerPC/ |
D | ppc64-r2-alloc.ll | 7 %div = sdiv i32 %a, %d 8 %div1 = sdiv i32 %div, %d 9 %div2 = sdiv i32 %div1, %d 10 %div3 = sdiv i32 %div2, %d 11 %div4 = sdiv i32 %div3, %d 12 %div5 = sdiv i32 %div4, %d 13 %div6 = sdiv i32 %div5, %d 14 %div7 = sdiv i32 %div6, %d 15 %div8 = sdiv i32 %div7, %d 16 %div9 = sdiv i32 %div8, %d [all …]
|
/external/llvm-project/llvm/test/Transforms/InstCombine/ |
D | add-shl-sdiv-to-srem.ll | 4 define i8 @add-shl-sdiv-scalar0(i8 %x) { 5 ; CHECK-LABEL: @add-shl-sdiv-scalar0( 9 %sd = sdiv i8 %x, -4 15 define i8 @add-shl-sdiv-scalar1(i8 %x) { 16 ; CHECK-LABEL: @add-shl-sdiv-scalar1( 20 %sd = sdiv i8 %x, -64 26 define i32 @add-shl-sdiv-scalar2(i32 %x) { 27 ; CHECK-LABEL: @add-shl-sdiv-scalar2( 31 %sd = sdiv i32 %x, -1073741824 39 define <3 x i8> @add-shl-sdiv-splat0(<3 x i8> %x) { [all …]
|
D | sdiv-canonicalize.ll | 10 ; CHECK-NEXT: [[SDIV1:%.*]] = sdiv i32 [[X:%.*]], [[Y:%.*]] 15 %sdiv = sdiv i32 %neg, %y 16 ret i32 %sdiv 21 ; CHECK-NEXT: [[SDIV1:%.*]] = sdiv exact i32 [[X:%.*]], [[Y:%.*]] 26 %sdiv = sdiv exact i32 %neg, %y 27 ret i32 %sdiv 35 ; CHECK-NEXT: [[SDIV:%.*]] = sdiv i32 [[Y]], [[NEG]] 40 %sdiv = sdiv i32 %y, %neg 41 ret i32 %sdiv 47 ; CHECK-NEXT: [[SDIV:%.*]] = sdiv i32 [[NEG]], [[Y:%.*]] [all …]
|
D | div.ll | 10 %B = sdiv i32 %A, 1 28 %B = sdiv i32 %A, -1 37 %div = sdiv <2 x i64> %x, <i64 -1, i64 -1> 45 %div = sdiv <2 x i64> %x, <i64 -1, i64 undef> 55 %div = sdiv i32 %y, %sext 65 %div = sdiv <2 x i32> %y, %sext 241 %tmp3 = sdiv i32 %x, %x ; 1 304 %A = sdiv i32 1, %x 315 %A = sdiv <2 x i32> <i32 1, i32 1>, %x 321 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], 3 [all …]
|
/external/llvm/test/Analysis/CostModel/X86/ |
D | div.ll | 7 ; SSE2: cost of 320 {{.*}} sdiv 8 %a0 = sdiv <16 x i8> undef, undef 9 ; SSE2: cost of 160 {{.*}} sdiv 10 %a1 = sdiv <8 x i16> undef, undef 11 ; SSE2: cost of 80 {{.*}} sdiv 12 %a2 = sdiv <4 x i32> undef, undef 13 ; SSE2: cost of 40 {{.*}} sdiv 14 %a3 = sdiv <2 x i32> undef, undef 21 ; AVX2: cost of 640 {{.*}} sdiv 22 %a0 = sdiv <32 x i8> undef, undef [all …]
|
/external/llvm-project/llvm/test/Analysis/Lint/ |
D | check-zero-divide.ll | 4 %b = sdiv <2 x i32> %a, <i32 5, i32 8> 25 ; CHECK-NEXT: %b = sdiv i32 %a, 0 26 %b = sdiv i32 %a, 0 32 ; CHECK-NEXT: %b = sdiv i32 %a, 0 33 %b = sdiv i32 %a, zeroinitializer 39 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, <i32 0, i32 5> 40 %b = sdiv <2 x i32> %a, <i32 0, i32 5> 46 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, <i32 4, i32 0> 47 %b = sdiv <2 x i32> %a, <i32 4, i32 0> 53 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, zeroinitializer [all …]
|
/external/llvm/test/Analysis/Lint/ |
D | check-zero-divide.ll | 4 %b = sdiv <2 x i32> %a, <i32 5, i32 8> 25 ; CHECK-NEXT: %b = sdiv i32 %a, 0 26 %b = sdiv i32 %a, 0 32 ; CHECK-NEXT: %b = sdiv i32 %a, 0 33 %b = sdiv i32 %a, zeroinitializer 39 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, <i32 0, i32 5> 40 %b = sdiv <2 x i32> %a, <i32 0, i32 5> 46 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, <i32 4, i32 0> 47 %b = sdiv <2 x i32> %a, <i32 4, i32 0> 53 ; CHECK-NEXT: %b = sdiv <2 x i32> %a, zeroinitializer [all …]
|
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-mul-div.ll | 104 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 105 %tmp3 = sdiv <1 x i8> %A, %B; 111 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 112 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 113 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 114 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 115 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 116 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 117 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 118 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} [all …]
|
D | rem_crash.ll | 13 %0 = sdiv i8 %x, 10 29 %0 = sdiv i8 %x, 10 45 %0 = sdiv i16 %x, 10 61 %0 = sdiv i16 %x, 10 77 %0 = sdiv i32 %x, 10 93 %0 = sdiv i32 %x, 10 109 %0 = sdiv i64 %x, 10 125 %0 = sdiv i64 %x, 10 141 %0 = sdiv i8 %x, 10 157 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-mul-div.ll | 104 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 105 %tmp3 = sdiv <1 x i8> %A, %B; 111 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 112 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 113 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 114 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 115 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 116 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 117 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 118 ; CHECK: sdiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} [all …]
|
D | div-rem-pair-recomposition-signed.ll | 15 ; ALL-NEXT: sdiv w8, w9, w8 19 %div = sdiv i8 %x, %y 31 ; ALL-NEXT: sdiv w8, w9, w8 35 %div = sdiv i16 %x, %y 45 ; ALL-NEXT: sdiv w8, w0, w1 49 %div = sdiv i32 %x, %y 59 ; ALL-NEXT: sdiv x8, x0, x1 63 %div = sdiv i64 %x, %y 77 ; ALL-NEXT: sdiv w10, w11, w10 80 ; ALL-NEXT: sdiv w8, w9, w8 [all …]
|
D | rem_crash.ll | 13 %0 = sdiv i8 %x, 10 29 %0 = sdiv i8 %x, 10 45 %0 = sdiv i16 %x, 10 61 %0 = sdiv i16 %x, 10 77 %0 = sdiv i32 %x, 10 93 %0 = sdiv i32 %x, 10 109 %0 = sdiv i64 %x, 10 125 %0 = sdiv i64 %x, 10 141 %0 = sdiv i8 %x, 10 157 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm-project/llvm/test/CodeGen/ARM/ |
D | sdiv-pow2-thumb-size.ll | 7 ; Armv6m targets don't have a sdiv instruction, so sdiv should not appear at 11 ; V6M-NOT: sdiv 14 ; Test sdiv i16 18 ; CHECK-NEXT: sdiv r0, r0, r1 23 %0 = sdiv i16 %F, 2 31 ; CHECK-NEXT: sdiv r0, r0, r1 35 %div = sdiv i32 %F, 4 39 ; The immediate is not a power of 2, so we expect a sdiv. 43 ; CHECK-NEXT: sdiv r0, r0, r1 47 %div = sdiv i32 %F, 5 [all …]
|
D | rem_crash.ll | 13 %0 = sdiv i8 %x, 10 29 %0 = sdiv i8 %x, 10 45 %0 = sdiv i16 %x, 10 61 %0 = sdiv i16 %x, 10 77 %0 = sdiv i32 %x, 10 93 %0 = sdiv i32 %x, 10 109 %0 = sdiv i64 %x, 10 125 %0 = sdiv i64 %x, 10 141 %0 = sdiv i8 %x, 10 157 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm-project/llvm/test/Transforms/InstSimplify/ |
D | sdiv.ll | 9 %div = sdiv i32 %negx, %x 18 %div = sdiv <2 x i32> %negx, %x 28 %div = sdiv i32 %xy, %yx 38 %div = sdiv <2 x i32> %xy, %yx 48 %div = sdiv i32 %negx, %x 57 %div = sdiv i32 %x, %negx 64 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[NEGX]], [[X]] 68 %div = sdiv i32 %negx, %x 76 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[XY]], [[YX]] 81 %div = sdiv i32 %xy, %yx [all …]
|
D | signed-div-rem.ll | 8 %div = sdiv i32 %conv, 129 15 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 128 19 %div = sdiv i32 %conv, 128 28 %div = sdiv i32 %conv, -129 35 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], -128 39 %div = sdiv i32 %conv, -128 48 %div = sdiv i32 %conv, 256 55 ; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 255 59 %div = sdiv i32 %conv, 255 68 %div = sdiv i32 %conv, -256 [all …]
|
/external/llvm-project/llvm/test/Analysis/CostModel/AArch64/ |
D | div.ll | 7 ; CHECK: Found an estimated cost of 1 for instruction: %c = sdiv i32 %a, %b 8 %c = sdiv i32 %a, %b 14 ; CHECK: Found an estimated cost of 1 for instruction: %c = sdiv i64 %a, %b 15 %c = sdiv i64 %a, %b 21 ; CHECK: Found an estimated cost of 24 for instruction: %c = sdiv <2 x i32> %a, %b 22 %c = sdiv <2 x i32> %a, %b 28 ; CHECK: Found an estimated cost of 24 for instruction: %c = sdiv <2 x i64> %a, %b 29 %c = sdiv <2 x i64> %a, %b 35 ; CHECK: Found an estimated cost of 52 for instruction: %c = sdiv <4 x i32> %a, %b 36 %c = sdiv <4 x i32> %a, %b
|
/external/llvm/test/Analysis/CostModel/ARM/ |
D | divrem.ll | 5 ; CHECK: cost of 40 {{.*}} sdiv 7 %1 = sdiv <2 x i8> %a, %b 12 ; CHECK: cost of 40 {{.*}} sdiv 14 %1 = sdiv <2 x i16> %a, %b 19 ; CHECK: cost of 40 {{.*}} sdiv 21 %1 = sdiv <2 x i32> %a, %b 26 ; CHECK: cost of 40 {{.*}} sdiv 28 %1 = sdiv <2 x i64> %a, %b 33 ; CHECK: cost of 10 {{.*}} sdiv 35 %1 = sdiv <4 x i8> %a, %b [all …]
|
/external/llvm/test/CodeGen/ARM/ |
D | rem_crash.ll | 13 %0 = sdiv i8 %x, 10 29 %0 = sdiv i8 %x, 10 45 %0 = sdiv i16 %x, 10 61 %0 = sdiv i16 %x, 10 77 %0 = sdiv i32 %x, 10 93 %0 = sdiv i32 %x, 10 109 %0 = sdiv i64 %x, 10 125 %0 = sdiv i64 %x, 10 141 %0 = sdiv i8 %x, 10 157 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm-project/llvm/test/CodeGen/X86/ |
D | rem_crash.ll | 14 %0 = sdiv i8 %x, 10 30 %0 = sdiv i8 %x, 10 46 %0 = sdiv i16 %x, 10 62 %0 = sdiv i16 %x, 10 78 %0 = sdiv i32 %x, 10 94 %0 = sdiv i32 %x, 10 110 %0 = sdiv i64 %x, 10 126 %0 = sdiv i64 %x, 10 142 %0 = sdiv i8 %x, 10 158 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm/test/CodeGen/X86/ |
D | rem_crash.ll | 14 %0 = sdiv i8 %x, 10 30 %0 = sdiv i8 %x, 10 46 %0 = sdiv i16 %x, 10 62 %0 = sdiv i16 %x, 10 78 %0 = sdiv i32 %x, 10 94 %0 = sdiv i32 %x, 10 110 %0 = sdiv i64 %x, 10 126 %0 = sdiv i64 %x, 10 142 %0 = sdiv i8 %x, 10 158 %0 = sdiv i8 %x, 10 [all …]
|
/external/llvm-project/llvm/test/Analysis/CostModel/X86/ |
D | div.ll | 14 define i32 @sdiv() { 15 ; CHECK-LABEL: 'sdiv' 16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sdiv i64 undef, und… 17 ; CHECK-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = sdiv <2 x i64> u… 18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = sdiv <4 x i64> u… 19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = sdiv <8 x i64> … 20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sdiv i32 undef, und… 21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i32 = sdiv <4 x i32> u… 22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i32 = sdiv <8 x i32> … 23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i32 = sdiv <16 x i32… [all …]
|
/external/llvm-project/llvm/test/MC/ARM/ |
D | idiv.s | 13 sdiv r1, r2, r3 15 @ A15-ARM: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 17 @ A15-THUMB: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 20 @ A15-ARM-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 22 @ A15-THUMB-NOARMHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 25 @ ARMV8: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 27 @ THUMBV8: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 30 @ ARMV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 32 @ THUMBV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
|
/external/llvm/test/MC/ARM/ |
D | idiv.s | 13 sdiv r1, r2, r3 15 @ A15-ARM: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 17 @ A15-THUMB: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 20 @ A15-ARM-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 22 @ A15-THUMB-NOARMHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 25 @ ARMV8: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 27 @ THUMBV8: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1] 30 @ ARMV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7] 32 @ THUMBV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
|