1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; This test makes sure that div instructions are properly eliminated. 3 4; RUN: opt < %s -instcombine -S | FileCheck %s 5 6define i32 @test1(i32 %A) { 7; CHECK-LABEL: @test1( 8; CHECK-NEXT: ret i32 [[A:%.*]] 9; 10 %B = sdiv i32 %A, 1 11 ret i32 %B 12} 13 14define i32 @test2(i32 %A) { 15; CHECK-LABEL: @test2( 16; CHECK-NEXT: [[B:%.*]] = lshr i32 [[A:%.*]], 3 17; CHECK-NEXT: ret i32 [[B]] 18; 19 %B = udiv i32 %A, 8 20 ret i32 %B 21} 22 23define i32 @sdiv_by_minus1(i32 %A) { 24; CHECK-LABEL: @sdiv_by_minus1( 25; CHECK-NEXT: [[B:%.*]] = sub i32 0, [[A:%.*]] 26; CHECK-NEXT: ret i32 [[B]] 27; 28 %B = sdiv i32 %A, -1 29 ret i32 %B 30} 31 32define <2 x i64> @sdiv_by_minus1_vec(<2 x i64> %x) { 33; CHECK-LABEL: @sdiv_by_minus1_vec( 34; CHECK-NEXT: [[DIV:%.*]] = sub <2 x i64> zeroinitializer, [[X:%.*]] 35; CHECK-NEXT: ret <2 x i64> [[DIV]] 36; 37 %div = sdiv <2 x i64> %x, <i64 -1, i64 -1> 38 ret <2 x i64> %div 39} 40 41define <2 x i64> @sdiv_by_minus1_vec_undef_elt(<2 x i64> %x) { 42; CHECK-LABEL: @sdiv_by_minus1_vec_undef_elt( 43; CHECK-NEXT: ret <2 x i64> undef 44; 45 %div = sdiv <2 x i64> %x, <i64 -1, i64 undef> 46 ret <2 x i64> %div 47} 48 49define i32 @sdiv_by_sext_minus1(i1 %x, i32 %y) { 50; CHECK-LABEL: @sdiv_by_sext_minus1( 51; CHECK-NEXT: [[DIV:%.*]] = sub i32 0, [[Y:%.*]] 52; CHECK-NEXT: ret i32 [[DIV]] 53; 54 %sext = sext i1 %x to i32 55 %div = sdiv i32 %y, %sext 56 ret i32 %div 57} 58 59define <2 x i32> @sdiv_by_sext_minus1_vec(<2 x i1> %x, <2 x i32> %y) { 60; CHECK-LABEL: @sdiv_by_sext_minus1_vec( 61; CHECK-NEXT: [[DIV:%.*]] = sub <2 x i32> zeroinitializer, [[Y:%.*]] 62; CHECK-NEXT: ret <2 x i32> [[DIV]] 63; 64 %sext = sext <2 x i1> %x to <2 x i32> 65 %div = sdiv <2 x i32> %y, %sext 66 ret <2 x i32> %div 67} 68 69define i8 @udiv_by_negative(i8 %x) { 70; CHECK-LABEL: @udiv_by_negative( 71; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], -7 72; CHECK-NEXT: [[A:%.*]] = zext i1 [[TMP1]] to i8 73; CHECK-NEXT: ret i8 [[A]] 74; 75 %A = udiv i8 %x, 250 76 ret i8 %A 77} 78 79define i32 @udiv_by_minus1(i32 %A) { 80; CHECK-LABEL: @udiv_by_minus1( 81; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], -1 82; CHECK-NEXT: [[B:%.*]] = zext i1 [[TMP1]] to i32 83; CHECK-NEXT: ret i32 [[B]] 84; 85 %B = udiv i32 %A, -1 86 ret i32 %B 87} 88 89define <2 x i64> @udiv_by_minus1_vec(<2 x i64> %x) { 90; CHECK-LABEL: @udiv_by_minus1_vec( 91; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[X:%.*]], <i64 -1, i64 -1> 92; CHECK-NEXT: [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64> 93; CHECK-NEXT: ret <2 x i64> [[DIV]] 94; 95 %div = udiv <2 x i64> %x, <i64 -1, i64 -1> 96 ret <2 x i64> %div 97} 98 99define i32 @udiv_by_sext_all_ones(i1 %x, i32 %y) { 100; CHECK-LABEL: @udiv_by_sext_all_ones( 101; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[Y:%.*]], -1 102; CHECK-NEXT: [[DIV:%.*]] = zext i1 [[TMP1]] to i32 103; CHECK-NEXT: ret i32 [[DIV]] 104; 105 %sext = sext i1 %x to i32 106 %div = udiv i32 %y, %sext 107 ret i32 %div 108} 109 110define <2 x i32> @udiv_by_sext_all_ones_vec(<2 x i1> %x, <2 x i32> %y) { 111; CHECK-LABEL: @udiv_by_sext_all_ones_vec( 112; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[Y:%.*]], <i32 -1, i32 -1> 113; CHECK-NEXT: [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32> 114; CHECK-NEXT: ret <2 x i32> [[DIV]] 115; 116 %sext = sext <2 x i1> %x to <2 x i32> 117 %div = udiv <2 x i32> %y, %sext 118 ret <2 x i32> %div 119} 120 121define i32 @test5(i32 %A) { 122; CHECK-LABEL: @test5( 123; CHECK-NEXT: ret i32 0 124; 125 %B = udiv i32 %A, -16 126 %C = udiv i32 %B, -4 127 ret i32 %C 128} 129 130define i1 @test6(i32 %A) { 131; CHECK-LABEL: @test6( 132; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 123 133; CHECK-NEXT: ret i1 [[TMP1]] 134; 135 %B = udiv i32 %A, 123 136 ; A < 123 137 %C = icmp eq i32 %B, 0 138 ret i1 %C 139} 140 141define i1 @test7(i32 %A) { 142; CHECK-LABEL: @test7( 143; CHECK-NEXT: [[A_OFF:%.*]] = add i32 [[A:%.*]], -20 144; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 10 145; CHECK-NEXT: ret i1 [[TMP1]] 146; 147 %B = udiv i32 %A, 10 148 ; A >= 20 && A < 30 149 %C = icmp eq i32 %B, 2 150 ret i1 %C 151} 152 153define <2 x i1> @test7vec(<2 x i32> %A) { 154; CHECK-LABEL: @test7vec( 155; CHECK-NEXT: [[A_OFF:%.*]] = add <2 x i32> [[A:%.*]], <i32 -20, i32 -20> 156; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[A_OFF]], <i32 10, i32 10> 157; CHECK-NEXT: ret <2 x i1> [[TMP1]] 158; 159 %B = udiv <2 x i32> %A, <i32 10, i32 10> 160 %C = icmp eq <2 x i32> %B, <i32 2, i32 2> 161 ret <2 x i1> %C 162} 163 164define i1 @test8(i8 %A) { 165; CHECK-LABEL: @test8( 166; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[A:%.*]], -11 167; CHECK-NEXT: ret i1 [[C]] 168; 169 %B = udiv i8 %A, 123 170 ; A >= 246 171 %C = icmp eq i8 %B, 2 172 ret i1 %C 173} 174 175define <2 x i1> @test8vec(<2 x i8> %A) { 176; CHECK-LABEL: @test8vec( 177; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i8> [[A:%.*]], <i8 -11, i8 -11> 178; CHECK-NEXT: ret <2 x i1> [[C]] 179; 180 %B = udiv <2 x i8> %A, <i8 123, i8 123> 181 %C = icmp eq <2 x i8> %B, <i8 2, i8 2> 182 ret <2 x i1> %C 183} 184 185define i1 @test9(i8 %A) { 186; CHECK-LABEL: @test9( 187; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[A:%.*]], -10 188; CHECK-NEXT: ret i1 [[C]] 189; 190 %B = udiv i8 %A, 123 191 ; A < 246 192 %C = icmp ne i8 %B, 2 193 ret i1 %C 194} 195 196define <2 x i1> @test9vec(<2 x i8> %A) { 197; CHECK-LABEL: @test9vec( 198; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i8> [[A:%.*]], <i8 -10, i8 -10> 199; CHECK-NEXT: ret <2 x i1> [[C]] 200; 201 %B = udiv <2 x i8> %A, <i8 123, i8 123> 202 %C = icmp ne <2 x i8> %B, <i8 2, i8 2> 203 ret <2 x i1> %C 204} 205 206define i32 @test10(i32 %X, i1 %C) { 207; CHECK-LABEL: @test10( 208; CHECK-NEXT: [[R_V:%.*]] = select i1 [[C:%.*]], i32 6, i32 3 209; CHECK-NEXT: [[R:%.*]] = lshr i32 [[X:%.*]], [[R_V]] 210; CHECK-NEXT: ret i32 [[R]] 211; 212 %V = select i1 %C, i32 64, i32 8 213 %R = udiv i32 %X, %V 214 ret i32 %R 215} 216 217define i32 @test11(i32 %X, i1 %C) { 218; CHECK-LABEL: @test11( 219; CHECK-NEXT: [[B_V:%.*]] = select i1 [[C:%.*]], i32 10, i32 5 220; CHECK-NEXT: [[B:%.*]] = lshr i32 [[X:%.*]], [[B_V]] 221; CHECK-NEXT: ret i32 [[B]] 222; 223 %A = select i1 %C, i32 1024, i32 32 224 %B = udiv i32 %X, %A 225 ret i32 %B 226} 227 228; PR2328 229define i32 @test12(i32 %x) { 230; CHECK-LABEL: @test12( 231; CHECK-NEXT: ret i32 1 232; 233 %tmp3 = udiv i32 %x, %x ; 1 234 ret i32 %tmp3 235} 236 237define i32 @test13(i32 %x) { 238; CHECK-LABEL: @test13( 239; CHECK-NEXT: ret i32 1 240; 241 %tmp3 = sdiv i32 %x, %x ; 1 242 ret i32 %tmp3 243} 244 245define i32 @test14(i8 %x) { 246; CHECK-LABEL: @test14( 247; CHECK-NEXT: ret i32 0 248; 249 %zext = zext i8 %x to i32 250 %div = udiv i32 %zext, 257 ; 0 251 ret i32 %div 252} 253 254; PR9814 255define i32 @test15(i32 %a, i32 %b) { 256; CHECK-LABEL: @test15( 257; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[B:%.*]], -2 258; CHECK-NEXT: [[DIV2:%.*]] = lshr i32 [[A:%.*]], [[TMP1]] 259; CHECK-NEXT: ret i32 [[DIV2]] 260; 261 %shl = shl i32 1, %b 262 %div = lshr i32 %shl, 2 263 %div2 = udiv i32 %a, %div 264 ret i32 %div2 265} 266 267define <2 x i64> @test16(<2 x i64> %x) { 268; CHECK-LABEL: @test16( 269; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i64> [[X:%.*]], <i64 192, i64 192> 270; CHECK-NEXT: ret <2 x i64> [[DIV]] 271; 272 %shr = lshr <2 x i64> %x, <i64 5, i64 5> 273 %div = udiv <2 x i64> %shr, <i64 6, i64 6> 274 ret <2 x i64> %div 275} 276 277define i32 @test19(i32 %x) { 278; CHECK-LABEL: @test19( 279; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 1 280; CHECK-NEXT: [[A:%.*]] = zext i1 [[TMP1]] to i32 281; CHECK-NEXT: ret i32 [[A]] 282; 283 %A = udiv i32 1, %x 284 ret i32 %A 285} 286 287define <2 x i32> @test19vec(<2 x i32> %x) { 288; CHECK-LABEL: @test19vec( 289; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 1, i32 1> 290; CHECK-NEXT: [[A:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32> 291; CHECK-NEXT: ret <2 x i32> [[A]] 292; 293 %A = udiv <2 x i32> <i32 1, i32 1>, %x 294 ret <2 x i32> %A 295} 296 297define i32 @test20(i32 %x) { 298; CHECK-LABEL: @test20( 299; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1 300; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 3 301; CHECK-NEXT: [[A:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 0 302; CHECK-NEXT: ret i32 [[A]] 303; 304 %A = sdiv i32 1, %x 305 ret i32 %A 306} 307 308define <2 x i32> @test20vec(<2 x i32> %x) { 309; CHECK-LABEL: @test20vec( 310; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 1, i32 1> 311; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i32> [[TMP1]], <i32 3, i32 3> 312; CHECK-NEXT: [[A:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[X]], <2 x i32> zeroinitializer 313; CHECK-NEXT: ret <2 x i32> [[A]] 314; 315 %A = sdiv <2 x i32> <i32 1, i32 1>, %x 316 ret <2 x i32> %A 317} 318 319define i32 @test21(i32 %a) { 320; CHECK-LABEL: @test21( 321; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], 3 322; CHECK-NEXT: ret i32 [[DIV]] 323; 324 %shl = shl nsw i32 %a, 2 325 %div = sdiv i32 %shl, 12 326 ret i32 %div 327} 328 329define i32 @test22(i32 %a) { 330; CHECK-LABEL: @test22( 331; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], 4 332; CHECK-NEXT: ret i32 [[DIV]] 333; 334 %mul = mul nsw i32 %a, 3 335 %div = sdiv i32 %mul, 12 336 ret i32 %div 337} 338 339define i32 @test23(i32 %a) { 340; CHECK-LABEL: @test23( 341; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A:%.*]], 3 342; CHECK-NEXT: ret i32 [[DIV]] 343; 344 %shl = shl nuw i32 %a, 2 345 %div = udiv i32 %shl, 12 346 ret i32 %div 347} 348 349define i32 @test24(i32 %a) { 350; CHECK-LABEL: @test24( 351; CHECK-NEXT: [[DIV:%.*]] = lshr i32 [[A:%.*]], 2 352; CHECK-NEXT: ret i32 [[DIV]] 353; 354 %mul = mul nuw i32 %a, 3 355 %div = udiv i32 %mul, 12 356 ret i32 %div 357} 358 359define i32 @test25(i32 %a) { 360; CHECK-LABEL: @test25( 361; CHECK-NEXT: [[DIV:%.*]] = shl nsw i32 [[A:%.*]], 1 362; CHECK-NEXT: ret i32 [[DIV]] 363; 364 %shl = shl nsw i32 %a, 2 365 %div = sdiv i32 %shl, 2 366 ret i32 %div 367} 368 369define i32 @test26(i32 %a) { 370; CHECK-LABEL: @test26( 371; CHECK-NEXT: [[DIV:%.*]] = shl nsw i32 [[A:%.*]], 2 372; CHECK-NEXT: ret i32 [[DIV]] 373; 374 %mul = mul nsw i32 %a, 12 375 %div = sdiv i32 %mul, 3 376 ret i32 %div 377} 378 379define i32 @test27(i32 %a) { 380; CHECK-LABEL: @test27( 381; CHECK-NEXT: [[DIV:%.*]] = shl nuw i32 [[A:%.*]], 1 382; CHECK-NEXT: ret i32 [[DIV]] 383; 384 %shl = shl nuw i32 %a, 2 385 %div = udiv i32 %shl, 2 386 ret i32 %div 387} 388 389define i32 @test28(i32 %a) { 390; CHECK-LABEL: @test28( 391; CHECK-NEXT: [[DIV:%.*]] = mul nuw i32 [[A:%.*]], 12 392; CHECK-NEXT: ret i32 [[DIV]] 393; 394 %mul = mul nuw i32 %a, 36 395 %div = udiv i32 %mul, 3 396 ret i32 %div 397} 398 399define i32 @test29(i32 %a) { 400; CHECK-LABEL: @test29( 401; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], -1 402; CHECK-NEXT: [[DIV:%.*]] = zext i1 [[TMP1]] to i32 403; CHECK-NEXT: ret i32 [[DIV]] 404; 405 %mul = shl nsw i32 %a, 31 406 %div = sdiv i32 %mul, -2147483648 407 ret i32 %div 408} 409 410define i32 @test30(i32 %a) { 411; CHECK-LABEL: @test30( 412; CHECK-NEXT: ret i32 [[A:%.*]] 413; 414 %mul = shl nuw i32 %a, 31 415 %div = udiv i32 %mul, -2147483648 416 ret i32 %div 417} 418 419define <2 x i32> @test31(<2 x i32> %x) { 420; CHECK-LABEL: @test31( 421; CHECK-NEXT: ret <2 x i32> zeroinitializer 422; 423 %shr = lshr <2 x i32> %x, <i32 31, i32 31> 424 %div = udiv <2 x i32> %shr, <i32 2147483647, i32 2147483647> 425 ret <2 x i32> %div 426} 427 428define i32 @test32(i32 %a, i32 %b) { 429; CHECK-LABEL: @test32( 430; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[B:%.*]] 431; CHECK-NEXT: [[DIV:%.*]] = lshr i32 [[SHL]], 2 432; CHECK-NEXT: [[DIV2:%.*]] = udiv i32 [[A:%.*]], [[DIV]] 433; CHECK-NEXT: ret i32 [[DIV2]] 434; 435 %shl = shl i32 2, %b 436 %div = lshr i32 %shl, 2 437 %div2 = udiv i32 %a, %div 438 ret i32 %div2 439} 440 441define <2 x i64> @test33(<2 x i64> %x) { 442; CHECK-LABEL: @test33( 443; CHECK-NEXT: [[DIV:%.*]] = udiv exact <2 x i64> [[X:%.*]], <i64 192, i64 192> 444; CHECK-NEXT: ret <2 x i64> [[DIV]] 445; 446 %shr = lshr exact <2 x i64> %x, <i64 5, i64 5> 447 %div = udiv exact <2 x i64> %shr, <i64 6, i64 6> 448 ret <2 x i64> %div 449} 450 451; -X / C --> X / -C (if negation does not overflow) 452 453define i8 @sdiv_negated_dividend_constant_divisor(i8 %x) { 454; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor( 455; CHECK-NEXT: [[D:%.*]] = sdiv i8 [[X:%.*]], 42 456; CHECK-NEXT: ret i8 [[D]] 457; 458 %neg = sub nsw i8 0, %x 459 %d = sdiv i8 %neg, -42 460 ret i8 %d 461} 462 463define <2 x i8> @sdiv_negated_dividend_constant_divisor_vec_splat(<2 x i8> %x) { 464; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor_vec_splat( 465; CHECK-NEXT: [[D:%.*]] = sdiv <2 x i8> [[X:%.*]], <i8 42, i8 42> 466; CHECK-NEXT: ret <2 x i8> [[D]] 467; 468 %neg = sub nsw <2 x i8> zeroinitializer, %x 469 %d = sdiv <2 x i8> %neg, <i8 -42, i8 -42> 470 ret <2 x i8> %d 471} 472 473define i8 @sdiv_exact_negated_dividend_constant_divisor(i8 %x) { 474; CHECK-LABEL: @sdiv_exact_negated_dividend_constant_divisor( 475; CHECK-NEXT: [[D:%.*]] = sdiv exact i8 [[X:%.*]], 42 476; CHECK-NEXT: ret i8 [[D]] 477; 478 %neg = sub nsw i8 0, %x 479 %d = sdiv exact i8 %neg, -42 480 ret i8 %d 481} 482 483define <2 x i8> @sdiv_exact_negated_dividend_constant_divisor_vec_splat(<2 x i8> %x) { 484; CHECK-LABEL: @sdiv_exact_negated_dividend_constant_divisor_vec_splat( 485; CHECK-NEXT: [[D:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 42, i8 42> 486; CHECK-NEXT: ret <2 x i8> [[D]] 487; 488 %neg = sub nsw <2 x i8> zeroinitializer, %x 489 %d = sdiv exact <2 x i8> %neg, <i8 -42, i8 -42> 490 ret <2 x i8> %d 491} 492 493define i8 @sdiv_negated_dividend_constant_divisor_smin(i8 %x) { 494; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor_smin( 495; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], -128 496; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i8 497; CHECK-NEXT: ret i8 [[D]] 498; 499 %neg = sub nsw i8 0, %x 500 %d = sdiv i8 %neg, -128 501 ret i8 %d 502} 503 504define <2 x i8> @sdiv_negated_dividend_constant_divisor_vec_splat_smin(<2 x i8> %x) { 505; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor_vec_splat_smin( 506; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -128, i8 -128> 507; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8> 508; CHECK-NEXT: ret <2 x i8> [[D]] 509; 510 %neg = sub nsw <2 x i8> zeroinitializer, %x 511 %d = sdiv <2 x i8> %neg, <i8 -128, i8 -128> 512 ret <2 x i8> %d 513} 514 515define <2 x i8> @sdiv_negated_dividend_constant_divisor_vec_undef(<2 x i8> %x) { 516; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor_vec_undef( 517; CHECK-NEXT: ret <2 x i8> undef 518; 519 %neg = sub nsw <2 x i8> zeroinitializer, %x 520 %d = sdiv <2 x i8> %neg, <i8 -128, i8 undef> 521 ret <2 x i8> %d 522} 523 524define <2 x i64> @sdiv_negated_dividend_constant_divisor_vec(<2 x i64> %x) { 525; CHECK-LABEL: @sdiv_negated_dividend_constant_divisor_vec( 526; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i64> [[X:%.*]], <i64 -3, i64 -4> 527; CHECK-NEXT: ret <2 x i64> [[DIV]] 528; 529 %neg = sub nsw <2 x i64> zeroinitializer, %x 530 %div = sdiv <2 x i64> %neg, <i64 3, i64 4> 531 ret <2 x i64> %div 532} 533 534define <2 x i64> @sdiv_exact_negated_dividend_constant_divisor_vec(<2 x i64> %x) { 535; CHECK-LABEL: @sdiv_exact_negated_dividend_constant_divisor_vec( 536; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i64> [[X:%.*]], <i64 -3, i64 -4> 537; CHECK-NEXT: ret <2 x i64> [[DIV]] 538; 539 %neg = sub nsw <2 x i64> zeroinitializer, %x 540 %div = sdiv exact <2 x i64> %neg, <i64 3, i64 4> 541 ret <2 x i64> %div 542} 543 544; Can't negate signed min vector element. 545 546define <2 x i8> @sdiv_exact_negated_dividend_constant_divisor_vec_overflow(<2 x i8> %x) { 547; CHECK-LABEL: @sdiv_exact_negated_dividend_constant_divisor_vec_overflow( 548; CHECK-NEXT: [[DIV1:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 -128, i8 42> 549; CHECK-NEXT: [[DIV:%.*]] = sub nsw <2 x i8> zeroinitializer, [[DIV1]] 550; CHECK-NEXT: ret <2 x i8> [[DIV]] 551; 552 %neg = sub nsw <2 x i8> zeroinitializer, %x 553 %div = sdiv exact <2 x i8> %neg, <i8 -128, i8 42> 554 ret <2 x i8> %div 555} 556 557define i32 @test35(i32 %A) { 558; CHECK-LABEL: @test35( 559; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 2147483647 560; CHECK-NEXT: [[MUL:%.*]] = udiv exact i32 [[AND]], 2147483647 561; CHECK-NEXT: ret i32 [[MUL]] 562; 563 %and = and i32 %A, 2147483647 564 %mul = sdiv exact i32 %and, 2147483647 565 ret i32 %mul 566} 567 568define <2 x i32> @test35vec(<2 x i32> %A) { 569; CHECK-LABEL: @test35vec( 570; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A:%.*]], <i32 2147483647, i32 2147483647> 571; CHECK-NEXT: [[MUL:%.*]] = udiv exact <2 x i32> [[AND]], <i32 2147483647, i32 2147483647> 572; CHECK-NEXT: ret <2 x i32> [[MUL]] 573; 574 %and = and <2 x i32> %A, <i32 2147483647, i32 2147483647> 575 %mul = sdiv exact <2 x i32> %and, <i32 2147483647, i32 2147483647> 576 ret <2 x i32> %mul 577} 578 579define i32 @test36(i32 %A) { 580; CHECK-LABEL: @test36( 581; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 2147483647 582; CHECK-NEXT: [[MUL:%.*]] = lshr exact i32 [[AND]], [[A]] 583; CHECK-NEXT: ret i32 [[MUL]] 584; 585 %and = and i32 %A, 2147483647 586 %shl = shl nsw i32 1, %A 587 %mul = sdiv exact i32 %and, %shl 588 ret i32 %mul 589} 590 591define <2 x i32> @test36vec(<2 x i32> %A) { 592; CHECK-LABEL: @test36vec( 593; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A:%.*]], <i32 2147483647, i32 2147483647> 594; CHECK-NEXT: [[MUL:%.*]] = lshr exact <2 x i32> [[AND]], [[A]] 595; CHECK-NEXT: ret <2 x i32> [[MUL]] 596; 597 %and = and <2 x i32> %A, <i32 2147483647, i32 2147483647> 598 %shl = shl nsw <2 x i32> <i32 1, i32 1>, %A 599 %mul = sdiv exact <2 x i32> %and, %shl 600 ret <2 x i32> %mul 601} 602 603define i32 @test37(i32* %b) { 604; CHECK-LABEL: @test37( 605; CHECK-NEXT: entry: 606; CHECK-NEXT: store i32 0, i32* [[B:%.*]], align 4 607; CHECK-NEXT: br i1 undef, label [[LOR_RHS:%.*]], label [[LOR_END:%.*]] 608; CHECK: lor.rhs: 609; CHECK-NEXT: br label [[LOR_END]] 610; CHECK: lor.end: 611; CHECK-NEXT: ret i32 0 612; 613entry: 614 store i32 0, i32* %b, align 4 615 %0 = load i32, i32* %b, align 4 616 br i1 undef, label %lor.rhs, label %lor.end 617 618lor.rhs: ; preds = %entry 619 %mul = mul nsw i32 undef, %0 620 br label %lor.end 621 622lor.end: ; preds = %lor.rhs, %entry 623 %t.0 = phi i32 [ %0, %entry ], [ %mul, %lor.rhs ] 624 %div = sdiv i32 %t.0, 2 625 ret i32 %div 626} 627 628; We can perform the division in the smaller type. 629 630define i32 @shrink(i8 %x) { 631; CHECK-LABEL: @shrink( 632; CHECK-NEXT: [[TMP1:%.*]] = sdiv i8 [[X:%.*]], 127 633; CHECK-NEXT: [[DIV:%.*]] = sext i8 [[TMP1]] to i32 634; CHECK-NEXT: ret i32 [[DIV]] 635; 636 %conv = sext i8 %x to i32 637 %div = sdiv i32 %conv, 127 638 ret i32 %div 639} 640 641; Division in the smaller type can lead to more optimizations. 642 643define i32 @zap(i8 %x) { 644; CHECK-LABEL: @zap( 645; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], -128 646; CHECK-NEXT: [[DIV:%.*]] = zext i1 [[TMP1]] to i32 647; CHECK-NEXT: ret i32 [[DIV]] 648; 649 %conv = sext i8 %x to i32 650 %div = sdiv i32 %conv, -128 651 ret i32 %div 652} 653 654; Splat constant divisors should get the same folds. 655 656define <3 x i32> @shrink_vec(<3 x i8> %x) { 657; CHECK-LABEL: @shrink_vec( 658; CHECK-NEXT: [[TMP1:%.*]] = sdiv <3 x i8> [[X:%.*]], <i8 127, i8 127, i8 127> 659; CHECK-NEXT: [[DIV:%.*]] = sext <3 x i8> [[TMP1]] to <3 x i32> 660; CHECK-NEXT: ret <3 x i32> [[DIV]] 661; 662 %conv = sext <3 x i8> %x to <3 x i32> 663 %div = sdiv <3 x i32> %conv, <i32 127, i32 127, i32 127> 664 ret <3 x i32> %div 665} 666 667define <2 x i32> @zap_vec(<2 x i8> %x) { 668; CHECK-LABEL: @zap_vec( 669; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -128, i8 -128> 670; CHECK-NEXT: [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32> 671; CHECK-NEXT: ret <2 x i32> [[DIV]] 672; 673 %conv = sext <2 x i8> %x to <2 x i32> 674 %div = sdiv <2 x i32> %conv, <i32 -128, i32 -128> 675 ret <2 x i32> %div 676} 677 678; But we can't do this if the signed constant won't fit in the original type. 679 680define i32 @shrink_no(i8 %x) { 681; CHECK-LABEL: @shrink_no( 682; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32 683; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 128 684; CHECK-NEXT: ret i32 [[DIV]] 685; 686 %conv = sext i8 %x to i32 687 %div = sdiv i32 %conv, 128 688 ret i32 %div 689} 690 691; When the divisor is known larger than the quotient, 692; InstSimplify should kill it before InstCombine sees it. 693 694define i32 @shrink_no2(i8 %x) { 695; CHECK-LABEL: @shrink_no2( 696; CHECK-NEXT: ret i32 0 697; 698 %conv = sext i8 %x to i32 699 %div = sdiv i32 %conv, -129 700 ret i32 %div 701} 702 703define i32 @shrink_no3(i16 %x) { 704; CHECK-LABEL: @shrink_no3( 705; CHECK-NEXT: ret i32 0 706; 707 %conv = sext i16 %x to i32 708 %div = sdiv i32 %conv, 65535 709 ret i32 %div 710} 711 712; This previously crashed when trying to simplify the zext/icmp this becomes. 713define <2 x i8> @PR34841(<2 x i8> %x) { 714; CHECK-LABEL: @PR34841( 715; CHECK-NEXT: ret <2 x i8> zeroinitializer 716; 717 %neg = and <2 x i8> %x, <i8 2, i8 2> 718 %div = udiv <2 x i8> <i8 1, i8 1>, %neg 719 ret <2 x i8> %div 720} 721 722; X / (X * Y) -> 1 / Y if the multiplication does not overflow 723 724define i8 @div_factor_signed(i8 %x, i8 %y) { 725; CHECK-LABEL: @div_factor_signed( 726; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y:%.*]], 1 727; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 3 728; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i8 [[Y]], i8 0 729; CHECK-NEXT: ret i8 [[R]] 730; 731 %a = mul nsw i8 %x, %y 732 %r = sdiv i8 %x, %a 733 ret i8 %r 734} 735 736; X / (Y * X) -> 1 / Y if the multiplication does not overflow 737 738define <2 x i8> @div_factor_signed_vec(<2 x i8> %x, <2 x i8> %y) { 739; CHECK-LABEL: @div_factor_signed_vec( 740; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[Y:%.*]], <i8 1, i8 1> 741; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 3, i8 3> 742; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[TMP2]], <2 x i8> [[Y]], <2 x i8> zeroinitializer 743; CHECK-NEXT: ret <2 x i8> [[R]] 744; 745 %a = mul nsw <2 x i8> %y, %x 746 %r = sdiv <2 x i8> %x, %a 747 ret <2 x i8> %r 748} 749 750; X / (Y * X) -> 1 / Y if the multiplication does not overflow 751 752define i8 @div_factor_unsigned(i8 %x, i8 %y) { 753; CHECK-LABEL: @div_factor_unsigned( 754; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 1 755; CHECK-NEXT: [[R:%.*]] = zext i1 [[TMP1]] to i8 756; CHECK-NEXT: ret i8 [[R]] 757; 758 %a = mul nuw i8 %y, %x 759 %r = udiv i8 %x, %a 760 ret i8 %r 761} 762 763; X / (X * Y) -> 1 / Y if the multiplication does not overflow 764 765define <2 x i8> @div_factor_unsigned_vec(<2 x i8> %x, <2 x i8> %y) { 766; CHECK-LABEL: @div_factor_unsigned_vec( 767; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[Y:%.*]], <i8 1, i8 1> 768; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8> 769; CHECK-NEXT: ret <2 x i8> [[R]] 770; 771 %a = mul nuw <2 x i8> %x, %y 772 %r = udiv <2 x i8> %x, %a 773 ret <2 x i8> %r 774} 775 776define i8 @udiv_common_factor(i8 %x, i8 %y, i8 %z) { 777; CHECK-LABEL: @udiv_common_factor( 778; CHECK-NEXT: [[C:%.*]] = udiv i8 [[X:%.*]], [[Y:%.*]] 779; CHECK-NEXT: ret i8 [[C]] 780; 781 %a = mul nuw i8 %z, %x 782 %b = mul nuw i8 %z, %y 783 %c = udiv i8 %a, %b 784 ret i8 %c 785} 786 787define <2 x i8> @udiv_common_factor_commute1_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) { 788; CHECK-LABEL: @udiv_common_factor_commute1_vec( 789; CHECK-NEXT: [[C:%.*]] = udiv <2 x i8> [[X:%.*]], [[Y:%.*]] 790; CHECK-NEXT: ret <2 x i8> [[C]] 791; 792 %a = mul nuw <2 x i8> %x, %z 793 %b = mul nuw <2 x i8> %z, %y 794 %c = udiv <2 x i8> %a, %b 795 ret <2 x i8> %c 796} 797 798define i8 @udiv_common_factor_commute2(i8 %x, i8 %y, i8 %z) { 799; CHECK-LABEL: @udiv_common_factor_commute2( 800; CHECK-NEXT: [[C:%.*]] = udiv i8 [[X:%.*]], [[Y:%.*]] 801; CHECK-NEXT: ret i8 [[C]] 802; 803 %a = mul nuw i8 %x, %z 804 %b = mul nuw i8 %y, %z 805 %c = udiv i8 %a, %b 806 ret i8 %c 807} 808 809define i8 @udiv_common_factor_commute3(i8 %x, i8 %y, i8 %z) { 810; CHECK-LABEL: @udiv_common_factor_commute3( 811; CHECK-NEXT: [[C:%.*]] = udiv i8 [[X:%.*]], [[Y:%.*]] 812; CHECK-NEXT: ret i8 [[C]] 813; 814 %a = mul nuw i8 %z, %x 815 %b = mul nuw i8 %y, %z 816 %c = udiv i8 %a, %b 817 ret i8 %c 818} 819 820; Negative test: both mul must be 'nuw'. 821 822define i8 @udiv_common_factor_not_nuw(i8 %x, i8 %y, i8 %z) { 823; CHECK-LABEL: @udiv_common_factor_not_nuw( 824; CHECK-NEXT: [[A:%.*]] = mul i8 [[Z:%.*]], [[X:%.*]] 825; CHECK-NEXT: [[B:%.*]] = mul nuw i8 [[Z]], [[Y:%.*]] 826; CHECK-NEXT: [[C:%.*]] = udiv i8 [[A]], [[B]] 827; CHECK-NEXT: ret i8 [[C]] 828; 829 %a = mul i8 %z, %x 830 %b = mul nuw i8 %z, %y 831 %c = udiv i8 %a, %b 832 ret i8 %c 833} 834 835; Negative test: both mul must be 'nuw'. 836 837define <2 x i8> @udiv_common_factor_not_nuw_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) { 838; CHECK-LABEL: @udiv_common_factor_not_nuw_vec( 839; CHECK-NEXT: [[A:%.*]] = mul nuw <2 x i8> [[Z:%.*]], [[X:%.*]] 840; CHECK-NEXT: [[B:%.*]] = mul <2 x i8> [[Z]], [[Y:%.*]] 841; CHECK-NEXT: [[C:%.*]] = udiv <2 x i8> [[A]], [[B]] 842; CHECK-NEXT: ret <2 x i8> [[C]] 843; 844 %a = mul nuw <2 x i8> %z, %x 845 %b = mul <2 x i8> %z, %y 846 %c = udiv <2 x i8> %a, %b 847 ret <2 x i8> %c 848} 849 850define i32 @test_exact_nsw_exact(i32 %x) { 851; CHECK-LABEL: @test_exact_nsw_exact( 852; CHECK-NEXT: [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3 853; CHECK-NEXT: ret i32 [[NEG]] 854; 855 %div = sdiv exact i32 %x, 3 856 %neg = sub nsw i32 0, %div 857 ret i32 %neg 858} 859 860define <2 x i64> @test_exact_vec(<2 x i64> %x) { 861; CHECK-LABEL: @test_exact_vec( 862; CHECK-NEXT: [[NEG:%.*]] = sdiv exact <2 x i64> [[X:%.*]], <i64 -3, i64 -4> 863; CHECK-NEXT: ret <2 x i64> [[NEG]] 864; 865 %div = sdiv exact <2 x i64> %x, <i64 3, i64 4> 866 %neg = sub nsw <2 x i64> zeroinitializer, %div 867 ret <2 x i64> %neg 868} 869 870; Constant is safe to negate. 871 872define <2 x i8> @negate_sdiv_vec_splat(<2 x i8> %x) { 873; CHECK-LABEL: @negate_sdiv_vec_splat( 874; CHECK-NEXT: [[NEG:%.*]] = sdiv <2 x i8> [[X:%.*]], <i8 -42, i8 -42> 875; CHECK-NEXT: ret <2 x i8> [[NEG]] 876; 877 %div = sdiv <2 x i8> %x, <i8 42, i8 42> 878 %neg = sub <2 x i8> zeroinitializer, %div 879 ret <2 x i8> %neg 880} 881 882; Dividing by undef is UB. 883 884define <2 x i8> @negate_sdiv_vec_undef_elt(<2 x i8> %x) { 885; CHECK-LABEL: @negate_sdiv_vec_undef_elt( 886; CHECK-NEXT: ret <2 x i8> undef 887; 888 %div = sdiv <2 x i8> %x, <i8 undef, i8 42> 889 %neg = sub <2 x i8> zeroinitializer, %div 890 ret <2 x i8> %neg 891} 892 893; Division by -1 may be UB (if numerator is the signed min val), but div-by-1 can be simplified. 894 895define <2 x i8> @negate_sdiv_vec_splat_one(<2 x i8> %x) { 896; CHECK-LABEL: @negate_sdiv_vec_splat_one( 897; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X:%.*]] 898; CHECK-NEXT: ret <2 x i8> [[NEG]] 899; 900 %div = sdiv <2 x i8> %x, <i8 1, i8 1> 901 %neg = sub <2 x i8> zeroinitializer, %div 902 ret <2 x i8> %neg 903} 904 905; Can't negate signed-min constant, but can convert to a compare.. 906 907define <2 x i8> @negate_sdiv_vec_splat_signed_min(<2 x i8> %x) { 908; CHECK-LABEL: @negate_sdiv_vec_splat_signed_min( 909; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -128, i8 -128> 910; CHECK-NEXT: [[NEG:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i8> 911; CHECK-NEXT: ret <2 x i8> [[NEG]] 912; 913 %div = sdiv <2 x i8> %x, <i8 -128, i8 -128> 914 %neg = sub <2 x i8> zeroinitializer, %div 915 ret <2 x i8> %neg 916} 917 918; Division by -1 may be UB for any element of a vector. 919 920define <2 x i8> @negate_sdiv_vec_one_element(<2 x i8> %x) { 921; CHECK-LABEL: @negate_sdiv_vec_one_element( 922; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i8> [[X:%.*]], <i8 -1, i8 1> 923; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[DIV]] 924; CHECK-NEXT: ret <2 x i8> [[NEG]] 925; 926 %div = sdiv <2 x i8> %x, <i8 -1, i8 1> 927 %neg = sub <2 x i8> zeroinitializer, %div 928 ret <2 x i8> %neg 929} 930 931; Can't negate signed-min constant for any element of a vector. 932 933define <2 x i8> @negate_sdiv_vec_signed_min_elt(<2 x i8> %x) { 934; CHECK-LABEL: @negate_sdiv_vec_signed_min_elt( 935; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i8> [[X:%.*]], <i8 -1, i8 -128> 936; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[DIV]] 937; CHECK-NEXT: ret <2 x i8> [[NEG]] 938; 939 %div = sdiv <2 x i8> %x, <i8 -1, i8 -128> 940 %neg = sub <2 x i8> zeroinitializer, %div 941 ret <2 x i8> %neg 942} 943 944; Division by -1 may be UB and can't negate signed-min. 945 946define <2 x i8> @negate_sdiv_vec_signed_min_and_one_elt(<2 x i8> %x) { 947; CHECK-LABEL: @negate_sdiv_vec_signed_min_and_one_elt( 948; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i8> [[X:%.*]], <i8 1, i8 -128> 949; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[DIV]] 950; CHECK-NEXT: ret <2 x i8> [[NEG]] 951; 952 %div = sdiv <2 x i8> %x, <i8 1, i8 -128> 953 %neg = sub <2 x i8> zeroinitializer, %div 954 ret <2 x i8> %neg 955} 956 957define i32 @test_exact_nonsw_exact(i32 %x) { 958; CHECK-LABEL: @test_exact_nonsw_exact( 959; CHECK-NEXT: [[NEG:%.*]] = sdiv exact i32 [[X:%.*]], -3 960; CHECK-NEXT: ret i32 [[NEG]] 961; 962 %div = sdiv exact i32 %x, 3 963 %neg = sub i32 0, %div 964 ret i32 %neg 965} 966 967define i32 @test_exact_nsw_noexact(i32 %x) { 968; CHECK-LABEL: @test_exact_nsw_noexact( 969; CHECK-NEXT: [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3 970; CHECK-NEXT: ret i32 [[NEG]] 971; 972 %div = sdiv i32 %x, 3 973 %neg = sub nsw i32 0, %div 974 ret i32 %neg 975} 976 977define i32 @test_exact_nonsw_noexact(i32 %x) { 978; CHECK-LABEL: @test_exact_nonsw_noexact( 979; CHECK-NEXT: [[NEG:%.*]] = sdiv i32 [[X:%.*]], -3 980; CHECK-NEXT: ret i32 [[NEG]] 981; 982 %div = sdiv i32 %x, 3 983 %neg = sub i32 0, %div 984 ret i32 %neg 985} 986 987define i32 @test_exact_div_nonconst(i32 %x, i32 %y) { 988; CHECK-LABEL: @test_exact_div_nonconst( 989; CHECK-NEXT: [[DIV:%.*]] = sdiv exact i32 [[X:%.*]], [[Y:%.*]] 990; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[DIV]] 991; CHECK-NEXT: ret i32 [[NEG]] 992; 993 %div = sdiv exact i32 %x, %y 994 %neg = sub nsw i32 0, %div 995 ret i32 %neg 996} 997 998define i32 @test_exact_div_one(i32 %x) { 999; CHECK-LABEL: @test_exact_div_one( 1000; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[X:%.*]] 1001; CHECK-NEXT: ret i32 [[NEG]] 1002; 1003 %div = sdiv exact i32 %x, 1 1004 %neg = sub nsw i32 0, %div 1005 ret i32 %neg 1006} 1007 1008define i8 @test_exact_div_minSigned(i8 %x) { 1009; CHECK-LABEL: @test_exact_div_minSigned( 1010; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], -128 1011; CHECK-NEXT: [[NEG:%.*]] = sext i1 [[TMP1]] to i8 1012; CHECK-NEXT: ret i8 [[NEG]] 1013; 1014 %div = sdiv exact i8 %x, -128 1015 %neg = sub nsw i8 0, %div 1016 ret i8 %neg 1017} 1018 1019; X / INT_MIN --> X == INT_MIN 1020 1021define i8 @sdiv_by_int_min(i8 %x) { 1022; CHECK-LABEL: @sdiv_by_int_min( 1023; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], -128 1024; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i8 1025; CHECK-NEXT: ret i8 [[D]] 1026; 1027 %d = sdiv i8 %x, -128 1028 ret i8 %d 1029} 1030 1031define <2 x i8> @sdiv_by_int_min_vec_splat(<2 x i8> %x) { 1032; CHECK-LABEL: @sdiv_by_int_min_vec_splat( 1033; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -128, i8 -128> 1034; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8> 1035; CHECK-NEXT: ret <2 x i8> [[D]] 1036; 1037 %d = sdiv <2 x i8> %x, <i8 -128, i8 -128> 1038 ret <2 x i8> %d 1039} 1040 1041define <2 x i8> @sdiv_by_int_min_vec_splat_undef(<2 x i8> %x) { 1042; CHECK-LABEL: @sdiv_by_int_min_vec_splat_undef( 1043; CHECK-NEXT: ret <2 x i8> undef 1044; 1045 %d = sdiv <2 x i8> %x, <i8 -128, i8 undef> 1046 ret <2 x i8> %d 1047} 1048