1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef IB_USER_IOCTL_VERBS_H 20 #define IB_USER_IOCTL_VERBS_H 21 #include <linux/types.h> 22 #include <rdma/ib_user_verbs.h> 23 #ifndef RDMA_UAPI_PTR 24 #define RDMA_UAPI_PTR(_type,_name) __aligned_u64 _name 25 #endif 26 #define IB_UVERBS_ACCESS_OPTIONAL_FIRST (1 << 20) 27 #define IB_UVERBS_ACCESS_OPTIONAL_LAST (1 << 29) 28 enum ib_uverbs_core_support { 29 IB_UVERBS_CORE_SUPPORT_OPTIONAL_MR_ACCESS = 1 << 0, 30 }; 31 enum ib_uverbs_access_flags { 32 IB_UVERBS_ACCESS_LOCAL_WRITE = 1 << 0, 33 IB_UVERBS_ACCESS_REMOTE_WRITE = 1 << 1, 34 IB_UVERBS_ACCESS_REMOTE_READ = 1 << 2, 35 IB_UVERBS_ACCESS_REMOTE_ATOMIC = 1 << 3, 36 IB_UVERBS_ACCESS_MW_BIND = 1 << 4, 37 IB_UVERBS_ACCESS_ZERO_BASED = 1 << 5, 38 IB_UVERBS_ACCESS_ON_DEMAND = 1 << 6, 39 IB_UVERBS_ACCESS_HUGETLB = 1 << 7, 40 IB_UVERBS_ACCESS_RELAXED_ORDERING = IB_UVERBS_ACCESS_OPTIONAL_FIRST, 41 IB_UVERBS_ACCESS_OPTIONAL_RANGE = ((IB_UVERBS_ACCESS_OPTIONAL_LAST << 1) - 1) & ~(IB_UVERBS_ACCESS_OPTIONAL_FIRST - 1) 42 }; 43 enum ib_uverbs_srq_type { 44 IB_UVERBS_SRQT_BASIC, 45 IB_UVERBS_SRQT_XRC, 46 IB_UVERBS_SRQT_TM, 47 }; 48 enum ib_uverbs_wq_type { 49 IB_UVERBS_WQT_RQ, 50 }; 51 enum ib_uverbs_wq_flags { 52 IB_UVERBS_WQ_FLAGS_CVLAN_STRIPPING = 1 << 0, 53 IB_UVERBS_WQ_FLAGS_SCATTER_FCS = 1 << 1, 54 IB_UVERBS_WQ_FLAGS_DELAY_DROP = 1 << 2, 55 IB_UVERBS_WQ_FLAGS_PCI_WRITE_END_PADDING = 1 << 3, 56 }; 57 enum ib_uverbs_qp_type { 58 IB_UVERBS_QPT_RC = 2, 59 IB_UVERBS_QPT_UC, 60 IB_UVERBS_QPT_UD, 61 IB_UVERBS_QPT_RAW_PACKET = 8, 62 IB_UVERBS_QPT_XRC_INI, 63 IB_UVERBS_QPT_XRC_TGT, 64 IB_UVERBS_QPT_DRIVER = 0xFF, 65 }; 66 enum ib_uverbs_qp_create_flags { 67 IB_UVERBS_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1, 68 IB_UVERBS_QP_CREATE_SCATTER_FCS = 1 << 8, 69 IB_UVERBS_QP_CREATE_CVLAN_STRIPPING = 1 << 9, 70 IB_UVERBS_QP_CREATE_PCI_WRITE_END_PADDING = 1 << 11, 71 IB_UVERBS_QP_CREATE_SQ_SIG_ALL = 1 << 12, 72 }; 73 enum ib_uverbs_query_port_cap_flags { 74 IB_UVERBS_PCF_SM = 1 << 1, 75 IB_UVERBS_PCF_NOTICE_SUP = 1 << 2, 76 IB_UVERBS_PCF_TRAP_SUP = 1 << 3, 77 IB_UVERBS_PCF_OPT_IPD_SUP = 1 << 4, 78 IB_UVERBS_PCF_AUTO_MIGR_SUP = 1 << 5, 79 IB_UVERBS_PCF_SL_MAP_SUP = 1 << 6, 80 IB_UVERBS_PCF_MKEY_NVRAM = 1 << 7, 81 IB_UVERBS_PCF_PKEY_NVRAM = 1 << 8, 82 IB_UVERBS_PCF_LED_INFO_SUP = 1 << 9, 83 IB_UVERBS_PCF_SM_DISABLED = 1 << 10, 84 IB_UVERBS_PCF_SYS_IMAGE_GUID_SUP = 1 << 11, 85 IB_UVERBS_PCF_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, 86 IB_UVERBS_PCF_EXTENDED_SPEEDS_SUP = 1 << 14, 87 IB_UVERBS_PCF_CM_SUP = 1 << 16, 88 IB_UVERBS_PCF_SNMP_TUNNEL_SUP = 1 << 17, 89 IB_UVERBS_PCF_REINIT_SUP = 1 << 18, 90 IB_UVERBS_PCF_DEVICE_MGMT_SUP = 1 << 19, 91 IB_UVERBS_PCF_VENDOR_CLASS_SUP = 1 << 20, 92 IB_UVERBS_PCF_DR_NOTICE_SUP = 1 << 21, 93 IB_UVERBS_PCF_CAP_MASK_NOTICE_SUP = 1 << 22, 94 IB_UVERBS_PCF_BOOT_MGMT_SUP = 1 << 23, 95 IB_UVERBS_PCF_LINK_LATENCY_SUP = 1 << 24, 96 IB_UVERBS_PCF_CLIENT_REG_SUP = 1 << 25, 97 IB_UVERBS_PCF_LINK_SPEED_WIDTH_TABLE_SUP = 1 << 27, 98 IB_UVERBS_PCF_VENDOR_SPECIFIC_MADS_TABLE_SUP = 1 << 28, 99 IB_UVERBS_PCF_MCAST_PKEY_TRAP_SUPPRESSION_SUP = 1 << 29, 100 IB_UVERBS_PCF_MCAST_FDB_TOP_SUP = 1 << 30, 101 IB_UVERBS_PCF_HIERARCHY_INFO_SUP = 1ULL << 31, 102 IB_UVERBS_PCF_IP_BASED_GIDS = 1 << 26, 103 }; 104 enum ib_uverbs_query_port_flags { 105 IB_UVERBS_QPF_GRH_REQUIRED = 1 << 0, 106 }; 107 enum ib_uverbs_flow_action_esp_keymat { 108 IB_UVERBS_FLOW_ACTION_ESP_KEYMAT_AES_GCM, 109 }; 110 enum ib_uverbs_flow_action_esp_keymat_aes_gcm_iv_algo { 111 IB_UVERBS_FLOW_ACTION_IV_ALGO_SEQ, 112 }; 113 struct ib_uverbs_flow_action_esp_keymat_aes_gcm { 114 __aligned_u64 iv; 115 __u32 iv_algo; 116 __u32 salt; 117 __u32 icv_len; 118 __u32 key_len; 119 __u32 aes_key[256 / 32]; 120 }; 121 enum ib_uverbs_flow_action_esp_replay { 122 IB_UVERBS_FLOW_ACTION_ESP_REPLAY_NONE, 123 IB_UVERBS_FLOW_ACTION_ESP_REPLAY_BMP, 124 }; 125 struct ib_uverbs_flow_action_esp_replay_bmp { 126 __u32 size; 127 }; 128 enum ib_uverbs_flow_action_esp_flags { 129 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_INLINE_CRYPTO = 0UL << 0, 130 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_FULL_OFFLOAD = 1UL << 0, 131 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_TUNNEL = 0UL << 1, 132 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_TRANSPORT = 1UL << 1, 133 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_DECRYPT = 0UL << 2, 134 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_ENCRYPT = 1UL << 2, 135 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_ESN_NEW_WINDOW = 1UL << 3, 136 }; 137 struct ib_uverbs_flow_action_esp_encap { 138 RDMA_UAPI_PTR(void *, val_ptr); 139 RDMA_UAPI_PTR(struct ib_uverbs_flow_action_esp_encap *, next_ptr); 140 __u16 len; 141 __u16 type; 142 }; 143 struct ib_uverbs_flow_action_esp { 144 __u32 spi; 145 __u32 seq; 146 __u32 tfc_pad; 147 __u32 flags; 148 __aligned_u64 hard_limit_pkts; 149 }; 150 enum ib_uverbs_read_counters_flags { 151 IB_UVERBS_READ_COUNTERS_PREFER_CACHED = 1 << 0, 152 }; 153 enum ib_uverbs_advise_mr_advice { 154 IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH, 155 IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_WRITE, 156 IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_NO_FAULT, 157 }; 158 enum ib_uverbs_advise_mr_flag { 159 IB_UVERBS_ADVISE_MR_FLAG_FLUSH = 1 << 0, 160 }; 161 struct ib_uverbs_query_port_resp_ex { 162 struct ib_uverbs_query_port_resp legacy_resp; 163 __u16 port_cap_flags2; 164 __u8 reserved[6]; 165 }; 166 struct ib_uverbs_qp_cap { 167 __u32 max_send_wr; 168 __u32 max_recv_wr; 169 __u32 max_send_sge; 170 __u32 max_recv_sge; 171 __u32 max_inline_data; 172 }; 173 enum rdma_driver_id { 174 RDMA_DRIVER_UNKNOWN, 175 RDMA_DRIVER_MLX5, 176 RDMA_DRIVER_MLX4, 177 RDMA_DRIVER_CXGB3, 178 RDMA_DRIVER_CXGB4, 179 RDMA_DRIVER_MTHCA, 180 RDMA_DRIVER_BNXT_RE, 181 RDMA_DRIVER_OCRDMA, 182 RDMA_DRIVER_NES, 183 RDMA_DRIVER_I40IW, 184 RDMA_DRIVER_VMW_PVRDMA, 185 RDMA_DRIVER_QEDR, 186 RDMA_DRIVER_HNS, 187 RDMA_DRIVER_USNIC, 188 RDMA_DRIVER_RXE, 189 RDMA_DRIVER_HFI1, 190 RDMA_DRIVER_QIB, 191 RDMA_DRIVER_EFA, 192 RDMA_DRIVER_SIW, 193 }; 194 enum ib_uverbs_gid_type { 195 IB_UVERBS_GID_TYPE_IB, 196 IB_UVERBS_GID_TYPE_ROCE_V1, 197 IB_UVERBS_GID_TYPE_ROCE_V2, 198 }; 199 struct ib_uverbs_gid_entry { 200 __aligned_u64 gid[2]; 201 __u32 gid_index; 202 __u32 port_num; 203 __u32 gid_type; 204 __u32 netdev_ifindex; 205 }; 206 #endif 207