1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-wasmsimd.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <wasm_simd128.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
xnn_f32_dwconv_minmax_ukernel_up4x9__wasmsimd_arm_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up4x9__wasmsimd_arm_acc2(
18     size_t channels,
19     size_t output_width,
20     const float** input,
21     const float* weights,
22     float* output,
23     size_t input_stride,
24     size_t output_increment,
25     size_t input_offset,
26     const float* zero,
27     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
28 {
29   assert(channels != 0);
30   assert(output_width != 0);
31 
32   const v128_t vmin = wasm_v32x4_load_splat(&params->scalar.min);
33   const v128_t vmax = wasm_v32x4_load_splat(&params->scalar.max);
34   do {
35     const float* i0 = input[0];
36     assert(i0 != NULL);
37     if XNN_UNPREDICTABLE(i0 != zero) {
38       i0 = (const float*) ((uintptr_t) i0 + input_offset);
39     }
40     const float* i1 = input[1];
41     assert(i1 != NULL);
42     if XNN_UNPREDICTABLE(i1 != zero) {
43       i1 = (const float*) ((uintptr_t) i1 + input_offset);
44     }
45     const float* i2 = input[2];
46     assert(i2 != NULL);
47     if XNN_UNPREDICTABLE(i2 != zero) {
48       i2 = (const float*) ((uintptr_t) i2 + input_offset);
49     }
50     const float* i3 = input[3];
51     assert(i3 != NULL);
52     if XNN_UNPREDICTABLE(i3 != zero) {
53       i3 = (const float*) ((uintptr_t) i3 + input_offset);
54     }
55     const float* i4 = input[4];
56     assert(i4 != NULL);
57     if XNN_UNPREDICTABLE(i4 != zero) {
58       i4 = (const float*) ((uintptr_t) i4 + input_offset);
59     }
60     const float* i5 = input[5];
61     assert(i5 != NULL);
62     if XNN_UNPREDICTABLE(i5 != zero) {
63       i5 = (const float*) ((uintptr_t) i5 + input_offset);
64     }
65     const float* i6 = input[6];
66     assert(i6 != NULL);
67     if XNN_UNPREDICTABLE(i6 != zero) {
68       i6 = (const float*) ((uintptr_t) i6 + input_offset);
69     }
70     const float* i7 = input[7];
71     assert(i7 != NULL);
72     if XNN_UNPREDICTABLE(i7 != zero) {
73       i7 = (const float*) ((uintptr_t) i7 + input_offset);
74     }
75     const float* i8 = input[8];
76     assert(i8 != NULL);
77     if XNN_UNPREDICTABLE(i8 != zero) {
78       i8 = (const float*) ((uintptr_t) i8 + input_offset);
79     }
80     input = (const float**) ((uintptr_t) input + input_stride);
81 
82     size_t c = channels;
83     const float* w = weights;
84     for (; c >= 4; c -= 4) {
85       v128_t vacc0123p0 = wasm_v128_load(w);
86 
87 
88       const v128_t vi0x0123 = wasm_v128_load(i0);
89       i0 += 4;
90 
91       const v128_t vk0x0123 = wasm_v128_load(w + 4);
92       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
93 
94       const v128_t vi1x0123 = wasm_v128_load(i1);
95       i1 += 4;
96 
97       const v128_t vk1x0123 = wasm_v128_load(w + 8);
98       v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
99 
100       const v128_t vi2x0123 = wasm_v128_load(i2);
101       i2 += 4;
102 
103       const v128_t vk2x0123 = wasm_v128_load(w + 12);
104       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
105 
106       const v128_t vi3x0123 = wasm_v128_load(i3);
107       i3 += 4;
108 
109       const v128_t vk3x0123 = wasm_v128_load(w + 16);
110       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
111 
112       const v128_t vi4x0123 = wasm_v128_load(i4);
113       i4 += 4;
114 
115       const v128_t vk4x0123 = wasm_v128_load(w + 20);
116       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
117 
118       const v128_t vi5x0123 = wasm_v128_load(i5);
119       i5 += 4;
120 
121       const v128_t vk5x0123 = wasm_v128_load(w + 24);
122       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
123 
124       const v128_t vi6x0123 = wasm_v128_load(i6);
125       i6 += 4;
126 
127       const v128_t vk6x0123 = wasm_v128_load(w + 28);
128       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
129 
130       const v128_t vi7x0123 = wasm_v128_load(i7);
131       i7 += 4;
132 
133       const v128_t vk7x0123 = wasm_v128_load(w + 32);
134       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
135 
136       const v128_t vi8x0123 = wasm_v128_load(i8);
137       i8 += 4;
138 
139       const v128_t vk8x0123 = wasm_v128_load(w + 36);
140       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
141 
142       w += 40;
143 
144       // Add up all accumulators to vacc0123p0
145       vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
146 
147       v128_t vacc0123 = wasm_f32x4_max(vacc0123p0, vmin);
148 
149       vacc0123 = wasm_f32x4_min(vacc0123, vmax);
150 
151       wasm_v128_store(output, vacc0123);
152       output += 4;
153     }
154     if XNN_UNLIKELY(c != 0) {
155       v128_t vacc0123p0 = wasm_v128_load(w);
156 
157       const v128_t vi0x0123 = wasm_v128_load(i0);
158       const v128_t vk0x0123 = wasm_v128_load(w + 4);
159       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
160 
161       const v128_t vi1x0123 = wasm_v128_load(i1);
162       const v128_t vk1x0123 = wasm_v128_load(w + 8);
163       v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
164 
165       const v128_t vi2x0123 = wasm_v128_load(i2);
166       const v128_t vk2x0123 = wasm_v128_load(w + 12);
167       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
168 
169       const v128_t vi3x0123 = wasm_v128_load(i3);
170       const v128_t vk3x0123 = wasm_v128_load(w + 16);
171       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
172 
173       const v128_t vi4x0123 = wasm_v128_load(i4);
174       const v128_t vk4x0123 = wasm_v128_load(w + 20);
175       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
176 
177       const v128_t vi5x0123 = wasm_v128_load(i5);
178       const v128_t vk5x0123 = wasm_v128_load(w + 24);
179       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
180 
181       const v128_t vi6x0123 = wasm_v128_load(i6);
182       const v128_t vk6x0123 = wasm_v128_load(w + 28);
183       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
184 
185       const v128_t vi7x0123 = wasm_v128_load(i7);
186       const v128_t vk7x0123 = wasm_v128_load(w + 32);
187       vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
188 
189       const v128_t vi8x0123 = wasm_v128_load(i8);
190       const v128_t vk8x0123 = wasm_v128_load(w + 36);
191       vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
192 
193       // Add up all accumulators to vacc0123p0
194       vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
195 
196       v128_t vacc0123 = wasm_f32x4_max(vacc0123p0, vmin);
197       vacc0123 = wasm_f32x4_min(vacc0123, vmax);
198 
199       if (c & 2) {
200         *((double*) output) = wasm_f64x2_extract_lane(vacc0123, 0);
201         vacc0123 = wasm_v32x4_shuffle(vacc0123, vacc0123, 2, 3, 2, 3);
202         output += 2;
203       }
204       if (c & 1) {
205         *output = wasm_f32x4_extract_lane(vacc0123, 0);
206         output += 1;
207       }
208     }
209 
210     output = (float*) ((uintptr_t) output + output_increment);
211   } while (--output_width != 0);
212 }
213