1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15
16
17 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
xnn_f32_dwconv_minmax_ukernel_up8x4__avx_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_f32_dwconv_minmax_ukernel_up8x4__avx_acc2(
20 size_t channels,
21 size_t output_width,
22 const float** input,
23 const float* weights,
24 float* output,
25 size_t input_stride,
26 size_t output_increment,
27 size_t input_offset,
28 const float* zero,
29 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
30 {
31 assert(channels != 0);
32 assert(output_width != 0);
33
34 const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
35 const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
36 do {
37 const float* i0 = input[0];
38 assert(i0 != NULL);
39 if XNN_UNPREDICTABLE(i0 != zero) {
40 i0 = (const float*) ((uintptr_t) i0 + input_offset);
41 }
42 const float* i1 = input[1];
43 assert(i1 != NULL);
44 if XNN_UNPREDICTABLE(i1 != zero) {
45 i1 = (const float*) ((uintptr_t) i1 + input_offset);
46 }
47 const float* i2 = input[2];
48 assert(i2 != NULL);
49 if XNN_UNPREDICTABLE(i2 != zero) {
50 i2 = (const float*) ((uintptr_t) i2 + input_offset);
51 }
52 const float* i3 = input[3];
53 assert(i3 != NULL);
54 if XNN_UNPREDICTABLE(i3 != zero) {
55 i3 = (const float*) ((uintptr_t) i3 + input_offset);
56 }
57 input = (const float**) ((uintptr_t) input + input_stride);
58
59 size_t c = channels;
60 const float* w = weights;
61 for (; c >= 8; c -= 8) {
62 __m256 vacc01234567p0 = _mm256_load_ps(w);
63
64
65 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
66 i0 += 8;
67
68 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
69 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
70
71 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
72 i1 += 8;
73
74 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
75 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
76
77 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
78 i2 += 8;
79
80 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
81 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
82
83 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
84 i3 += 8;
85
86 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
87 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
88
89 w += 40;
90
91 // Add up all accumulators to vacc01234567p0
92 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
93
94 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
95 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
96
97 _mm256_storeu_ps(output, vacc01234567);
98 output += 8;
99 }
100 if XNN_UNLIKELY(c != 0) {
101 assert(c >= 1);
102 assert(c <= 7);
103 __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
104
105 __m256 vacc01234567p0 = _mm256_load_ps(w);
106
107 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
108 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
109 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
110
111 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
112 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
113 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
114
115 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
116 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
117 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
118
119 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
120 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
121 vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
122
123 // Add up all accumulators to vacc01234567p0
124 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
125
126 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
127 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
128
129 // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
130 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
131 if (c & 4) {
132 _mm_storeu_ps(output, vacc0123);
133 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
134 output += 4;
135 }
136 if (c & 2) {
137 _mm_storel_pi((__m64*) output, vacc0123);
138 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
139 output += 2;
140 }
141 if (c & 1) {
142 _mm_store_ss(output, vacc0123);
143 output += 1;
144 }
145 }
146
147 output = (float*) ((uintptr_t) output + output_increment);
148 } while (--output_width != 0);
149 }
150