1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-avx.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
17 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18 
xnn_f32_dwconv_minmax_ukernel_up8x9__avx_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_f32_dwconv_minmax_ukernel_up8x9__avx_acc2(
20     size_t channels,
21     size_t output_width,
22     const float** input,
23     const float* weights,
24     float* output,
25     size_t input_stride,
26     size_t output_increment,
27     size_t input_offset,
28     const float* zero,
29     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
30 {
31   assert(channels != 0);
32   assert(output_width != 0);
33 
34   const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
35   const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
36   do {
37     const float* i0 = input[0];
38     assert(i0 != NULL);
39     if XNN_UNPREDICTABLE(i0 != zero) {
40       i0 = (const float*) ((uintptr_t) i0 + input_offset);
41     }
42     const float* i1 = input[1];
43     assert(i1 != NULL);
44     if XNN_UNPREDICTABLE(i1 != zero) {
45       i1 = (const float*) ((uintptr_t) i1 + input_offset);
46     }
47     const float* i2 = input[2];
48     assert(i2 != NULL);
49     if XNN_UNPREDICTABLE(i2 != zero) {
50       i2 = (const float*) ((uintptr_t) i2 + input_offset);
51     }
52     const float* i3 = input[3];
53     assert(i3 != NULL);
54     if XNN_UNPREDICTABLE(i3 != zero) {
55       i3 = (const float*) ((uintptr_t) i3 + input_offset);
56     }
57     const float* i4 = input[4];
58     assert(i4 != NULL);
59     if XNN_UNPREDICTABLE(i4 != zero) {
60       i4 = (const float*) ((uintptr_t) i4 + input_offset);
61     }
62     const float* i5 = input[5];
63     assert(i5 != NULL);
64     if XNN_UNPREDICTABLE(i5 != zero) {
65       i5 = (const float*) ((uintptr_t) i5 + input_offset);
66     }
67     const float* i6 = input[6];
68     assert(i6 != NULL);
69     if XNN_UNPREDICTABLE(i6 != zero) {
70       i6 = (const float*) ((uintptr_t) i6 + input_offset);
71     }
72     const float* i7 = input[7];
73     assert(i7 != NULL);
74     if XNN_UNPREDICTABLE(i7 != zero) {
75       i7 = (const float*) ((uintptr_t) i7 + input_offset);
76     }
77     const float* i8 = input[8];
78     assert(i8 != NULL);
79     if XNN_UNPREDICTABLE(i8 != zero) {
80       i8 = (const float*) ((uintptr_t) i8 + input_offset);
81     }
82     input = (const float**) ((uintptr_t) input + input_stride);
83 
84     size_t c = channels;
85     const float* w = weights;
86     for (; c >= 8; c -= 8) {
87       __m256 vacc01234567p0 = _mm256_load_ps(w);
88 
89 
90       const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
91       i0 += 8;
92 
93       const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
94       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
95 
96       const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
97       i1 += 8;
98 
99       const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
100       __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
101 
102       const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
103       i2 += 8;
104 
105       const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
106       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
107 
108       const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
109       i3 += 8;
110 
111       const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
112       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
113 
114       const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
115       i4 += 8;
116 
117       const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
118       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
119 
120       const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
121       i5 += 8;
122 
123       const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
124       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi5x01234567, vk5x01234567));
125 
126       const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
127       i6 += 8;
128 
129       const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
130       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
131 
132       const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
133       i7 += 8;
134 
135       const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
136       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi7x01234567, vk7x01234567));
137 
138       const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
139       i8 += 8;
140 
141       const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
142       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
143 
144       w += 80;
145 
146       // Add up all accumulators to vacc01234567p0
147       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
148 
149       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
150       vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
151 
152       _mm256_storeu_ps(output, vacc01234567);
153       output += 8;
154     }
155     if XNN_UNLIKELY(c != 0) {
156       assert(c >= 1);
157       assert(c <= 7);
158       __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
159 
160       __m256 vacc01234567p0 = _mm256_load_ps(w);
161 
162       const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
163       const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
164       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
165 
166       const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
167       const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
168       __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
169 
170       const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
171       const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
172       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
173 
174       const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
175       const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
176       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi3x01234567, vk3x01234567));
177 
178       const __m256 vi4x01234567 = _mm256_maskload_ps(i4, vmask);
179       const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
180       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi4x01234567, vk4x01234567));
181 
182       const __m256 vi5x01234567 = _mm256_maskload_ps(i5, vmask);
183       const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
184       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi5x01234567, vk5x01234567));
185 
186       const __m256 vi6x01234567 = _mm256_maskload_ps(i6, vmask);
187       const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
188       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi6x01234567, vk6x01234567));
189 
190       const __m256 vi7x01234567 = _mm256_maskload_ps(i7, vmask);
191       const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
192       vacc01234567p1 = _mm256_add_ps(vacc01234567p1, _mm256_mul_ps(vi7x01234567, vk7x01234567));
193 
194       const __m256 vi8x01234567 = _mm256_maskload_ps(i8, vmask);
195       const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
196       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi8x01234567, vk8x01234567));
197 
198       // Add up all accumulators to vacc01234567p0
199       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
200 
201       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
202       vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
203 
204       // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
205       __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
206       if (c & 4) {
207         _mm_storeu_ps(output, vacc0123);
208         vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
209         output += 4;
210       }
211       if (c & 2) {
212         _mm_storel_pi((__m64*) output, vacc0123);
213         vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
214         output += 2;
215       }
216       if (c & 1) {
217         _mm_store_ss(output, vacc0123);
218         output += 1;
219       }
220     }
221 
222     output = (float*) ((uintptr_t) output + output_increment);
223   } while (--output_width != 0);
224 }
225